KR0135886Y1 - Gps master clock - Google Patents

Abstract

The present invention provides a more accurate, faster and more reliable standard time, and provides a GPS master clock that can correct the time of various information and communication devices and devices that require a standard and accurate time.

To this end, the GPS master clock according to the present invention, in the clock system for receiving a radio wave from at least one satellite via the antenna to obtain a standard time, and receives a predetermined radio wave through the antenna (ANT), these Receiving means 11 which decodes the data and outputs the data as time data and time pulse signal when the received radio wave is synchronized, and time data connected to the receiving means 11 and transmitted from the receiving means 11. And control means 13 for obtaining a standard time based on the time pulse signal, the control means 13 connected to the control means 13 to display the obtained standard time, and various states controlled by the control means 13. Conversion means 15a for receiving a control command of a predetermined bit from the control means 13 and converting the tone into a tone so as to be transmitted to a communication line. A digital subclock generating means 15 connected to the converting means 15a and an analog subclock generating means 16 that receives a control command from the control means 13 and generates a signal for driving the analog subclock. Characterized in that provided.

Description

GF master clock

1 is an overall block diagram of a GPS master clock according to the present invention.

2 is a flowchart illustrating the main operation of the GPS master clock according to the present invention.

Figure 3 is a flow chart for explaining the precise time interception of the master clock according to the present invention.

4 is a view showing a more detailed configuration of the receiving module of the master clock according to the present invention.

* Explanation of symbols for main parts of the drawings

ANO: GPS Antenna 11: GPS Receiver Module

12: precision reference frequency oscillator (TCXO) 13: main processor

14 display device 15 digital subclock generator

15a: DTMF encoder 15b: line amplifier

16: analog subclock generator 17: IRIG-H signal generator

18: RS-232C interface 21: GPS receiver

22: RS-422 interface

[Technical Area of Design]

The present invention can receive one data frame every second without being affected by the feature, weather change or season, and adopts the method of GPS satellite which can guarantee the accuracy of data with the built-in data verification code. Accordingly, the present invention relates to a GPS master clock capable of providing a more accurate, faster and more reliable standard time, and correcting the time of various types of communication devices and various devices requiring a standard and accurate time.

[Outline of Design]

In recent years, the information and communication industry and the precision industry are rapidly developing, but the necessity of accurate time is desperately needed in most fields. The current situation is to correct the time. However, in such a case, the difference is severe depending on the method of operation of the individual, and the watch or the wall clock itself are often inaccurate, and thus a cumulative error occurs even after the correction. Therefore, the visual calibration of various devices should be performed automatically by the standard visual device which can automatically correct the correct time.

Currently, there are a method of acquiring the standard time using a standard time broadcasting of the Korea Standards Research Institute, and a method of using the GPS standard time through the GPS (Global Positioning System) satellite.

Currently, there are approximately 27 GPS satellites over the Earth, which are continuously launching satellites to increase the number of visible satellites. At any point on Earth, 6 to 10 visible satellites can be captured, of which one can acquire visual information when one or more satellites are synchronized, and can take two-dimensional coordinates when three or more are synchronized. When the satellites are synchronized, three-dimensional coordinates can be taken. At this time, the coordinate system and time are calculated using the entire earth as a single data.

In case of using standard time broadcasting, that is, standard shortwave, the reference pulse of 1.8KHz and IRIG-H data modulated at 100Hz are used, so the minimum unit of the data frame is 1 minute, and the carrier area is shortwave. Therefore, the signal change is severe. In addition, if an error occurs in the signal itself due to changes in the features, seasons, weather, etc., there is no way to detect the error. Therefore, it is necessary to check the accuracy of data by receiving data of multiple frames and comparing the data with each other. do. Therefore, there is a drawback that the time for calibration is long (for example, 10 minutes or more).

On the other hand, GPS uses a single coordinate system that covers the entire earth and multiple satellites that orbit around the earth every 12 hours to measure time for the purpose of providing accurate navigation information to the receiver for military purposes in the US Department of Defense. It is a system that emits radio waves by placing it in the. Each satellite has four very precise atomic clocks (10-9 sec), two of which are cesium atomic clocks for long-term stability, and the other two are rubidium atomic clocks in a short time. To maintain stability.

At the US Department of Defense, the Orbiter tracks each satellite's orbit twice a day and transmits accurate time and status information to the satellite, whereby the satellite corrects errors and maintains the correct time and orbit.

As the transmission carrier frequency of each satellite, the same frequency of 1.57542 GHz (gigahertz) is used, and good reception quality can be obtained with a small output and a small antenna.

Therefore, the present invention can receive one data frame every second without being affected by the feature, weather change or season, and the GPS satellite method which can guarantee the accuracy of data with the built-in data verification code. Was adopted.

In case of using satellite, it selects satellite which has good wave condition among many satellites automatically and maintains the best radio wave condition and receives data every second, so it can be assembled within about 1 minute. Do.

[Purpose of designation]

Therefore, the present invention has been made in view of the above, and it is possible to receive one data frame every second without being affected by the feature, weather change or season, and the data verification code is embedded to ensure the accuracy of the data. By adopting GPS satellite method, it is possible to provide more accurate, faster and more reliable standard time, and to calibrate the time of various information communication devices and various devices that need standard and accurate time. It is an object of the present invention to provide a GPS master clock.

[Composition of design]

In order to achieve the above object, the GPS master clock according to the present invention is a clock system for obtaining a standard time by receiving radio waves from at least one satellite through an antenna, wherein a predetermined radio wave is received through the antenna ANT. Receiving means 11, and when the received radio waves are synchronized, receiving means 11 which decodes the data and outputs the data as time data and time pulse signals, and is connected to the receiving means 11 from the receiving means 11; A control means 13 for obtaining a standard time based on the transmitted time data and a time pulse signal, connected to the control means 13 to display the obtained standard time, and controlled by the control means 13 Display means 14 for displaying various statuses, and a tone to receive a control command of a predetermined bit from the control means 13 and transmit it to the communication line. A digital sub clock generating means 15 having a converting means 15a, an amplifying means 15b connected to the converting means 15a, and outputting a signal for driving the digital sub clock; 13) an analog subclock generation means 16 for generating a signal for driving the analog subclock in response to a control command.

EXAMPLE

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is an overall block diagram of a GPS master clock according to the present invention.

First, the GPS antenna ANT will be described.

The GPS antenna ANT receives a predetermined carrier frequency (1.57542 GHz) from the GPS satellites.

Since the radio wave of 1.575 GHz band is used as a carrier wave of a radio wave received from a satellite, the installation of this GPS antenna is possible in a very small size, and radio waves can be received from a plurality of satellites.

Next, the GPS receiving module 11 will be described.

The radio waves received from the plurality of satellites through the GPS antenna ANT are synchronous to the GPS receiving module 11 up to 6 satellite signals in order of good quality of the radio waves. The satellite data is decoded internally. At this time, the accuracy of the visual data among the decoded data is about 130 nanoseconds.

In addition, since the charging device and the storage battery are built in the receiving module 11, the internal data is maintained even when the power is cut off.

In the present invention, the received time is universal time, and is converted to the standard time of the Republic of Korea by the set value.

In the converted government, the visual data is sent to the main processor through the RS-422 port every second along with the following information, and the reference time pulse having a precision of 130 nanoseconds is sent to the main processor as a TTL signal.

Next, the main processor 13 will be described.

The main processor 13 has its own clock by a crystal oscillator (TCXO) 12 capable of temperature compensation in itself, and usually operates at its own time.

The time signal transmitted from the GPS receiving module 11 to the RS-422 port and the precision time pulse transmitted from the TTL signal are supplied to the main controller of the mother clock, and then a pulse having a precision of 130 nanoseconds is input. Will generate an interrupt to the processor, at which point it will set the time base and read the data to the RS-422 port.

The check code is used to verify the accuracy of the read data, ignore it when there is an abnormality, and analyze and decode this data in the normal case to see if the satellite is captured correctly. At this time, if the satellites are captured correctly, corrections of milliseconds or less are performed based on the time reference by the precise time pulse.

Thereafter, milliseconds are updated every 1/1000 second by an intercept signal generated by the temperature compensated crystal oscillator (TCXO) 12. This signal is internally time based.

Every 1000 milliseconds, the seconds data is incremented, and the minute, hour, and date data are calculated and updated accordingly.

On the other hand, the visual data read from the satellite is stored in the internal memory and compared with previous data. As a result, the visual data check value is increased in the normal case.

If this value is 5 or more times, the satellite data capture flag is set after calibrating the time data of the internal clock of the main controller using the data received from the satellite.

If the time data received from the satellite is incorrect, the time information check value is reset to zero and the satellite capture flag is cleared.

The corrected time is maintained as the standard time of the internal clock until the next calibration.

Internally, the precision of the time is corrected by a precision time pulse of 130 nanoseconds, and the precision of the time output to the outside is determined by an intercept signal of 1/1000 second to maintain the precision of 1 millisecond.

This main processor 13 is composed of a microcontroller unit (MCU), which uses an Intel 8751 chip in this example.

The main controller 13 has a memory for storing various programs and control data, a predetermined power supply device, and the like.

Next, various devices connected to the output side of the main controller 13 will be described.

First, on the output side of the main control processor 13, a line amplifier 15b for outputting a DTMF (Dual tone multi frequency) signal for driving a digital subclock is provided, and is provided in front of the line amplifier 15b. A digital subclock generator 15 is provided, which consists of a DTMF encoder 15a that receives four bits of data from the processor 13 and converts it into a tone for transmission to a communication line.

On the output side of the main processor 13, an analog subclock generator 16 for outputting 0,30 second pulses for analog subclock driving is provided, and IRIG- for outputting an IRIG-H signal of a BCD time code. An H signal generator 17 is provided.

Furthermore, on the output side of the main processor 13, an RS-232C interface 18 for outputting RS-232C data for driving a host computer, a personal computer or various communication devices is provided.

In other words, a computer or a microprocessor-mounted system and a general communication facility have a built-in RS-232C communication port as a basic communication means, and can provide an RS-232C output as a means for correcting the time of such a device.

At this time, the communication is composed of 9600BPS, 8-bit data bit, 1-bit stop bit, non-parity, any system that supports the RS-232C standard Can be taken.

The RS-232C interface 18 sends a calibration signal for correcting the time of a host computer, a personal computer, or various communication devices having an RS-232C port, and when a calibration request is made or at a predetermined time, It allows you to calibrate the time by sending the, and set the computer's time to 0.1 seconds.

At the beginning of every minute, the digital subclock generator 15 generates a DTMF signal, which is a calibration signal for the digital subclock, and displays hour, minute, and recognition data at a width of 500 milliseconds every second from 0 to 5 seconds per minute. Send it out.

At 0 and 30 seconds each minute, the analog subclock generator 16 generates a pulse signal, which is a calibration signal for the analog subclock, with the width of the pulse lasting 500 milliseconds from the beginning of the second and the output at the TTL level.

On the other hand, the precise visual data output is converted into an IRIG-H signal and sent to the IRIG-H signal generator 17 for calibration of an external device. In this case, as a circuit for generating 100 Hz, which is the carrier frequency of the IRIG-H signal, a D / A converter receiving a signal output from a temperature compensated crystal oscillator (TCXO) and a memory programmed with a sinusoidal waveform are used. From this, the sinusoidal frequency is precisely output in time. This frequency is amplitude modulated in IRIG-H format according to the current time value, and the level and amplification are adjusted and then output to the IRIG-H output.

Finally, the display unit 14 will be described.

The display device 14 displays the current standard time of day, hour, minute, and elementary time set by the main processor 13. The display device 14 is further provided with an indicator for checking the state of the input signal and the output signal.

Next, the operation of the GPS master clock according to the present invention configured as described above will be described with reference to the flowcharts shown in FIGS. 2 and 3. 2 is a flowchart for explaining the main operation of the GPS master clock according to the present invention, Figure 3 is a flowchart for explaining the precise time interception of the GPS master clock according to the present invention.

First, the operation of the GPS master clock will be described with reference to the flowchart shown in FIG. 2. First, the apparatus is powered on, and the internal memory built in the main processor 13 is initialized (step S1) and the GPS receiving module. Initial stage (11) (step S2) is performed. Next, it is judged whether or not the display flag is set (step S3). If the display flag is not set, this step S3 is repeatedly performed until the display flag is set.

On the other hand, when it is determined that the display flag is set, the display of the time information (step S4), the output of the flashing signal (step S5), the output of other information (step S6), the output of the subclock signal (step S7) And outputting the signal through the interface (step S8) and outputting the IRIG signal (step S9), analyzing satellite data (step S10), and further performing an internal calculation routine (step S11).

Next, with reference to FIG. 3, the precise time interception operation performed when the interception caused by the precision pulse occurs will be described.

First, it is assumed that interception by the precision pulse has occurred (step S21). Next, it is judged whether or not the satellite capture flag is set (step S22), and when it is determined that the phase capture flag is set, the precision pulse edge time is stored (step S23), and data is received (step S24). The data is analyzed (step S25). Thereafter, it is determined whether or not checksum inspection of the analyzed data is possible (step S26). As a result, when it is determined that the checksum check is not possible, the phase capture flag is released (step S30), and when it is determined that the checksum check is possible, correction of milliseconds or less by the precision pulse (step S27), After the internal clock is corrected by the satellite data (step S28), the display flag is set (step S29), etc., the process returns.

On the other hand, when it is determined in step S22 that the phase capture flag is not set, the received data received up to that time is analyzed (step S31) to determine whether the data is correct (step S32). As a result, if it is determined that the data is not correct, it returns immediately. If it is determined that the data is correct, the visual information check value is increased (step S33), and the increased visual information check value is set to the set value. It is judged whether or not they match (step S34). As a result, when it is determined that the time information check value does not match the set value, the process returns immediately. When it is determined that the time information check value matches the set value, the phase capture flag is set (step S35).

4 is a view showing a more detailed configuration of the receiving module of the GPS master clock according to the present invention. In this figure, reference numeral ANT denotes a GPS antenna, 21 a GPS receiver, and 22 an RS-422 interface.

On the other hand, the present invention is not limited to the above-described embodiment, of course, various modifications can be made within the scope not departing from the gist. For example, in the above embodiment, a case where the communication speed is 9600BPS has been described as an example, but the present invention can be applied to a communication speed higher than 9600BPS.

[Effect of design]

As described above, according to the present invention, one data frame can be received every second without being affected by the feature, weather change, or season, and the GPS which can guarantee the accuracy of the data with the built-in data verification code GPS master clock which can provide more accurate, faster and more reliable standard time by adopting satellite method, and can correct time of various information communication devices and other devices that need standard and accurate time. Can be provided.

Claims (4)

A clock system for receiving radio waves from at least one satellite to obtain a standard time through an antenna, wherein a predetermined radio wave is received through the antenna ANT, and the data is synchronized when the received radio waves are synchronized. Receiving means 11 for decoding and outputting as time data and time pulse signals; and obtaining a standard time based on time data and time pulse signals transmitted from the receiving means 11 connected to the receiving means 11; The control means 11 and the control means 13 connected to the receiving means 11 to obtain a standard time based on the time data and the time pulse signal transmitted from the receiving means 11, the control means 13 Display means (14) for displaying the various standard times controlled by the control means (13), in addition to displaying the obtained standard time A conversion unit 15a for receiving a control command of a predetermined bit from the stage 13 and converting it to a tone so as to be transmitted to a communication line, and an amplification connected to the conversion unit 15a for outputting a signal for driving a digital subclock. Digital subclock generating means (15) having means (15b) and analog subclock generating means (16) for generating a signal for driving an analog subclock by receiving a control command from said control means (13). Featuring a GPS master clock. The GPS master clock according to claim 1, wherein the receiving means (11) has a charging device and a storage battery therein. An interface means (18) according to claim 1 or 2, which is connected to said control means (13) and outputs data for driving a host computer, a personal computer or various communication devices, and said control means (13). GPS master clock, characterized in that it further comprises a calibration signal generating means (17) connected to generate a calibration signal of the BCD time code. 4. The GPS master clock according to claim 3, wherein the signal for driving the analog subclock is a 0, 30 second pulse, and the interface means (18) is an RS-232C interface.