KR0129577B1 - Metric calculation method - Google Patents
Metric calculation methodInfo
- Publication number
- KR0129577B1 KR0129577B1 KR1019940009496A KR19940009496A KR0129577B1 KR 0129577 B1 KR0129577 B1 KR 0129577B1 KR 1019940009496 A KR1019940009496 A KR 1019940009496A KR 19940009496 A KR19940009496 A KR 19940009496A KR 0129577 B1 KR0129577 B1 KR 0129577B1
- Authority
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- Prior art keywords
- metric
- signal
- region
- value
- pruner
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
- H04N5/455—Demodulation-circuits
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/3405—Modifications of the signal space to increase the efficiency of transmission, e.g. reduction of the bit error rate, bandwidth, or average power
- H04L27/3416—Modifications of the signal space to increase the efficiency of transmission, e.g. reduction of the bit error rate, bandwidth, or average power in which the information is carried by both the individual signal points and the subset to which the individual points belong, e.g. using coset coding, lattice coding, or related schemes
- H04L27/3427—Modifications of the signal space to increase the efficiency of transmission, e.g. reduction of the bit error rate, bandwidth, or average power in which the information is carried by both the individual signal points and the subset to which the individual points belong, e.g. using coset coding, lattice coding, or related schemes in which the constellation is the n - fold Cartesian product of a single underlying two-dimensional constellation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/24—Systems for the transmission of television signals using pulse code modulation
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- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Multimedia (AREA)
- Error Detection And Correction (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
Description
본 발명은 고화질 TV 전송 시스템에서 메트릭(metric)계산 방법에 관한 것으로, 특히 수신되는 신호에 대해 각 영역별로 메트릭을 수정함으로서 성능을 향상시킨 개선된 메트릭 계산 방법에 관한 것이다.The present invention relates to a metric calculation method in a high-definition TV transmission system, and more particularly, to an improved metric calculation method that improves performance by modifying a metric for each region for a received signal.
도 1는 제너럴 일렉트로닉스(GI) 사의 디지사이퍼(digiciper) HDTV 수신 시스템에서 트렐리스(trellis) 디코더의 개략적인 블록도가 도시된다. 도시된 바와 같이 트렐리스 디코더는 아퀄라이저(도시되지 않음)를 통해 입력되는 동위상(Inphase : I)신호와 직각 위상(Quadrature Phase : Q)신호를 입력하여 경결정(hard decision)에의한 비부호화 비트를 생성하여 도시되지 않은 지연 버퍼로 발생하며, 또 연결정(soft decision)을 위한 가지 평가량데이터를 생성하여 라인(111 및 112)상으로 발생하는 프루너 메모리(110)와, 라인(111 및 112)에 결합되어, 입력되는 가지 평가량 데이터를 이용하여 알려진 기법에 의해 디코딩하는 비터비 디코더(120)를 구비한다.1 is a schematic block diagram of a trellis decoder in a digiciper HDTV receiving system from General Electronics (GI). As shown, the trellis decoder inputs an in-phase (I) signal and a quadrature phase (Q) signal input through an equalizer (not shown), thereby causing a ratio due to hard decision. Pruner memory 110 and lines 111 and 11 that generate coded bits and generate them into delay buffers (not shown), and generate branch evaluation data for soft decisions and generate them on lines 111 and 112. And a Viterbi decoder 120, which is decoded by a known technique using branch input data inputted thereto.
도 2를 참조하면, 도 2에는 전술한 프루너 메모리(110)에서 메트릭을 계산하는데 있어, 기준이 되는 32-직각 진폭 변조(Quadrature Amplitude Modulation : QAM)신호들의 자리표가 도시되는 데, 도시되어 있는 두 자리수는 각각이 I와Q에 따라 1과 0이 반복되고 있음을 알수가 있다. 여기서, 횡축은 I 신호를 나타내고, 종축은 Q 신호를 나타내며, 또한 두 비트중에 비트 0은 수신된 I신호를 나타내고 비트1는 수신된 Q 신호를 나타낸다. 한편 디지사이퍼가 채택한 변조 방식은 16/32 QAM방식인데, 이중에서 특히 32QAM은 16QAM에 비해 동일한 C/N일 때, 비트 에러율(BER)이 높기 때문에 보다 넓은 지역을 포괄할수 없다는 단점이 있으나 화질이 좋다는 장점이 있으므로, 많이 이용된다. 32QAM 메트릭을 계산하는데 있어서 네 모서리 신호(231 내지 234)를 살펴보면 기준 신호가 아닌 신호로 인식이 되어 메트릭이 잘못 계산되어지는 경우가 발생할 수 있다. 예를들어 좌측 상단 모서리에 32QAM 에 포함되지 않는 X표(235)위치의 신호가 수신되었다고 가정하면, 32QAM영역(220)의 신호중 가장 인접한 신호(즉, 00, 10, 11)(221 내지 223)를 통해 얻어진 신호임에도 불구하고, 1신호로 잘못 인식이 된다. 즉, 8등분으로 균일하게 나눈 메트릭으로 변경하며 I방향으로는 1을 나타내는 7이나 6의 값은, 기리고 Q방향으로는 0을 나타내는 0이나 1의 값을 갖게된다.Referring to FIG. 2, FIG. 2 shows a table of 32 quadrature amplitude modulation (QAM) signals as reference for calculating the metric in the pruner memory 110 described above. The number of digits shows that 1 and 0 are repeated according to I and Q respectively. Here, the horizontal axis represents the I signal, the vertical axis represents the Q signal, and among the two bits, bit 0 represents the received I signal and bit 1 represents the received Q signal. On the other hand, the modulation method adopted by the digital cipher is 16/32 QAM method, of which 32QAM has a disadvantage in that it cannot cover a wider area because the bit error rate (BER) is higher when the same C / N is compared to 16QAM. There is a good advantage, it is used a lot. Looking at the four corner signals 231 to 234 in calculating the 32QAM metric may be recognized as a signal other than the reference signal, and the metric may be miscalculated. For example, assuming that a signal at position X mark 235 not received in 32QAM is received in the upper left corner, the closest signal among the signals in the 32QAM region 220 (ie, 00, 10, 11) (221 to 223). In spite of the signal obtained through, the signal is incorrectly recognized as one signal. That is, the value of 7 or 6 representing the metric uniformly divided into 8 equal parts and having 1 in the I direction has a value of 0 or 1 representing 0 in the Q direction.
전술한 바와 같이 종래의 메트릭 계산 기법은 32QAM에 존재하지 않는 신호들, 즉 모서리의 신호(231 내지 234)를 고려하지 않고 단지 32QAM에 포함되는 신호만을 메트릭 계산하여 디코딩을 행하므로 디코딩 에러를 유발시켜 성능을 저하시키는 문제점이 있었다.As described above, the conventional metric calculation technique does not consider signals that do not exist in the 32QAM, that is, signals that are included in the 32QAM without performing the metric calculation and decodes, thereby causing a decoding error. There was a problem of degrading performance.
따라서 본 발명의 주 목적은 수신되는 신호에 대해 전체적으로 메트릭을 계산하고 그 다음 각 영역별로 메트릭을 수정함으로서, 디코딩 성능을 향상시키는 개선된 메트릭 계산 방법을 제공하는데 있다.Accordingly, a main object of the present invention is to provide an improved metric calculation method that improves decoding performance by calculating a metric on a received signal as a whole and then modifying the metric for each region.
본 발명은 상기 목적을 달성하기 위하여 32-직각 진폭 변조 방식을 이용하며, 프루너 메모리,비터비 디코더를 포함하는 고화질 티브이(HDTV) 수신 시스템에서 상기 프루너 메모리로 수신되는 동위상(I)신호 및 직각 위상(Q)신호에 응답하여 메트릭을 계산하는 방법으로서, 상기 프루너 메모리로 수신되는 신호의 수신 영역을 판단하고, 상기 32QAM영역내의 제 1 영역과, 상기 32QAM 영역외의 상,하,좌,우측 영역의 제 2 영역 및 상기 제 1 및 제 2 영역외의 모서리 부분에 대한 제 3 영역으로 분할하여 메트릭을 계산하되, 상기 제 1 영역에 대해서는 균일하게 8둥분하여 0에 근접할수록 작은값으로 메트릭값을 결정하고, 상기 제 2 영역에 대해서는 상기 좌 및 우측과, 상기 상 및 하측 영역에서의 상기 I신호의 값이나 Q신호의 값에 대응하도록 메트릭값을 결정하며, 상기 제 3영역에 대해서는 수신된 신호 위치에서 상기 제 1영역의 가장 인접한 값과의 차이값을 각각 구하고 그중 가장 작은 차이값과 그 다음 작은 차이값을 선택하는 것으로 메트릭값을 결정하는 것을 특징으로 한다.In order to achieve the above object, the present invention uses a 32-right amplitude modulation scheme, and in-phase (I) signal and right angle received by the pruner memory in a high-definition TV (HDTV) receiving system including a pruner memory and a Viterbi decoder. A method of calculating a metric in response to a phase (Q) signal, the method comprising: determining a reception area of a signal received by the pruner memory, and determining a first area in the 32QAM area and an upper, lower, left, and right areas other than the 32QAM area. The metric is calculated by dividing the second region and the third region of the corner portions other than the first and second regions, but the metric value is determined as a smaller value as it approaches zero evenly for the first region. For the second region, a metric value is determined so as to correspond to the value of the I signal or the Q signal in the left and right and the upper and lower regions. For the third region, the metric value is determined by obtaining a difference value between the nearest value of the first region at the received signal position and selecting the smallest difference value and the next smallest difference value. .
도 1는 본 발명의 개선된 메트릭 계산 방법에 채용되는 트렐리스 디코더의 개략적인 블록도.1 is a schematic block diagram of a trellis decoder employed in the improved metric calculation method of the present invention.
도 2는 종래의 메트릭 계산 발명을 설명하는 도면.2 illustrates a conventional metric calculation invention.
도 3는 본 발명의 개선된 메트릭 계산 방법을 예시하는 도면,3 is a diagram illustrating an improved metric calculation method of the present invention;
도 4는 종래의 메트릭 계산 방법에서 메트릭 계산을 설명하는 도면.4 is a diagram illustrating metric calculation in a conventional metric calculation method.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
110 : 프루너 메모리(Pruner PROM) 120 : 비터비 디코더110: Pruner PROM 120: Viterbi decoder
이하, 첨부된 도면을 참조하여 본 발명의 실시예를 상세히 설명한다.Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention;
도 3는 본 발명에 따른 개선된 메트릭 계산 방법의 일실시예를 예시하는 도면인데, 본 발명에서는 도시된 바와 같이 먼저 제 1 영역(310)(32QAM영역내)은 선행 기법과 동일하게 메트릭을 계산하며, 그 다음 32QAM영역외의 제 2 및 제 3영역(320a 내지 330d)에 대해 메트릭을 수정하는 식으로 실행된다. 이러한 처리과정을 통함으로서, 심볼 에러율(Symbol Error Rate :SER)을 줄여 디코딩 성능을 향상시킬수가 있게된다.3 is a diagram illustrating an embodiment of an improved metric calculation method according to the present invention. In the present invention, as shown in the drawing, the first area 310 (in the 32QAM area) first calculates the metric as in the prior art. And then modify the metric for the second and third regions 320a to 330d outside the 32QAM region. Through this process, it is possible to improve the decoding performance by reducing the symbol error rate (SER).
제 1 영역(310)에 수신된 신호의 메트릭값은 도 4에 도시되어 있는 바와 같이 균일하게 8등분하여 1에 근접할수록 큰수를, 또한 0에 근접할수록 작은 수를 메트릭값으로 최종 결정하게 된다. 그리고, 제 2 영역(320a 내지 320d)에 수신되는 신호의 메트릭값은 그 수신되는 신호와 가장 인접한 것으로 매핑(mapping)함으로서 결정될수 있다. 예를 들어 좌측에 위치한 영역(320d)에서 신호를 수신하였다고 가정하면 이 영역의 신호는 가장 인접한 네 신호(311 내지 314)에서 얻어질 확률이 가장 높을 것이다. 그런데 네 신호를 살펴보면, 그 신호의 Q신호값은 각기 다른 반면에, I신호값은 모두 '1'로서 동일함을 알수 있을 것이다. 그러므로 그 신호가 '1'을 의미하도록 I에 관한 메트릭을 7로 결정한다.As shown in FIG. 4, the metric value of the signal received in the first area 310 is uniformly divided into eight equally, and the larger the closer to 1, the smaller the closer to 0, is finally determined as the metric value. And, the metric value of the signal received in the second area 320a to 320d may be determined by mapping to the one closest to the received signal. For example, assuming that a signal is received in the area 320d located on the left side, the signal in this area will be most likely to be obtained from the four nearest signals 311 to 314. Looking at the four signals, however, the Q signal values of the signals are different, while the I signal values are all equal to '1'. Therefore, the metric about I is determined to be 7 so that the signal means '1'.
전술한 바와 같이 제 2 영역으로 수신된 신호는 그 영역에 가장 인접한 신호, 즉, 상,하,좌,우측 신호들의 I값이나 Q값을 나타낼수 있도록 0이나 7의 메트릭 값을 부여한다.As described above, the signal received in the second area is assigned a metric value of 0 or 7 so as to indicate the I value or the Q value of the signals closest to the area, that is, the up, down, left and right signals.
마지막으로, 제 3 영역(330a 내지 330d)에 수신된 신호, 예를 둘어 x표에 위치한 신호(331)의 메트릭값은 수신되는 신호의 가장 인접한 세 신호(332 내지 334)로 부터 얻어진다고 가정하자. 먼저 수신된 신호 X표(331)에서 0,1,11(332 내지 334)신호까지 유클리디안 거리(Euclidean Distance)를 계산한다. 그 다음 계산된 거리중에서 가장 작은값과 그 다음 작은값을 선택하여 그 두거리의 차값(D)에 따라 메트릭값을 최종 결정한다. 즉, 차값(D)이 0.75보다 크거나 같으면 I신호의 메트릭은 7로 결정하고, 그밖의 차값이 0.5보다 크거나 같으면, I신호의 메트릭은 5로 결정한다. 차값이 그외의 영역에 해당되는 경우에는 I시호의 메트릭을 4로 결정하게 된다.Finally, suppose that the metric value of the signal received in the third area 330a to 330d, for example, the signal 331 located in the x mark, is obtained from the three nearest signals 332 to 334 of the received signal. . First, Euclidean distance is calculated from the received signal X table 331 to 0,1,11 (332 to 334) signals. Then, the smallest value and the next smallest value are selected from the calculated distances, and the metric value is finally determined according to the difference value D between the two distances. That is, if the difference value D is greater than or equal to 0.75, the metric of the I signal is determined to be 7. If the other difference value is greater than or equal to 0.5, the metric of the I signal is determined to be 5. If the difference is in the other region, the metric of the I time signal is determined as 4.
전술한 바와같이 메트릭 계산 방법은 균일하게 8 등분한 균일 메트릭을 가정하였기 때문에 거리차에 따른 메트릭 계산 방법이 0.25차이씩 고정된 간격을 유지하지만, 본 발명의 다른 실시예로서, 메트릭을 불균일하게 설정함으로서 거리차에 따른 메트릭값을 결정할수 있을 것이다.As described above, since the metric calculation method assumes a uniform metric equally divided into eight, the metric calculation method according to the distance difference maintains a fixed interval of 0.25 difference, but as another embodiment of the present invention, the metric is nonuniformly set. By doing so, the metric value according to the distance difference can be determined.
이상 설명한 바와 같이 본 발명에 의하면, 수신된 신호에 대해 전체적으로 메트릭을 계산하고 그 다음 각 영역별로 메트릭을 수정함으로서 송신 파워의 증가 없이도 비트 에러율을 낮추어 디코딩 성능을 향상시키는 커다란 장점이 있다.As described above, according to the present invention, there is a great advantage of improving the decoding performance by lowering the bit error rate without increasing the transmission power by calculating the metric on the received signal as a whole and then modifying the metric for each region.
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Priority Applications (4)
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KR1019940009496A KR0129577B1 (en) | 1994-04-30 | 1994-04-30 | Metric calculation method |
US08/367,531 US5654986A (en) | 1994-04-30 | 1994-12-30 | Method and apparatus for decoding trellis coded QAM signals |
EP95100025A EP0680184A3 (en) | 1994-04-30 | 1995-01-02 | Method and apparatus for decoding trellis coded QAM signals. |
JP7053459A JPH0846663A (en) | 1994-04-30 | 1995-02-17 | System and method for decoding torerisu coded qvadrature amplitude modulation (qam) signal |
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DE19529982A1 (en) * | 1995-08-16 | 1997-02-20 | Bosch Gmbh Robert | Synchronization procedure |
US5740203A (en) * | 1995-09-14 | 1998-04-14 | Thomson Consumer Electronics, Inc. | Trellis demapper of a convolutional decoder for decoding pragmatic trellis codes suitable for use in a multi-channel receiver of satellite, terrestrial and cable transmitted FEC compressed-digital television data |
JPH09205373A (en) * | 1996-01-24 | 1997-08-05 | Sony Corp | Viterbi decoding method and viterbi decoder |
US5920597A (en) * | 1996-09-16 | 1999-07-06 | Ericsson Inc. | Decoding technique for tail biting codes |
JP2978792B2 (en) * | 1996-10-31 | 1999-11-15 | 株式会社次世代デジタルテレビジョン放送システム研究所 | Soft decision method and receiver |
KR100221832B1 (en) * | 1996-11-19 | 1999-09-15 | 유기범 | Method for quadrature-quadrature amplitude modulation with constant amplitude characteristic and its apparatus |
EP0884879A3 (en) * | 1997-06-13 | 1999-03-17 | Canon Kabushiki Kaisha | QAM transmission using spread spectrum and sequence estimation |
DE19740739A1 (en) * | 1997-09-16 | 1999-03-18 | Siemens Ag | Automatic detection method by QAM-receiver for QAM-mode transmitted signal |
KR19990071095A (en) * | 1998-02-27 | 1999-09-15 | 전주범 | 16 QAM mapping devices on cable modems that support gray coded symbol mapping and differential coded symbol mapping |
US6148428A (en) * | 1998-05-21 | 2000-11-14 | Calimetrics, Inc. | Method and apparatus for modulation encoding data for storage on a multi-level optical recording medium |
US6594319B1 (en) | 1998-10-16 | 2003-07-15 | Analog Devices, Inc. | Apparatus and method for determining the closest coset points in a trellis decoder |
US6421394B1 (en) * | 1998-12-31 | 2002-07-16 | Oguz Tanrikulu | Computer method and apparatus for modem point slicing |
US7197090B1 (en) * | 1999-01-29 | 2007-03-27 | Northrop Grumman Corporation | Adaptive decision regions and metrics |
JP2001251200A (en) * | 2000-03-03 | 2001-09-14 | Nec Corp | Encoding method |
WO2003017500A1 (en) * | 2001-08-17 | 2003-02-27 | The National University Of Singapore | Coded modulation scheme for a wireless communication system and methods thereof |
WO2003043283A1 (en) * | 2001-11-14 | 2003-05-22 | Linkair Communications, Inc. | A quadrature amplitude modulation method used in the digital mobile communication system |
US7027532B2 (en) * | 2001-12-20 | 2006-04-11 | Broadcom Corporation | Viterbi decoding with channel and location information |
EP1367757B1 (en) * | 2002-05-31 | 2013-02-20 | Broadcom Corporation | True bit level decoding of TTCM, turbo trellis coded modulation, of variable rates and signal constellations |
US7254192B2 (en) * | 2002-07-12 | 2007-08-07 | Texas Instruments Incorporated | Iterative detection in MIMO systems |
EP2375661B1 (en) * | 2005-01-20 | 2018-09-26 | Rambus Inc. | High-speed signaling systems with adaptable pre-emphasis and equalization |
US7957484B2 (en) * | 2006-12-08 | 2011-06-07 | Texas Instruments Incorporated | Candidate list generation and interference cancellation framework for MIMO detection |
US8155217B2 (en) * | 2007-01-30 | 2012-04-10 | Texas Instruments Incorporated | Systems and methods for low-complexity MIMO detection with analytical leaf-node prediction |
US8306139B2 (en) * | 2007-01-30 | 2012-11-06 | Texas Instruments Incorporated | Systems and methods for low-complexity MIMO detection using leaf-node prediction via look-up tables |
US8077790B2 (en) * | 2007-10-23 | 2011-12-13 | Eric Morgan Dowling | Tiled-building-block trellis encoders |
US20090135946A1 (en) * | 2007-11-26 | 2009-05-28 | Eric Morgan Dowling | Tiled-building-block trellis decoders |
US8532229B2 (en) * | 2009-08-24 | 2013-09-10 | Trellis Phase Communications, Lp | Hard iterative decoder for multilevel codes |
US8442163B2 (en) * | 2009-08-24 | 2013-05-14 | Eric Morgan Dowling | List-viterbi hard iterative decoder for multilevel codes |
US9118350B2 (en) | 2010-09-10 | 2015-08-25 | Trellis Phase Communications, Lp | Methods, apparatus, and systems for coding with constrained interleaving |
US9112534B2 (en) | 2010-09-10 | 2015-08-18 | Trellis Phase Communications, Lp | Methods, apparatus, and systems for coding with constrained interleaving |
US8532209B2 (en) | 2010-11-24 | 2013-09-10 | Trellis Phase Communications, Lp | Methods, apparatus, and systems for coding with constrained interleaving |
US8537919B2 (en) | 2010-09-10 | 2013-09-17 | Trellis Phase Communications, Lp | Encoding and decoding using constrained interleaving |
US9116826B2 (en) | 2010-09-10 | 2015-08-25 | Trellis Phase Communications, Lp | Encoding and decoding using constrained interleaving |
US9240808B2 (en) | 2010-09-10 | 2016-01-19 | Trellis Phase Communications, Lp | Methods, apparatus, and systems for coding with constrained interleaving |
US9362955B2 (en) | 2010-09-10 | 2016-06-07 | Trellis Phase Communications, Lp | Encoding and decoding using constrained interleaving |
US9564927B2 (en) | 2015-05-27 | 2017-02-07 | John P Fonseka | Constrained interleaving for 5G wireless and optical transport networks |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2088676B (en) * | 1980-11-14 | 1985-09-04 | Plessey Co Ltd | Transmission systems |
GB2118003B (en) * | 1982-02-02 | 1985-07-31 | Racal Milgo Ltd | Differential encoder and decoder for transmitting binary data |
US4520490A (en) * | 1983-08-05 | 1985-05-28 | At&T Information Systems Inc. | Differentially nonlinear convolutional channel coding with expanded set of signalling alphabets |
US4709377A (en) * | 1985-03-13 | 1987-11-24 | Paradyne | Viterbi decoder for wireline modems |
US4831635A (en) * | 1986-10-02 | 1989-05-16 | American Telephone And Telegraph Company | Trellis codes with spectral nulls |
US5150381A (en) * | 1989-02-16 | 1992-09-22 | Codex Corporation | Trellis shaping for modulation systems |
US4901331A (en) * | 1989-05-19 | 1990-02-13 | American Telephone And Telegraph Company | Trellis codes with passband spectral nulls |
US4941154A (en) * | 1989-05-30 | 1990-07-10 | At&T Bell Laboratories | Trellis coding method and arrangement for fractional bit rates |
US5095497A (en) * | 1989-10-02 | 1992-03-10 | At & T Bell Laboratories | Technique for achieving the full coding gain of encoded digital signals |
JP2794964B2 (en) * | 1991-02-27 | 1998-09-10 | 日本電気株式会社 | Control signal generation circuit |
US5233629A (en) * | 1991-07-26 | 1993-08-03 | General Instrument Corporation | Method and apparatus for communicating digital data using trellis coded qam |
US5384810A (en) * | 1992-02-05 | 1995-01-24 | At&T Bell Laboratories | Modulo decoder |
US5408503A (en) * | 1992-07-03 | 1995-04-18 | U.S. Philips Corporation | Adaptive viterbi detector |
US5311557A (en) * | 1992-07-10 | 1994-05-10 | At&T Bell Laboratories | Circular limiter for use in a receiver to reduce the effects of signal distortion |
-
1994
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- 1994-12-30 US US08/367,531 patent/US5654986A/en not_active Expired - Fee Related
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1995
- 1995-01-02 EP EP95100025A patent/EP0680184A3/en not_active Withdrawn
- 1995-02-17 JP JP7053459A patent/JPH0846663A/en active Pending
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EP0680184A2 (en) | 1995-11-02 |
KR950030678A (en) | 1995-11-24 |
JPH0846663A (en) | 1996-02-16 |
EP0680184A3 (en) | 1997-08-20 |
US5654986A (en) | 1997-08-05 |
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