KR0126860B1 - Asynctonous transreciver system - Google Patents

Abstract

A mass storage asynchronous transmitter/receiver G-TAXI receiver is applied to an internal bus of a main frame computer and a communication between modules of an exchange system, and accommodates a transmission speed of a giga bit per a second, and provides various error detection function. The mass storage asynchronous transmitter/receiver G-TAXI receiver includes: a data delay means(31) for receiving a data and a first clock from a G-TAXI receiver(16), delaying them, and outputting them to FIFO part(14); and a controller(32) for receiving the first clock and a state signal from the G-TAXI receiver(16), generating a data writing signal(WEN) and a second clock, outputting them to the FIFO part(14), and outputting a failure signal to an operation/repair block.

Description

Large Asynchronous Transceiver Matching (G-TAXI) Receiver

1 is a block diagram of a large-capacity asynchronous transceiver matching (G-TAXI) communication network to which the present invention is applied.

2 is a state flow diagram in accordance with the present invention.

3 is an overall configuration diagram of the present invention.

4 is a detailed configuration diagram of the control unit.

5 is a detailed configuration diagram of the transmission state identification unit.

6 is a detailed configuration diagram of the state transition unit.

7 is a detailed block diagram of the first-in, first-out write signal generation unit.

8 is a configuration diagram of a data processing unit.

* Explanation of symbols for main parts of the drawings

31 data processing unit 32 control unit

41: transmission state identification unit 42: state transition unit

43: FIFO write signal generator

The present invention is applied to a communication network, an internal bus of a large computer, and an inter-module communication of a switching system, and a large-capacity asynchronous transceiver matching (G-TAXI: Gigabit Transparent Asynchronous Transmitter-) that accommodates a gigabit transmission rate per second and provides various error detection functions. Receiver Interface: hereinafter referred to as G-TAXI).

In the case of transmitting and receiving a frame using G-TAXI as a transmission mode, a mainstream method is to detect a state signal indicating the start of a frame and perform frame synchronization.

Therefore, the conventional G-TAXI receiver as described above is very difficult to cope with various error situations that may occur during transmission, and in particular, a very random state signal generated until power-on and reach a steady state. There was a problem that frame synchronization of error occurs by value.

An object of the present invention is to provide a reliable G-TAXI receiving device by providing a frame synchronization and various error detection functions by examining not only the frame synchronization signal but also possible state signal values.

In order to achieve the above object, the present invention includes a data delay means (31) for receiving the data and the first clock from the G-TAXI receiver delayed and output to the first-in first-out unit; And receiving the first clock and the state signal from the G-TAXI receiver, generating a write signal (WEN) and a second clock, which are signals for writing the data, and outputting the second clock to the first-in, first-out, and generating and operating a fault signal. And control means for outputting to the maintenance block.

Hereinafter, with reference to the accompanying drawings will be described an embodiment according to the present invention;

1 is a block diagram of a large-capacity asynchronous transceiver matching (G-TAXI) communication network to which the present invention is applied.

The G-TAXI transmitter 11 is a functional block for transmitting data using the G-TAXI transmitter 12, and the G-TAXI receiver 15 receives data from the G-TAXI receiver 16 and receives the data. It is a functional block for writing data to the first-in first-out (FIFO) 14. In addition, the G-TAXI transmitter 12 is a functional block that receives 32-bit data at a maximum speed of 31.25Mhz and multiplexes it into a 2-bit differential signal at a speed of 1.25Gbit / s, and the G-TAXI receiver 16 ) Is a functional block that demultiplexes two differential signals input at a rate of 1.25 Gbit / s into 32-bit parallel data and transmits them to the G-TAXI receiver 15 at a maximum speed of 31.25Mhz.

The optical transmitter 13 is a functional block that converts an electrical signal received from the G-TAXI transmitter 12 into an optical signal and transmits the optical signal through the optical path 18. The optical receiver 17 is an optical path 18 Is a functional block for converting an optical signal received through the C-TXI into an electrical signal and transmitting the same to the G-TAXI receiver 16.

In addition, the G-TAXI transmitting apparatus 11 configures a frame composed of data to be transmitted and header information, and divides the CLKI, which is a clock of 31.25Mhz provided by the G-TAXI transmitting unit 12, into N divisions (N = 0,1, 2, ...) in synchronism with one clock to raise the first 4 octets of the frame to be transmitted to the 32-bit data signal line, and to the 5-bit command signal line of the G-TAXI transmitter 12 to inform the receiving party that this is the beginning of the transmitted frame. Use the special pattern 10. Then, 0 is used for the command signal line for the rest of the frame.

The frame transmission from the G-TAXI transmitter 11 to the G-TAXI transmitter 12 is performed by N division (N = 0, 1, 2, ...) of CLKI, which is a 31.25 MHz clock of the G-TAXI transmitter 12. In the case of N = 0, the transmission speed is synchronized with the clock. The maximum transmission speed of the G-TAXI transmitter 12 is a speed at which frames can be transmitted every CLKI clock. If N is not 0, the frame is transmitted in units of 32 bits for every N CLKI clocks, and the G-TAXI transmitter is transmitted in the interval between N clocks, that is, the period in which no frame is transmitted from the G-TAXI transmitter 11. (12) transmits synchronization data to maintain synchronization with the G-TAXI receiver 16, and the command code at this time is 10101.

Meanwhile, the G-TAXI receiver 16 has a 32-bit data signal line corresponding to the 32-bit data signal line of the G-TAXI transmitter 12 and a 5-bit state corresponding to the 5-bit command signal line of the G-TAXI transmitter 12. The signal line and CLK0, which is a clock of 31.25 MHz, are provided to the G-TAXI receiver 15.

If no error occurs during transmission, the data and command codes used by the G-TAXI transmitter 12 appear on the data and status signal lines of the G-TAXI receiver 16 as they are. The corresponding error code will appear on the status signal line of the G-TAXI receiver 16.

Of course, when the G-TAXI transmitter 11 divides the CLKI clock by N and transmits the frame, the G-TAXI receiver 16 also receives the first 32-bit data of the frame having the status code 10, and then receives the state every N CLK0 clocks. The remaining data of the corresponding frame with code 0 is shown, and the synchronization data with status code 10101 appears between the N CLK0 clocks.

Therefore, the G-TAXI receiving device 15 is also required to have a function of catching the synchronous data appearing between the data as described above.

2 is a state flow diagram according to the present invention, and transmits G-TAXI using CLK0, which is a 31.25Mhz clock of the G-TAXI receiver 16, a 32-bit data signal line, and a 5-bit state signal line under the G-TAXI transmission method. The state flow of the G-TAXI receiving device 15, which receives a frame from the device 11 and writes it to the first-in first-out (FIFO) 14, is shown.

First, the G-TAXI receiver 15 enters a state A waiting for the status code 10101 from the G-TAXI receiver 16 immediately after power-on. This is because reliable communication can be expected only when the synchronization state is maintained between the G-TAXI transmitter 12 and the receiver 16 in order to communicate with each other through the G-TAXI transmission mode. Therefore, the G-TAXI transmitting apparatus 11 must transmit the synchronization data for a predetermined period of time before transmitting the frame immediately after power-on to maintain synchronization with the G-TAXI receiving apparatus 15.

To this end, 10101 is used for the command signal of the G-TAXI transmitter 12.

However, until the voltage supplied to the G-TAXI transmitter 12 reaches a value that ensures normal operation until the G-TAXI transmitter 12 is powered on. Since the status code is a very random value, in this section, the error data is written to the first-in, first-out part 14 by the G-TAXI receiver 15 due to the status code that mimics the normal communication procedure. It may be. In particular, this phenomenon is likely to occur when the G-TAXI transmitter 11 and the G-TAXI receiver 15 are geographically distributed and use mutually independent power systems. That is, the G-TAXI receiver 16 is first powered on and the G-TAXI transmitter 12 is later powered on, so that the G-TAXI receiver 16 is already in a normal state. If the G-TAXI transmitter 12 is waiting for data and the G-TAXI transmitter 12 is unstable after the power-on has not yet reached the normal power state, the normal communication procedure is performed during this period. The simulated status code may be input to the G-TAXI receiver 15 so that the error data may be written to the first-in, first-out part 14.

The normal communication procedure is to keep synchronous data with status code 10101 immediately after power-on for at least a certain period (until the G-TAXI transmitter transmits the first frame after power-on and reaches normal state). After that, the status code is 10, that is, a sequence code indicating the start of the frame, followed by status code 0 indicating the rest of the frame.

Therefore, in order to cope with such a situation, the present invention applies a method of waiting for the status code 10101 to be continuously received during the M CLK0 clock periods in the state A. Here, the value of M is determined by the minimum interval in which the transmitter reaches a steady state immediately after power-on and transmits a status code of 10101. Therefore, in state A, the state code of 10101 must be received continuously for M CLK0 clock periods before it transitions to state B, otherwise state A is maintained. By doing so, it is possible to cope with 10101, which may occur during one or several CLK0 clock periods without full synchronization between the G-TAXI transmitters and receivers 12, 16 immediately after power-up.

State B is a state in which synchronization is secured between the G-TAXI transmitters and receivers 12 and 16, and in this state, a status code 10 is waited to indicate that a frame has been transmitted from the transmitter. If status code 10 is received in this state, the first four octets of data have been received, then transition to state C to receive the rest of the frame. Of course, in this state, the status code 10101 is also valid. This condition code is received since the G-TAXI transmitter 12 continuously synchronizes the G-TAXI transmitter and receiver 12 and 16 without transmitting a frame. Keep state B.

However, when status codes other than these two types are received, the G-TAXI transmitter 12 transitions to different states based on whether at least one frame is received.

First, when no frame is received from the G-TAXI transmitter 12, the G-TAXI transmitter 12 is regarded as a status code generated in the process of power-up and reaches a normal state. Transition

However, if at least one frame has already been received, it may determine that synchronization has been lost between the G-TAXI transmitters and receivers (12, 16), so it transitions to state D and sends this to the system's operation / maintenance function block. After the broadcast, it transitions to state A and waits for a normal procedure from the G-TAXI transmitter 12. When state B receives state code 10, it transitions to state C and writes 32-bit data corresponding to the first-in first-out.

The reception timing of the rest of the frame is determined by the transmission speed of the G-TAXI transmitter 12, that is, the value of N obtained by dividing the CLKI clock by N. In other words, if a state code 10 indicating the first four octets of the frame in state C is received, the rest of the frame is received after N CLO0 clocks from state C. Thus, from state C to state C + 1, state C-2,... , Transition to C + N.

State C + (N-1) is a state that determines whether one frame has been transmitted. If one frame has been transmitted in state C + (N-1), the state transitions to state B and waits for the next frame. Transition to + N. In the state C + N, since the frame is being received, only the status code 0 is valid. When the state code 0 is received, the state C + N transitions to the state C + N. Otherwise, the state C + N transitions to the state D for error processing.

3 is an overall configuration diagram of the present invention, in which the data controller 31 receives the data and the clock 450 from the 32-bit data signal line of the G-TAXI receiver 16, delays the data, and then starts the 32 of the first-in-first-out unit 14. The bit data is transmitted to the first-in first-out section 14 through the input signal line.

The control unit 32 receives the data of the data processing unit 31 input from the G-TAXI receiving unit 16 according to the clock 450 received from the G-TAXI receiving unit 16 and the status code of the 5-bit state signal line. The write signal WEN and the clock, which are signals to be written to the second signal, are supplied to the first-in, first-out part 14, and the fault signal is transmitted to an external operation / maintenance block.

4 is a detailed configuration diagram of the control unit. The transmission state identification unit 41 receives the clock 450 and the state signal from the G-TAXI receiver 16 and receives the frame start signal 10, the data signal 0, and the synchronization signal ( 10101), the state transition unit 42 generates a transmission error signal and outputs it to the state transition unit 42, and receives the output signals and the clock 450 from the G-TAXI receiver 16. After the transition, the state variable is output to the first-in, first-out write signal generator 43, and the fault signal is output to an external operation / maintenance block. The write signal generator 43 receives the state variable from the state transition unit 42 and the clock 450 from the G-TAXI receiver 16 and writes the data to the first-in, first-out unit 14. And a clock are output to the first-in-first-out section 14.

5 is a detailed block diagram of the transmission state identification unit, including five first D-flip flops 51 for latching a 5-bit state signal input from the G-TAXI receiver 16 on the falling edge of the clock 450; It is composed of a logic sum circuit, and receives data from the five first D-flip flops 51 to generate a frame start signal, data, a synchronization signal, and a transmission error signal, thereby generating five second D-flip flops 53. Logical-logical logic circuit 52 for outputting the signal, the output signal of the logical-logical logic circuit 52 and the clock 450 from the G-TAXI receiver 16 receives the latch at the falling edge of the clock transition state 42 Five second D-flip flops (53) to be outputted. The logical-logical circuit 52 inputs five status signals and outputs a frame start signal to 1 when the status signal pattern is 10, and a data signal when the pattern of the status signal is 0. 5-input logical gate that outputs 1 to 1, if the pattern of status signal is 10101, 5-input logic circuit that outputs synchronous signal line to 1 and transmission error data signal when pattern of status signal is other than 10, 0, 10101 The combination circuit which outputs at 1 is provided.

FIG. 6 is a detailed configuration diagram of the state transition unit, and receives N-D flip-flops (N is dependent on the number of states M) by receiving a frame start signal, data, synchronization signal, and transmission error signal from the transmission state identification unit 41. , relational expression M = 2 ^N is 62), the multiplexer 61 and the multiplexer that outputs the state variable to the N D- flip-flop 52 after the multiplexing as a state variable that is input from (61 After receiving and storing the state variable and the clock 450 from the G-TAXI receiver 16, and outputs the state variable to the multiplexer 61, and outputs the state variable to the first-in first-out write signal generator 43 N D-flip flops 62 are provided.

FIG. 7 is a detailed configuration diagram of the first-in, first-out write signal generation unit. The state signal is input from the state transition unit 42 and the clock 450 is input from the G-TAXI receiver 16 to the D-flop flop 72. Outputs a clock, generates a clock to the first-in, first-out unit 14, generates a fault signal, and outputs a write signal from the logical circuit 71 to the external operation / maintenance block. A D-flip flop 72 is provided for outputting a write signal to the first-in, first-out part 14 in synchronization with the clock 450 input from the TAXI receiver 16.

8 is a block diagram of the data processor, and operates on the falling edge of the clock 450 in the controller 32 until a state signal from the G-TAXI receiver 16 is converted into a first-in first-out write signal. Since the D-flip-flop is required to pass through four stages, the 32 bits of the 32-bit data inputted at the same time as the status signal coincide with the first-in, first-out write control signal output from the control unit 32. It must be applied to the first-in, first-out portion 14 via 43 stages of the D-flip flop.

The present invention as described above is applied to a variety of large-capacity system has the effect of ensuring the reliability of the gigabit communication network.

Claims (7)

Data delay means (31) for receiving the data and the first clock from the G-TAXI receiver (16) and delaying them and then outputting them to the first-in, first-out unit (14); And receiving the first clock and the state signal from the G-TAXI receiver 16 and generating a write signal WEN and a second clock, which are signals for writing the data, and outputting the second clock to the first-in, first-out unit 14, A large-capacity asynchronous transceiver matching (G-TAXI) receiver, characterized in that it comprises a control means (32) for generating a fault signal and outputting it to an operation / maintenance block. The apparatus of claim 1, wherein the control unit 32 receives the first clock and the state signal from the G-TAXI receiver 16 and receives a frame start signal 10, a data signal 0, and a synchronization signal 10101. Transmission status identification means (41) for generating and outputting a transmission error signal; According to the frame start signal 10, the data signal 0, the synchronization signal 10101 and the transmission error signal received from the transmission state identification means 41 and the first clock received from the G-TAXI receiver 16 State transition means 42 for outputting a state variable after the state transitions; And a state signal from the state transition means 42 and a first clock from the G-TAXI receiver 16 and a write signal WEN and a second clock for writing the data to the first-in, first-out unit 14. A large-capacity asynchronous transceiver matching (G-TAXI) receiver, comprising: a write signal generating means (43) for outputting. The first latch according to claim 2, wherein the transmission state identification means (41) receives a state signal and a first clock from the G-TAXI receiver 16 and latches on a falling edge of the first clock to output data. Means 51; A signal generating means (52) configured to combine logical and logical sum circuits and to receive data from the first latch means (51) to generate and output a frame start signal, data, synchronization signal, and transmission error signal; And second latch means 53 which receives the frame start signal, the data, the synchronization signal, and the transmission error signal from the signal generating means 52, latches the falling edge of the first clock, and outputs the latched signal to the state transition means 42. Large-capacity asynchronous transceiver matching (G-TAXI) receiving apparatus comprising a. 4. The signal generating means (52) according to claim 3, wherein the signal generating means (52) outputs a frame start signal high when the pattern of the status signal indicates the beginning of the frame ("00010"), and the pattern of the status signal starts the data. Signal is output high ("00000"), and if the signal of the status signal indicates the start of synchronization ("10101"), the synchronization signal is output high, and the pattern of the status signal is the three patterns A high-capacity asynchronous transceiver matching (G-TAXI) receiving apparatus, characterized in that the transmission error data signal is output high when other than ("00010", "00000", "10101"). The method of claim 2, wherein the state transition means 42 multiplexes the state variable by multiplexing the frame start signal, the data, the synchronization signal, and the transmission error signal received from the transmission state identification means 41 according to the input of the state variable. Multiplexing means (61) for outputting; And after receiving the state variable from the multiplexing means 61 and latching the falling edge of the first clock received from the G-TAXI receiver 16, outputting the state variable to the multiplexing means 61 and generating the write signal. And a third latch means (62) for outputting a state variable to the means (43). The write signal generating means 43 receives a state variable from the state transition means 42 and a first clock from the G-TAXI receiver 16, outputs a write signal, and outputs the operation signal. Signal generating means (71) for generating a fault signal to the maintenance block and generating a second clock to the first-in first-out section (14); And third latch means for latching the write signal from the signal generator 71 and the falling edge of the first clock received from the G-TAXI receiver 16 and outputting the write signal to the first-in, first-out unit 14. A large-capacity asynchronous transceiver matching (G-TAXI) receiver, comprising: 72. 2. A large-capacity asynchronous transceiver matching (G-TAXI) receiver according to claim 1, characterized in that the data delay means (31) comprises a multi-stage D-flip flop.