KR0124967Y1 - Fine pattern of semiconductor device - Google Patents
Fine pattern of semiconductor device Download PDFInfo
- Publication number
- KR0124967Y1 KR0124967Y1 KR2019920013439U KR920013439U KR0124967Y1 KR 0124967 Y1 KR0124967 Y1 KR 0124967Y1 KR 2019920013439 U KR2019920013439 U KR 2019920013439U KR 920013439 U KR920013439 U KR 920013439U KR 0124967 Y1 KR0124967 Y1 KR 0124967Y1
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- South Korea
- Prior art keywords
- fine pattern
- semiconductor device
- pattern
- forming
- present
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Preparing Plates And Mask In Photomechanical Process (AREA)
Abstract
본 고안은 미세패턴 형성에 적당하도록 한 반도체 장치의 미세패턴에 관한 것으로, 종래에는 포토마스크 공정시 근접효과에 의해 감광막간에 브릿지가 발생하였으나 본 고안에서는 마스크 패턴의 크롬(3) 중앙에 오픈영역(4)을 형성하므로써 상기 결정을 개선시킬 수 있는 것이다.The present invention relates to a fine pattern of a semiconductor device that is suitable for forming a fine pattern. In the related art, a bridge is generated between photoresist layers due to a proximity effect during a photomask process. By forming 4), the crystal can be improved.
Description
제1도는 종래의 미세페턴을 설명하기 위한 평면도.1 is a plan view for explaining a conventional micropattern.
제2도는 본 고안의 미세패턴을 설명하기 위한 평면도.Figure 2 is a plan view for explaining a fine pattern of the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
3 : 크롬 4 : 오픈영역3: chrome 4: open area
5 : 감광막5: photosensitive film
본 고안은 반도체 장치의 패턴(Pattern)형성에 관한 것으로, 특히 미세패턴 형성에 적당하도록 한 반도체 장치의 미세패턴에 관한 것이다.The present invention relates to the formation of a pattern of a semiconductor device, and more particularly to a fine pattern of a semiconductor device suitable for forming a fine pattern.
종래 0.4㎛급의 미세패턴은 제1a도와 같이 크롬(1)으로 형성된 마스크 패턴(Mask Pattern)을 (b)와 같이 감광막(Photo Resister)(2)으로 포토 마스크(Photo Mask)공정을 한다.In the conventional 0.4 μm-class fine pattern, a mask pattern formed of chromium 1 is subjected to a photo mask process using a photo resist 2 as shown in FIG.
그러나, 이와같은 종래의 기술은 포토 마스크 형성시 근접 효과(Proximty Effect)에 의해 브릿지(Bridge)가 발생하므로 비교적 면적이 큰 감광막(2)이 서로 접속하여 의도한 미세패턴을 얻을 수 없다.However, in this conventional technique, since a bridge is generated due to a proximity effect when forming a photo mask, a photoresist film 2 having a relatively large area is connected to each other to obtain an intended fine pattern.
본 고안은 이와같은 종래의 결점을 감안하여 안출한 것으로, 마스크 패턴의 크롬 중앙에 오픈영역(Open Region)을 형성함으로써 초점 여유(Focus Margin)를 개선할 수 있는 반도체 장치의 미세패턴을 제공하는 데 그 목적이 있다.The present invention has been devised in view of the above-described drawbacks, and provides a micropattern of a semiconductor device that can improve the focus margin by forming an open region in the center of chrome of a mask pattern. The purpose is.
이하에서 이와같은 목적을 달성하기 위한 본 고안의 실시예를 첨부된 도면에 의하여 설명하면 다음과 같다.Hereinafter, described with reference to the accompanying drawings an embodiment of the present invention for achieving the above object.
일반적으로, 근접효과는 광학적인 성질에 의한 현상으로 즉, 마스크 패턴의 크롬 에지(Edge)에서 빛의 산란 현상에 의한 크롬 사이의 강도(Intensity)변화에 따라 나타나는 것으로, 다중 슬릿(Slit)을 갖는 경우 빛의 회전현상에 의해 강도 윤곽(Intensity Profile)에 변화를 준다.In general, the proximity effect is a phenomenon due to optical properties, that is, a change in intensity between chromium due to light scattering at the chrome edge of the mask pattern, and has multiple slits. In this case, the intensity profile is changed by the rotation of light.
제2도는 본 고안의 평면도로, (a)와 같은 마스크 패턴의 크롬(3) 중앙에 약 0.2㎛급 이하로 오픈영역(4)을 형성하므로 근접효과를 줄여 (b)와 같이 포토마스크 작업으로써 감광막(5)을 패터닝한다.2 is a plan view of the present invention, since the open area 4 is formed in the center of the chromium 3 of the mask pattern as shown in (a) below about 0.2 μm, thereby reducing the proximity effect, thereby making the photomask work as in (b) The photosensitive film 5 is patterned.
이상에서 설명한 바와 같이 본 고안은 다음과 같은 효과가 있다.As described above, the present invention has the following effects.
첫째, 마스크패턴의 크롬(3)에 오픈 영역(4)을 형성하므로써 근접효과가 줄며 크롬(3) 사이의 공간부분의 강도가 높아지므로 감광막(5) 간의 브릿지 발생을 억제 할 수 있다.First, by forming the open region 4 in the chrome 3 of the mask pattern, the proximity effect is reduced and the strength of the space portion between the chromium 3 is increased, so that the bridge between the photosensitive films 5 can be suppressed.
둘째, 상기와 같이 브릿지 발생이 개선됨으로써 0.4㎛ 급 장치에서 패턴을 용이하게 할 수 있으며 초점 여유를 크게 할 수 있으므로 패터닝 되는 감광막(5)을 쉽게 조절할 수 있다.Second, as the generation of the bridge is improved as described above, the pattern can be easily made in the 0.4-m class apparatus, and the margin of focus can be increased, so that the patterned photosensitive film 5 can be easily adjusted.
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019920013439U KR0124967Y1 (en) | 1992-07-21 | 1992-07-21 | Fine pattern of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019920013439U KR0124967Y1 (en) | 1992-07-21 | 1992-07-21 | Fine pattern of semiconductor device |
Publications (2)
Publication Number | Publication Date |
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KR940004320U KR940004320U (en) | 1994-02-24 |
KR0124967Y1 true KR0124967Y1 (en) | 1999-02-18 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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KR2019920013439U KR0124967Y1 (en) | 1992-07-21 | 1992-07-21 | Fine pattern of semiconductor device |
Country Status (1)
Country | Link |
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KR (1) | KR0124967Y1 (en) |
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1992
- 1992-07-21 KR KR2019920013439U patent/KR0124967Y1/en not_active IP Right Cessation
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KR940004320U (en) | 1994-02-24 |
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