KR0112074Y1 - Programming circuits - Google Patents
Programming circuits Download PDFInfo
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- KR0112074Y1 KR0112074Y1 KR2019910022682U KR910022682U KR0112074Y1 KR 0112074 Y1 KR0112074 Y1 KR 0112074Y1 KR 2019910022682 U KR2019910022682 U KR 2019910022682U KR 910022682 U KR910022682 U KR 910022682U KR 0112074 Y1 KR0112074 Y1 KR 0112074Y1
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- terminal
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- inverter
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/30—Creation or generation of source code
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- Logic Circuits (AREA)
Abstract
본 고안은 와이어코딩에 따른 프로그래밍회로에 관한 것으로, 종래 와이어코딩에 따른 프로그래밍회로는 한 입력단자에 고전위나 저전위의 두가지 상태밖에 인식하지 못해 코딩을 2n밖에 못하는 문제점이 있었다. 본 고안은 이러한 문제점을 해결하기 위하여 입력상태를 세가지 상태(고전위, 저전위, 오픈)로 정해줌으로서 와이어코딩에 따른 데이타를 3n으로 확장하는데 유용하게 사용되는 것이다.The present invention relates to a programming circuit according to wire coding, and the programming circuit according to the conventional wire coding has only a problem of only 2 n coding because it recognizes only two states of high potential or low potential at one input terminal. In order to solve this problem, the present invention sets the input state into three states (high potential, low potential, open), which is useful for extending data according to wire coding to 3 n .
Description
제1도는 종래 와이어코딩에 따른 프로그래밍회로도1 is a programming circuit diagram according to a conventional wire coding
제2도는 본 고안 와이어코딩에 따른 프로그래밍회로도2 is a programming circuit diagram according to the present invention wire coding
* 도면의 주요 부분에 대한 부호의 설명* Explanation of symbols for the main parts of the drawings
I1 -I4 : 인버터 X1 : 전송게이트I1 -I4: Inverter X1: Transmission Gate
C : 제어단자 D : 내부데이타단자C: Control terminal D: Internal data terminal
SW1 : 선택스위치SW1: Selection switch
본 고안은 와이어코딩에 따른 프로그래밍회로에 관한 것으로. 특히 입력코딩수를 늘려서 데이터를 확장하는데 적당하도록 한 와이어코딩에 따른 프로그래밍회로에 관한 것이다.The present invention relates to a programming circuit according to wire coding. In particular, the present invention relates to a programming circuit according to wire coding that is suitable for expanding data by increasing the number of input codings.
제 1도는 와이어코딩에 따른 프로그래밍회로도로서, 이에 도시된 바와같이 전원단자(VDD)와 접지단자(G)를 선택하는 입력단자(A)를 인버터(I1)의 입력단자에 접속하고, 그 인버터(I1)의 출력단자를 출력단자(B)에 접속하여 구성하였다.FIG. 1 is a programming circuit diagram according to wire coding. As shown therein, an input terminal A for selecting a power supply terminal VDD and a ground terminal G is connected to an input terminal of an inverter I1, and the inverter ( The output terminal of I1) was connected to the output terminal B.
이와같이 구성된 종래 와이어코딩에 따른 프로그래밍회로는 입력단자(A)가 전원단자(VDD)와 접속되면, 인버터(I1)의 입력이 고전위가 입력되므로, 출력단자(B)에는 반전된 저전위가 출력된다. 또한, 입력단자(A)가 접지단자(G)와 접속되면, 인버터(I1)의 입력에 저전위가 입력되므로, 출력단자(B)에는 반전된 고전위가 출력된다. 따라서 입력단자의 코딩방법에는 고전위 또는 저전위 두가지 상태가 입력된다.In the programming circuit according to the conventional wire coding configured as described above, when the input terminal A is connected to the power terminal VDD, the high potential is input to the input of the inverter I1, so that the inverted low potential is output to the output terminal B. do. When the input terminal A is connected to the ground terminal G, since the low potential is input to the input of the inverter I1, the inverted high potential is output to the output terminal B. Therefore, two states of high potential or low potential are input to the coding method of the input terminal.
상기에서 설명한 바와같이 종래 와이어코딩에 따른 프로그래밍회로는 한 입력에 대해 두가지 상태밖에 인식하지 못하기 때문에 코딩방법을 2n 밖에 못하는 문제점이 있었다. 본 고안은 이러한 문제점을 해결하기 위하여 입력상태를 세가지 상태로 정함으로서 데이터를 확장할 수 있는 와이어코딩에 따른 프로그래밍회로를 안출한 것으로, 전원단자(VDD), 오픈단자(O) 및 접지단자(G)를 선택스위치(SW1)로 선택하는 입력단자(A)를 전송게이트(X1) 및 인버터(I3)출력단자(B)에 접속하고, 제어단자(C)를 전송게이트(X1)의 제어단자(g)에 접속함과 아울러, 인버터(I2)를 통해 상기 전송게이트(X1)의 제어단자(g)에 접속하고, 내부데이타단자(D)를 인버터(I4)를 통해 상기 출력단자(B)에 접속하여 구성한다. 이와 같이 구성된 본 고안의 작용 및 효과를 상세히 설명하면 다음과 같다. 입력단자(A)의 선택스위치(SW1)가 전원단자(VDD)와 접속되고, 제어단자(C)에 저전위가 입력되면, 이에따라 전송게이트(X1)가 턴-온 되므로 입력단자(A)의 고전위가 인버터 (I3)에 입력된다. 이에따라 인버터(I3)의 출력에는 저전위가 출력되므로 결국 출력단자(B)에는 저전위가 출력되어진다. 또한 입력단자(A) 선택스위치(SW1)가 접지단자(G)와 접속되고, 제어단자(C)에 저전위가 입력되면, 이에따라 전송게이트(X1)가 턴-온되므로, 입력단자 저전위가 인버터(I3)의 입력단자에 입력된다. 이에따라 인버터(I3)의 출력단자에는 고전위가 출력되므로 따라서 출력단자(B)에는 고전위가 출력되어진다.As described above, the programming circuit according to the conventional wire coding recognizes only two states for one input, which causes a problem of only 2n coding methods. In order to solve this problem, the present invention devised a programming circuit according to wire coding that can extend data by setting the input state to three states, and the power terminal (VDD), the open terminal (O) and the ground terminal (G). Is connected to the transfer gate X1 and the inverter I3 output terminal B, and the control terminal C is connected to the control terminal of the transfer gate X1. g), the inverter I2 is connected to the control terminal g of the transfer gate X1, and the internal data terminal D is connected to the output terminal B through the inverter I4. Connect and configure. Referring to the operation and effects of the present invention configured as described above in detail. When the select switch SW1 of the input terminal A is connected to the power supply terminal VDD and the low potential is input to the control terminal C, the transmission gate X1 is turned on accordingly, so that the input terminal A is turned on. The high potential is input to inverter I3. Accordingly, since the low potential is output to the output of the inverter I3, the low potential is output to the output terminal B. In addition, when the input terminal A selection switch SW1 is connected to the ground terminal G and a low potential is input to the control terminal C, the transfer gate X1 is turned on accordingly, so that the input terminal low potential It is input to the input terminal of the inverter I3. Accordingly, since the high potential is output to the output terminal of the inverter I3, the high potential is output to the output terminal B.
한편, 입력단자(A)의 선택스위치(SW1)가 오픈단자(O)와 접속되면, 제어단자(C)에 관계없이 인버터(I3)의 상태가 고임피던스가 되기 때문에 이때는 내부데이타단자(D)의 상태에 따라 출력단자(B)로 출력된다. 이상에서 설명한 바와같이 본 고안은 입력 단자를 세가지 상태로 정해주므로 해서 와이어코딩에 따른 데이터를 3n 으로 확장하는 유용한 효과가 있다.On the other hand, when the selector switch SW1 of the input terminal A is connected to the open terminal O, the state of the inverter I3 becomes high impedance regardless of the control terminal C. At this time, the internal data terminal D The output terminal B is output according to the state of. As described above, the present invention has a useful effect of extending the data according to wire coding to 3n by setting the input terminal to three states.
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019910022682U KR0112074Y1 (en) | 1991-12-18 | 1991-12-18 | Programming circuits |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019910022682U KR0112074Y1 (en) | 1991-12-18 | 1991-12-18 | Programming circuits |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR930015552U KR930015552U (en) | 1993-07-28 |
| KR0112074Y1 true KR0112074Y1 (en) | 1998-04-08 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR2019910022682U KR0112074Y1 (en) | 1991-12-18 | 1991-12-18 | Programming circuits |
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| Country | Link |
|---|---|
| KR (1) | KR0112074Y1 (en) |
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1991
- 1991-12-18 KR KR2019910022682U patent/KR0112074Y1/en not_active IP Right Cessation
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| Publication number | Publication date |
|---|---|
| KR930015552U (en) | 1993-07-28 |
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