JPWO2022107233A1 - - Google Patents
Info
- Publication number
- JPWO2022107233A1 JPWO2022107233A1 JP2022563298A JP2022563298A JPWO2022107233A1 JP WO2022107233 A1 JPWO2022107233 A1 JP WO2022107233A1 JP 2022563298 A JP2022563298 A JP 2022563298A JP 2022563298 A JP2022563298 A JP 2022563298A JP WO2022107233 A1 JPWO2022107233 A1 JP WO2022107233A1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02455—Group 13/15 materials
- H01L21/02458—Nitrides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02502—Layer structure consisting of two layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02516—Crystal orientation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/0254—Nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/JP2020/042924 WO2022107233A1 (en) | 2020-11-18 | 2020-11-18 | Method for manufacturing transistor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPWO2022107233A1 true JPWO2022107233A1 (en) | 2022-05-27 |
Family
ID=81708540
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2022563298A Pending JPWO2022107233A1 (en) | 2020-11-18 | 2020-11-18 |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JPWO2022107233A1 (en) |
| WO (1) | WO2022107233A1 (en) |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2875338B1 (en) * | 2004-09-13 | 2007-01-05 | Picogiga Internat Soc Par Acti | METHOD FOR PRODUCING PIEZOELECTRIC HEMT STRUCTURES WITH NO ZERO ALLOYS |
| US8710511B2 (en) * | 2011-07-29 | 2014-04-29 | Northrop Grumman Systems Corporation | AIN buffer N-polar GaN HEMT profile |
| JP2014216540A (en) * | 2013-04-26 | 2014-11-17 | 東京エレクトロン株式会社 | Method for cleaning film-forming device and film-forming device |
| JP2020136683A (en) * | 2019-02-21 | 2020-08-31 | 国立大学法人山口大学 | Semiconductor device and manufacturing method thereof |
-
2020
- 2020-11-18 WO PCT/JP2020/042924 patent/WO2022107233A1/en active Application Filing
- 2020-11-18 JP JP2022563298A patent/JPWO2022107233A1/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| WO2022107233A1 (en) | 2022-05-27 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20230227 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20240423 |