JPWO2022055730A5 - - Google Patents

Claims (18)

forming a plasma of silicon-containing precursor;
depositing a flowable film on a semiconductor substrate using the silicon-containing precursor plasma output, the semiconductor substrate being contained within a processing region of a semiconductor processing chamber; depositing a flowable film, the processing region being at least partially defined between a face plate and a substrate support on which the semiconductor substrate is mounted;
forming a processing plasma within the processing region of the semiconductor processing chamber, the processing plasma being formed at a first power level from a first power source and at a second power level at the substrate support from a second power source; forming a treatment plasma, wherein a power level of
densifying the flowable film within the feature defined within the semiconductor substrate using plasma emissions of the processing plasma , wherein the second power source is configured to generate pulses of about 1 kHz or less. A processing method that operates in frequency pulse mode . The semiconductor processing chamber is part of a semiconductor processing system, the semiconductor processing system comprising:
A chamber body;
a pedestal configured to support a semiconductor substrate;
a face plate, the chamber body, the pedestal, and the face plate defining the processing region;
a high frequency plasma source connected to the face plate, the high frequency plasma source being the first power source;
The processing method according to claim 1, further comprising: a low frequency plasma source connected to the pedestal, the low frequency plasma source being the second power source. a first LC filter connected to the pedestal and configured to substantially ground the high frequency plasma source through the pedestal;
3. The processing method of claim 2, further comprising a second LC filter connected to the face plate and configured to substantially ground the low frequency plasma source to the chamber body. 2. The processing method of claim 1 , wherein the first power source operates in continuous wave mode during the processing plasma, while the second power source operates in the pulsed mode. 2. The processing method of claim 1 , wherein the second power source operates at a duty cycle of about 50% or less. 2. The processing method of claim 1, wherein the first power source is operative to generate a power spike within a first period during the deposition. 7. The processing method of claim 6 , wherein following the first period, the first power source is operated for a second period during the deposition. 8. The processing method of claim 7 , wherein the first time period is about 1 second or less and the second time period is about 1 second or more. 9. The processing method of claim 8 , wherein the first power source operates at a pulse frequency of about 200 kHz or less, with a duty cycle of about 20% or less, and produces an effective plasma power of about 10 W or less. A processing method according to claim 1, wherein the processing method is repeated in a second cycle. 2. The processing method of claim 1, wherein the temperature of the semiconductor substrate is maintained at a temperature of about 0<0>C or less during the processing method. A chamber body;
a pedestal configured to support a semiconductor substrate;
a face plate, the chamber body, the pedestal, and the face plate defining a processing region;
a high frequency plasma source connected to the face plate;
a low frequency plasma source connected to the pedestal , the low frequency plasma source configured to operate at a pulse frequency of about 1 kHz or less . The pedestal includes an electrostatic chuck, and the semiconductor processing system includes:
13. The semiconductor processing system of claim 12 , further comprising a DC power source connected to the pedestal. 13. The semiconductor processing system of claim 12 , wherein the radio frequency plasma source is configured to operate at a pulse frequency of about 200 kHz or less and at about 13.56 MHz or higher. 15. The semiconductor processing system of claim 14 , wherein the radio frequency plasma source is configured to operate at a pulse frequency of about 20 kHz or less with a duty cycle of about 20% or less. 16. The semiconductor processing system of claim 15 , wherein the radio frequency plasma source is configured to generate a plasma with an effective power of about 5 W or less. 13. The semiconductor processing system of claim 12 , further comprising a first LC filter connected to the pedestal and configured to substantially ground the radio frequency plasma source through the pedestal. 18. The semiconductor processing system of claim 17 , further comprising a second LC filter connected to the faceplate and configured to substantially ground the low frequency plasma source to the chamber body.