JPWO2022024562A1 - - Google Patents

Info

Publication number
JPWO2022024562A1
JPWO2022024562A1 JP2022540050A JP2022540050A JPWO2022024562A1 JP WO2022024562 A1 JPWO2022024562 A1 JP WO2022024562A1 JP 2022540050 A JP2022540050 A JP 2022540050A JP 2022540050 A JP2022540050 A JP 2022540050A JP WO2022024562 A1 JPWO2022024562 A1 JP WO2022024562A1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2022540050A
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPWO2022024562A1 publication Critical patent/JPWO2022024562A1/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0207—Addressing or allocation; Relocation with multidimensional access, e.g. row/column, matrix
JP2022540050A 2020-07-30 2021-06-11 Pending JPWO2022024562A1 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2020129496 2020-07-30
PCT/JP2021/022269 WO2022024562A1 (ja) 2020-07-30 2021-06-11 並列分散計算システム

Publications (1)

Publication Number Publication Date
JPWO2022024562A1 true JPWO2022024562A1 (ja) 2022-02-03

Family

ID=80035392

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2022540050A Pending JPWO2022024562A1 (ja) 2020-07-30 2021-06-11

Country Status (4)

Country Link
US (1) US20230315647A1 (ja)
EP (1) EP4170508A1 (ja)
JP (1) JPWO2022024562A1 (ja)
WO (1) WO2022024562A1 (ja)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH064363A (ja) * 1992-06-22 1994-01-14 Nec Corp セッション状態ログ採取装置

Also Published As

Publication number Publication date
US20230315647A1 (en) 2023-10-05
WO2022024562A1 (ja) 2022-02-03
EP4170508A1 (en) 2023-04-26

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Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20231227