JPWO2021095634A1 - - Google Patents

Info

Publication number
JPWO2021095634A1
JPWO2021095634A1 JP2021556056A JP2021556056A JPWO2021095634A1 JP WO2021095634 A1 JPWO2021095634 A1 JP WO2021095634A1 JP 2021556056 A JP2021556056 A JP 2021556056A JP 2021556056 A JP2021556056 A JP 2021556056A JP WO2021095634 A1 JPWO2021095634 A1 JP WO2021095634A1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2021556056A
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPWO2021095634A1 publication Critical patent/JPWO2021095634A1/ja
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01KMEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
    • G01K7/00Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements
    • G01K7/16Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using resistive elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B3/00Ohmic-resistance heating
JP2021556056A 2019-11-12 2020-11-05 Pending JPWO2021095634A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2019204806 2019-11-12
PCT/JP2020/041348 WO2021095634A1 (en) 2019-11-12 2020-11-05 Semiconductor device

Publications (1)

Publication Number Publication Date
JPWO2021095634A1 true JPWO2021095634A1 (en) 2021-05-20

Family

ID=75912902

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2021556056A Pending JPWO2021095634A1 (en) 2019-11-12 2020-11-05

Country Status (2)

Country Link
JP (1) JPWO2021095634A1 (en)
WO (1) WO2021095634A1 (en)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005078399A1 (en) * 2004-02-16 2005-08-25 Matsushita Electric Industrial Co., Ltd. Infrared imaging element
KR100825760B1 (en) * 2006-06-02 2008-04-29 한국전자통신연구원 Abrupt metal-insulator transitionMIT device, MIT sensor using the same abrupt MIT device, and alarming apparatus and secondary battery anti-explosion circuit comprising the same MIT sensor
JP2011216768A (en) * 2010-04-01 2011-10-27 Elpida Memory Inc Semiconductor device, and method of manufacturing the same

Also Published As

Publication number Publication date
WO2021095634A1 (en) 2021-05-20

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