JPWO2020240311A1 - - Google Patents
Info
- Publication number
- JPWO2020240311A1 JPWO2020240311A1 JP2021523120A JP2021523120A JPWO2020240311A1 JP WO2020240311 A1 JPWO2020240311 A1 JP WO2020240311A1 JP 2021523120 A JP2021523120 A JP 2021523120A JP 2021523120 A JP2021523120 A JP 2021523120A JP WO2020240311 A1 JPWO2020240311 A1 JP WO2020240311A1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
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- Engineering & Computer Science (AREA)
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- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
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- Thin Film Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
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JP2019097502 | 2019-05-24 | ||
JP2019100889 | 2019-05-30 | ||
JP2019102131 | 2019-05-31 | ||
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PCT/IB2020/054412 WO2020240311A1 (ja) | 2019-05-24 | 2020-05-11 | 半導体装置および電子機器 |
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JPWO2020240311A1 true JPWO2020240311A1 (ja) | 2020-12-03 |
JPWO2020240311A5 JPWO2020240311A5 (ja) | 2023-05-17 |
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US11984508B2 (en) * | 2021-02-24 | 2024-05-14 | Taiwan Semiconductor Manufacturing Company Limited | Thin film transistor including a compositionally-modulated active region and methods for forming the same |
US20220328699A1 (en) * | 2021-04-09 | 2022-10-13 | Taiwan Semiconductor Manufacturing Company Limited | Thin film transistor including a compositionally-modulated active region and methods for forming the same |
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KR20150104518A (ko) * | 2014-03-05 | 2015-09-15 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 레벨 시프터 회로 |
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- 2020-05-11 WO PCT/IB2020/054412 patent/WO2020240311A1/ja active Application Filing
- 2020-05-11 US US17/611,933 patent/US20220231131A1/en active Pending
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WO2020240311A1 (ja) | 2020-12-03 |
US20220231131A1 (en) | 2022-07-21 |
CN113875152A (zh) | 2021-12-31 |
KR20220012268A (ko) | 2022-02-03 |
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