JPWO2018146579A1 - Photoelectric conversion element, imaging device, electronic device, and method for manufacturing photoelectric conversion element - Google Patents

Abstract

Provided is a photoelectric conversion element which has a small film peeling region and has uniform crystalline selenium. A first electrode (411), a second electrode (415), and a photoelectric conversion layer (413) provided between the first electrode (411) and the second electrode (415); The conversion layer (413) has selenium and the element X, and the element X is at least one selected from silver or bismuth. The photoelectric conversion layer (413) has a ratio (X / Se) is a photoelectric conversion element having a region of 0.0010 or more and 0.70 or less.

Description

One embodiment of the present invention relates to a photoelectric conversion element, an imaging device, and an electronic device.

Note that one embodiment of the present invention is not limited to the above technical field. The technical field of one embodiment of the present invention disclosed in this specification and the like relates to an object, a method, or a manufacturing method. Alternatively, one embodiment of the present invention relates to a process, a machine, a manufacturer, or a composition (composition of matter). Therefore, the technical field of one embodiment of the present invention disclosed in this specification more specifically includes a semiconductor device, a display device, a liquid crystal display device, a light-emitting device, a lighting device, a power storage device, a storage device, an imaging device, An operation method or a manufacturing method thereof can be given as an example.

Note that a semiconductor device in this specification and the like refers to any device that can function by utilizing semiconductor characteristics. A transistor and a semiconductor circuit are one embodiment of a semiconductor device. Further, the storage device, the display device, the imaging device, and the electronic device sometimes include a semiconductor device.

In recent years, there has been an increasing demand for a high-resolution CMOS (complementary metal oxide semiconductor) image sensor in order to realize a high-resolution camera that produces high-resolution video used for high-resolution television broadcasting beyond high-definition television. As the resolution increases, an image sensor requires a pixel array integrated at a high density, and in order to integrate the pixels at a high density, the area per pixel must be reduced.

When the area of a pixel is reduced, the area of the light receiving portion of the photoelectric conversion element included in the pixel has to be reduced. When the area of the light receiving portion of the photoelectric conversion element is reduced, the sensitivity to light is reduced, so that it may be difficult to perform imaging under low illuminance.

In order to solve such a problem, it is effective to use a photoelectric conversion element utilizing a charge amplification effect by an avalanche phenomenon. In particular, selenium having a high extinction coefficient has attracted attention as a material used for a photoelectric conversion layer of a photoelectric conversion element. Further, crystalline selenium has high sensitivity characteristics in a wide wavelength region in the visible light region, and is particularly useful because it is thermally stable (Patent Document 1, Non-Patent Document 1, Non-Patent Document 2).

As a method for forming a photoelectric conversion layer using crystalline selenium, a method of forming amorphous selenium on a substrate, forming a film such as an electrode thereon, and then crystallizing the amorphous selenium is considered. However, when the amorphous selenium is crystallized by the heat treatment, a film peeling region may be generated, and there is a problem that uniform and high-quality crystalline selenium cannot be obtained. To solve the problem, it has been proposed to select an appropriate heating method and temperature (Patent Document 2).

As a method of forming a photoelectric conversion layer using crystalline selenium, a method of crystallizing amorphous selenium formed on a tellurium film by heat treatment is known (Non-Patent Document 3).

In addition, a technique for forming a transistor using an oxide semiconductor thin film formed over a substrate has attracted attention. For example, Patent Document 3 discloses an imaging device in which a transistor including an oxide semiconductor and having extremely low off-state current is used for a pixel circuit.

JP 2014-17440 A JP 2014-216502 A JP 2011-119711 A

S. Imura et al. , "Low-Voltage-Operation Avalanche Photodiode Based on on-Gallium Oxide / p-Crystalline Selenium Heterojunction," Appl. Phys. Lett. , 104,24, pp. 242101-1-242101-4, 2014 S. Imura et al. , "High Sensitivity Image Sensor Overlaid with Thin-Film Crystalline-Selenium-based Heterojunction Photodiode," International Electronics Departure. 88-91, Dec. 2014 T. Nakada, A .; Kunika: "Efficient ITO / Se Heterojunction Solar Cells", Japane Journal of Applied. Physics, 1984, vol. 23, no. 8, pp. L587-L589

To increase the resolution of an image sensor, it is necessary to reduce the area per pixel. Since the reduction in the pixel area is accompanied by the reduction in the light receiving area of the photoelectric conversion element, the light sensitivity is reduced. In particular, in imaging under low illuminance, the S / N ratio of imaging data may be significantly reduced. That is, in the image sensor having the conventional configuration, there is a problem that the resolution and the sensitivity have a trade-off relationship.

One solution to the above problem is to use a photoelectric conversion element utilizing an avalanche multiplication effect with high photosensitivity.

In the case where crystalline selenium is used for the photoelectric conversion layer, when amorphous selenium is crystallized by heat treatment, a film peeling region may be generated due to aggregation of selenium accompanying the crystallization. The presence of a film peeling region may cause variations in the characteristics of the photoelectric conversion layer. Further, in an imaging device having a high resolution, since the area per pixel is small and the area occupied by the photoelectric conversion element is small, the influence of variation caused by one photoelectric conversion element is relatively large. In other words, this causes a variation in the photoelectric conversion elements of each pixel, which causes a problem in that the imaging performance of the imaging device is reduced.

In view of the above, an object of one embodiment of the present invention is to provide a photoelectric conversion element with high photosensitivity. Another object is to provide a photoelectric conversion element having uniform crystalline selenium in which a film peeling region is small. Another object is to provide an imaging device with less variation in characteristics. Another object is to provide a method for manufacturing a photoelectric conversion element including uniform crystalline selenium, in which a film peeling region is small. Another object is to provide a method for manufacturing an imaging device with less variation in characteristics. Another object is to provide an imaging device which can easily perform imaging under low illuminance. Another object is to provide an imaging device with low power consumption. Another object is to provide an imaging device with high resolution. Another object is to provide a highly reliable imaging device. Another object is to provide a novel imaging device. Another object is to provide a novel method for manufacturing an imaging device. Another object is to provide a novel semiconductor device or the like.

Note that the description of these objects does not disturb the existence of other objects. Note that one embodiment of the present invention does not need to solve all of these problems. It should be noted that issues other than these are naturally evident from the description of the specification, drawings, claims, etc., and that other issues can be extracted from the description of the specifications, drawings, claims, etc. It is.

One embodiment of the present invention includes a first electrode, a second electrode, and a photoelectric conversion layer provided between the first electrode and the second electrode, wherein the photoelectric conversion layer contains selenium and the element X. The element X is a photoelectric conversion element that is at least one selected from silver, bismuth, indium, tin, and tellurium.

In the above-described photoelectric conversion layer, it is preferable that a ratio of the number of atoms of the element X to the number of atoms of selenium (X / Se) be 0.0010 or more and 0.70 or less.

Further, in the above-mentioned photoelectric conversion element, it is more preferable that the above-mentioned element X is one or more of silver and bismuth.

One embodiment of the present invention includes a first electrode, a second electrode, and a photoelectric conversion layer provided between the first electrode and the second electrode, wherein the photoelectric conversion layer includes crystalline selenium. A photoelectric conversion element having a stack of a layer and an amorphous selenium layer.

One embodiment of the present invention includes a first electrode, a second electrode, a hole injection blocking layer, and a photoelectric conversion layer, wherein the hole injection blocking layer includes the second electrode and the photoelectric conversion layer. And the photoelectric conversion layer is provided between the first electrode and the hole injection blocking layer, the hole injection blocking layer and the photoelectric conversion layer have a region in contact with each other, The electrode has a light-transmitting property, the hole injection blocking layer has an oxide containing indium and gallium, and the photoelectric conversion layer has a stack of a crystalline selenium layer and an amorphous selenium layer. Element.

In the above photoelectric conversion layer, the amorphous selenium layer preferably has a region in contact with the hole injection blocking layer.

In the above-described photoelectric conversion layer, the crystalline selenium layer is preferably thinner than the amorphous selenium layer.

In the above-described photoelectric conversion layer, the thickness tn of the hole injection blocking layer is preferably from 5 nm to 20 nm.

In the above-described photoelectric conversion layer, an alloy layer of silver and selenium is preferably provided between the photoelectric conversion layer and the first electrode.

In the above-described photoelectric conversion layer, a crystalline selenium layer is preferably provided between the silver and selenium alloy layer and the first electrode.

One embodiment of the present invention is an imaging device in which a pixel includes the above-described photoelectric conversion element and a transistor including a metal oxide in a semiconductor layer.

In the above imaging device, the metal oxide preferably includes In, Zn, and M (M is Al, Ti, Ga, Sn, Y, Zr, La, Ce, Nd, or Hf).

One embodiment of the present invention is an electronic device including the above-described imaging device and a display device.

According to one embodiment of the present invention, a step of providing a base layer containing an element X over a first electrode, a step of heating the base layer to form a layer containing selenium over the base layer, And a step of providing a second electrode, wherein the element X is at least one selected from silver, bismuth, indium, tin, and tellurium.

One embodiment of the present invention includes a step of heating the first electrode to provide a layer containing selenium and the element X over the first electrode, and providing a second electrode over the layer containing selenium and the element X. And X is a method for producing a photoelectric conversion element in which the element X is at least one selected from silver, bismuth, indium, tin, and tellurium.

In the above method for manufacturing a photoelectric conversion element, the heating temperature is preferably higher than or equal to 50 ° C and lower than or equal to 90 ° C.

One embodiment of the present invention includes a step of providing a base layer having an element X over a first electrode, a step of providing a layer having selenium over the base layer, and a step of performing a first heat treatment on the layer having selenium. Performing a second heat treatment at a higher temperature than the first heat treatment to form a layer containing crystalline selenium, and providing a second electrode over the layer containing crystalline selenium. X is a method for manufacturing a photoelectric conversion element that is at least one selected from silver, bismuth, indium, tin, and tellurium.

One embodiment of the present invention includes a step of providing a layer containing selenium over a first electrode; a step of providing a base layer containing an element X over a layer containing selenium; Performing a second heat treatment at a higher temperature than the first heat treatment to form a layer containing crystalline selenium, and providing a second electrode over the layer containing crystalline selenium. The element X is a method for manufacturing a photoelectric conversion element in which the element X is at least one selected from silver, bismuth, indium, tin, and tellurium.

In the above-described method for manufacturing a photoelectric conversion element, the first heat treatment is preferably performed at higher than or equal to 50 ° C. and lower than or equal to 90 ° C .; .

In the above-described method for manufacturing a photoelectric conversion element, the element X is more preferably one or more of silver and bismuth.

According to one embodiment of the present invention, a photoelectric conversion element with high photosensitivity can be provided. Alternatively, a photoelectric conversion element having uniform crystalline selenium with a small film peeling region can be provided. Alternatively, an imaging device with less variation in characteristics can be provided. Alternatively, it is possible to provide a method for manufacturing a photoelectric conversion element having uniform crystalline selenium, in which a film peeling region is small. Alternatively, it is possible to provide a method for manufacturing an imaging device with less variation in characteristics. Alternatively, it is possible to provide an imaging device that can easily perform imaging under low illuminance. Alternatively, an imaging device with low power consumption can be provided. Alternatively, an imaging device with high resolution can be provided. Alternatively, a highly reliable imaging device can be provided. Alternatively, a novel imaging device can be provided. Alternatively, a novel method for manufacturing an imaging device can be provided. Alternatively, a new semiconductor device or the like can be provided.

Note that one embodiment of the present invention is not limited to these effects. For example, one embodiment of the present invention may have an effect other than the above effects depending on the case or the situation. Alternatively, for example, one embodiment of the present invention does not have these effects in some cases or in some circumstances.

FIG. 4 is a cross-sectional view illustrating a structure of a photoelectric conversion element. 5A to 5C are cross-sectional views illustrating a method for manufacturing a photoelectric conversion element. 5A to 5C are cross-sectional views illustrating a method for manufacturing a photoelectric conversion element. 5A to 5C are cross-sectional views illustrating a method for manufacturing a photoelectric conversion element. 5A to 5C are cross-sectional views illustrating a method for manufacturing a photoelectric conversion element. 5A to 5C are cross-sectional views illustrating a method for manufacturing a photoelectric conversion element. 5A to 5C are cross-sectional views illustrating a method for manufacturing a photoelectric conversion element. FIG. 4 illustrates a structure of a photoelectric conversion element. FIG. 4 illustrates a structure of a photoelectric conversion element. Sectional STEM image of the selenium layer. FIG. 4 illustrates electric characteristics of a photoelectric conversion element. FIG. 4 illustrates a band structure of a photoelectric conversion element. FIG. 4 illustrates electric characteristics of a photoelectric conversion element. FIG. 4 illustrates electric characteristics of a photoelectric conversion element. FIG. 4 illustrates a band structure of a photoelectric conversion element. FIG. 4 illustrates a pixel circuit. 9 is a timing chart illustrating an operation of imaging. FIG. 2 illustrates a configuration of an imaging device. FIG. 2 is a block diagram of an imaging device. FIG. 2 is a cross-sectional view illustrating a configuration of an imaging device. FIG. 2 is a cross-sectional view illustrating a configuration of an imaging device. FIG. 2 is a cross-sectional view illustrating a configuration of an imaging device. 2A and 2B are a perspective view and a cross-sectional view of a package containing an imaging device. 2A and 2B are a perspective view and a cross-sectional view of a package containing an imaging device. 7A to 7C illustrate electronic devices. FIG. 4 is a cross-sectional view illustrating samples of Example 1 and Example 2. 2 is an XRD spectrum according to Example 1. 2 is an XRD spectrum according to Example 1. 2 is an XRD spectrum according to Example 1. 2 is an XRD spectrum according to Example 1. 2 is an XRD spectrum according to Example 1. 2 is an XRD spectrum according to Example 1. 2 is an XRD spectrum according to Example 1. 2 is a planar SEM image according to the first embodiment. 2 is a planar SEM image according to the first embodiment. 2 is a planar SEM image according to the first embodiment. 2 is a planar SEM image according to the first embodiment. 9 is an XRD spectrum according to Example 2. 9 is an XRD spectrum according to Example 2. 9 is an XRD spectrum according to Example 2. 9 is an XRD spectrum according to Example 2. 9 is a planar SEM image according to Example 2. FIG. 7 is a cross-sectional view illustrating a sample of Example 3. 9 is an XRD spectrum according to Example 3. 9 is an XRD spectrum according to Example 3. 9 is a planar SEM image according to Example 3. 13 is a cross-sectional STEM image according to Example 3. 13 is a cross-sectional STEM image according to Example 3. 13 is a cross-sectional STEM image according to Example 3. 13 is a cross-sectional STEM image according to Example 3. 13 is a cross-sectional STEM image according to Example 3. 13 is a cross-sectional STEM image according to Example 3. 13 is a cross-sectional STEM image according to Example 3. 13 is a cross-sectional STEM image according to Example 3. 13 is a cross-sectional STEM image according to Example 3. 13 is a cross-sectional STEM image according to Example 3. 13 is a cross-sectional STEM image according to Example 3. 13 is a cross-sectional STEM image according to Example 3. 13 is a cross-sectional STEM image according to Example 3. 9 is an EDX spectrum according to Example 3. 13 is a cross-sectional STEM image according to Example 3. 9 is an EDX spectrum according to Example 3. 13 is a cross-sectional STEM image according to Example 3. 9 is an EDX spectrum according to Example 3. FIG. 9 is a diagram illustrating Ag / Se according to a third embodiment.

Embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it is easily understood by those skilled in the art that the form and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention is not construed as being limited to the description of the embodiments below. Note that in the structures of the invention described below, the same portions or portions having similar functions are denoted by the same reference numerals in different drawings, and description thereof is not repeated in some cases. In addition, the hatching of the same element which comprises a figure may be suitably omitted or changed between different drawings.

The ordinal numbers given as the first and second numbers are used for convenience, and do not indicate the order of steps or the order of lamination. Therefore, for example, the description can be made by appropriately replacing “first” with “second” or “third”. In addition, ordinal numbers described in this specification and the like do not always coincide with ordinal numbers used for specifying one embodiment of the present invention.

Note that the word “film” and the word “layer” can be interchanged with each other depending on the case or the situation. For example, in some cases, the term “conductive layer” can be changed to the term “conductive film”. Alternatively, for example, the term “insulating film” may be changed to the term “insulating layer” in some cases.

(Embodiment 1)
In this embodiment, a photoelectric conversion element 10 which is one embodiment of the present invention will be described with reference to drawings.

<Example of configuration of photoelectric conversion element 10>
FIG. 1A is a schematic view of a cross-sectional structure of a photoelectric conversion element 10 according to one embodiment of the present invention. The photoelectric conversion element 10 includes a first electrode 411, a photoelectric conversion layer 413 over the first electrode 411, and a second electrode 415 over the photoelectric conversion layer 413.

As illustrated in FIG. 1B, the photoelectric conversion element 10 according to one embodiment of the present invention includes the hole injection blocking layer 417 between the photoelectric conversion layer 413 and the second electrode 415. Good. As illustrated in FIG. 1C, the photoelectric conversion element 10 according to one embodiment of the present invention may include an electron-injection blocking layer 419 between the photoelectric conversion layer 413 and the first electrode 411. . The photoelectric conversion element 10 according to one embodiment of the present invention may include a hole injection blocking layer 417 and an electron injection blocking layer 419, as illustrated in FIG.

The photoelectric conversion element 10 may be formed over a substrate, or may be formed over a driving transistor formed over the substrate or over the substrate.

<Components of photoelectric conversion element 10>
Hereinafter, each element of the photoelectric conversion element according to one embodiment of the present invention will be described.

[Photoelectric conversion layer 413]
The photoelectric conversion layer 413 will be described. A selenium-based material can be used for the photoelectric conversion layer 413. A photoelectric conversion element using a selenium-based material has high internal quantum efficiency for visible light. In the photoelectric conversion element, the photoelectric conversion efficiency can be increased by amplifying the carriers generated by the incident light by using the charge amplification effect by the avalanche phenomenon. A photodiode using avalanche amplification may be called an avalanche photodiode (APD). In addition, since the selenium-based material has a high light absorption coefficient, it has an advantage in production such that a photoelectric conversion layer can be formed using a thin film. The thin film of a selenium-based material can be formed by a vacuum evaporation method, a sputtering method, or the like. Note that in this specification and the like, the photoelectric conversion layer may be referred to as a p-type semiconductor layer.

It is preferable to use crystalline selenium for the photoelectric conversion layer 413. Selenium can be classified into single-crystal selenium, polycrystalline selenium, microcrystalline selenium, amorphous selenium (amorphous selenium), and the like according to its crystallinity. In this specification and the like, crystalline selenium refers to selenium having crystallinity, for example, single-crystal selenium, polycrystalline selenium, and microcrystalline selenium. Alternatively, selenium in which crystalline selenium and amorphous selenium are mixed may be used. Note that in this specification and the like, having crystallinity may be referred to as crystalline.

Compared to silicon and amorphous selenium, crystalline selenium has a higher absorption coefficient over the entire visible light wavelength range, so that the film thickness can be reduced. By reducing the film thickness, a high electric field can be applied. In addition, crystalline selenium generates avalanche amplification at a low voltage, and has high photosensitivity. Therefore, a photoelectric conversion element including crystalline selenium in the photoelectric conversion layer 413 has high sensitivity and is suitable for imaging in a low-illuminance environment. Further, it is preferable because it can be operated at a low voltage.

To confirm the crystallinity of selenium included in the photoelectric conversion layer 413, X-ray diffraction (XRD), electron diffraction (ED), transmission electron microscopy (TEM) images, For example, a scanning transmission electron microscope (STEM) image can be used.

The photoelectric conversion layer 413 which is one embodiment of the present invention contains selenium and the element X. Element X is at least one selected from silver, bismuth, indium, tin, and tellurium. The photoelectric conversion layer 413 preferably has a region where the ratio of the atomic concentration of the element X to the atomic concentration of selenium (X / Se) is 0.0010 or more and 0.70 or less. Further, the photoelectric conversion layer 413 preferably has a region where X / Se is 0.0030 or more and 0.50 or less. Further, the photoelectric conversion layer 413 preferably has a region where X / Se is 0.0050 or more and 0.30 or less. By setting the range of X / Se as described above, the photoelectric conversion layer 413 having uniform crystalline selenium with a small film peeling region can be manufactured. In addition, by using the photoelectric conversion layer 413 having a small amount of film peeling region and having uniform crystalline selenium, an imaging device with small variation in characteristics can be manufactured. When two or more elements are used as the element X, the sum of their atomic concentrations may be used as X.

In order to confirm the atomic concentrations of selenium and the element X in the photoelectric conversion layer 413, energy dispersive X-ray analysis (EDX) and secondary ion mass analysis (SIMS) are used.
spectrometry), time-of-flight secondary ion mass spectrometry (ToF-SIMS), X-ray photoelectron spectroscopy (XPS: Xray Photoelectron Spectroscopy), and X-ray photoelectron spectroscopy.
Spectroscopy, Electron Energy Loss Spectroscopy (EELS), and the like can be used.

In this specification and the like, “the ratio of atomic concentrations” and “the ratio of the number of atoms” are synonymous, and the “ratio of the atomic concentrations” can be replaced with the “ratio of the number of atoms”. That is, the value of X / Se is the ratio of the atomic concentration of the element X to the atomic concentration of selenium, and it can be said that it is the ratio of the number of atoms of the element X to the number of selenium.

[First electrode 411]
The first electrode 411 will be described. For the first electrode 411, for example, gold, titanium nitride, molybdenum, tungsten, aluminum, titanium, or the like can be used. Further, for example, a stack in which aluminum is sandwiched between titanium can be used. The first electrode 411 can be formed by a sputtering method or a plasma CVD method. Note that the first electrode 411 may be formed over a substrate, or may be formed over a driving transistor formed over the substrate or over the substrate.

In addition, the first electrode 411 illustrated in FIGS. 1A to 1D has a flat surface to prevent a short circuit with the second electrode 415 due to poor coverage of the photoelectric conversion layer 413 or the like. High is preferred. The high flatness of the first electrode 411 also contributes to improvement in flatness of the upper surface of the photoelectric conversion layer 413.

Examples of the conductive film having high flatness include an indium tin oxide film containing 1 to 20 wt% of silicon oxide.

The flatness can be confirmed by observation with an atomic force microscope (AFM), a scanning electron microscope (SEM), or the like.

Even if the indium tin oxide film is amorphous at the time of film formation, it crystallizes at a relatively low temperature, so that surface roughness due to crystal grain growth is likely to occur. On the other hand, the indium tin oxide film containing silicon does not show any crystallinity in X-ray diffraction (XRD) analysis even after heat treatment at a temperature higher than 400 ° C. That is, the indium tin oxide film containing silicon maintains an amorphous state even when heat treatment is performed at a relatively high temperature. Therefore, the surface roughness of the indium tin oxide film containing silicon hardly occurs.

[Second electrode 415]
The second electrode 415 will be described. The second electrode 415 includes, for example, indium-tin oxide (ITO), indium-tin oxide containing silicon, indium oxide containing zinc, zinc oxide, zinc oxide containing gallium, zinc oxide containing aluminum, and tin oxide. Although tin oxide containing fluorine, tin oxide containing antimony, graphene, or the like can be used, indium-tin oxide and indium-tin oxide containing silicon are particularly preferable. The second electrode 415 is not limited to a single layer and may be a stack of different films. Note that indium-tin oxide has In, Sn, and O.

The second electrode 415 preferably has high light transmittance so that light reaches the photoelectric conversion layer 413. Note that by increasing the light transmittance of the second electrode 415, an imaging device with high definition can be provided. Specifically, in order to obtain a high-definition imaging device, it is preferable to arrange many pixels. For example, when capturing a 2K video, 1920 × 1080 or more pixels are captured, when capturing a 4K video, 3840 × 2160 or more pixels are captured, and when capturing an 8K video, 7680 × 4320 pixels are captured. It is preferable to provide at least two pixels. In particular, in an 8K imaging apparatus, the area occupied by one pixel is extremely small, and the area that can be used for light reception is extremely small, so that light transmittance becomes more important. The second electrode 415 can be formed over the photoelectric conversion layer 413 by a sputtering method or a plasma CVD method.

[Hole injection blocking layer 417]
As shown in FIGS. 1B and 1D, the photoelectric conversion element 10 according to one embodiment of the present invention further includes a hole injection blocking layer between the photoelectric conversion layer 413 and the second electrode 415. 417 may be provided. The hole injection blocking layer 417 has a function of suppressing injection of holes from the second electrode 415 into the photoelectric conversion layer 413. The hole injection blocking layer 417 has a function of suppressing charge injection into the photoelectric conversion layer 413, and thus is sometimes referred to as a charge injection blocking layer.

Conventionally, a photoelectric conversion element using a selenium-based material for a photoelectric conversion layer has a problem that the S / N ratio is low because a dark current is large when an electric field is applied. Here, one of the causes of the dark current is that injection of charge from the electrode to the photoelectric conversion layer has not been suppressed. Therefore, in order to suppress charge injection into the photoelectric conversion layer, a structure in which a hole injection blocking layer formed of gallium oxide is provided between the photoelectric conversion layer and the electrode may be employed. Note that in this specification and the like, the hole injection blocking layer is sometimes referred to as an n-type semiconductor layer. The photoelectric conversion element 10 can also be referred to as a pn junction photodiode.

Here, in order for the hole injection blocking layer 417 to function sufficiently, it is necessary to suppress a tunnel current passing through the hole injection blocking layer 417. Therefore, the layer needs to have a certain thickness or more. . For example, the thickness is preferably from 5 nm to 1 μm, more preferably from 10 nm to 500 nm.

Therefore, in one embodiment of the present invention, a material whose thickness can be more easily controlled than gallium oxide can be used for the hole-injection blocking layer 417.

In particular, in one embodiment of the present invention, an oxide material can be used for the hole-injection blocking layer 417. Examples of an oxide material used for the hole injection blocking layer 417 include indium oxide, tin oxide, zinc oxide, In—Zn oxide, Sn—Zn oxide, Al—Zn oxide, Zn—Mg oxide, and Sn— Mg oxide, In-Mg oxide, In-Ga oxide, In-Ga-Zn oxide, In-Al-Zn oxide, In-Sn-Zn oxide, Sn-Ga-Zn oxide, Al- Ga-Zn oxide, Sn-Al-Zn oxide, In-Hf-Zn oxide, In-La-Zn oxide, In-Ce-Zn oxide, In-Pr-Zn oxide, In-Nd- Zn oxide, In-Sm-Zn oxide, In-Eu-Zn oxide, In-Gd-Zn oxide, In-Tb-Zn oxide, In-Dy-Zn oxide, In-Ho-Zn oxide Material, In-Er-Zn oxide, In-Tm-Zn oxidation , In-Yb-Zn oxide, In-Lu-Zn oxide, In-Sn-Ga-Zn oxide, In-Hf-Ga-Zn oxide, In-Al-Ga-Zn oxide, In-Sn -Al-Zn oxide, In-Sn-Hf-Zn oxide, and In-Hf-Al-Zn oxide are given.

Note that here, for example, an In—Ga—Zn oxide means an oxide containing In, Ga, and Zn. Further, a metal element other than In, Ga, and Zn may be contained. In this specification, a film including an In—Ga—Zn oxide is also referred to as an IGZO film.

As an oxide used for the hole injection blocking layer 417, an In—Ga—Zn oxide is particularly useful. Further, the In—Ga—Zn oxide is preferably a crystalline oxide. Examples of the crystalline oxide include an oxide having a nanocrystal structure, an oxide having a CAAC (C-Axis Aligned Crystalline) structure, and the like. Note that in the case where the photoelectric conversion layer 413 has crystallinity, the hole injection blocking layer 417 formed over the photoelectric conversion layer 413 is also likely to be a crystalline oxide. Specifically, a structure in which crystalline selenium is used for the photoelectric conversion layer 413 and an In-Ga-Zn oxide having a CAAC structure is used for the hole injection blocking layer 417 is preferable. With such a structure, both the photoelectric conversion layer 413 and the hole injection blocking layer 417 have crystallinity, so that the adhesion between the photoelectric conversion layer 413 and the hole injection blocking layer 417 can be increased.

Further, it is preferable that the hole injection blocking layer 417 and the second electrode 415 each have the same metal element. Specifically, a structure in which an In-Ga-Zn oxide is used for the hole-injection blocking layer 417 and an In-Sn-Si oxide is used for the second electrode 415 is preferable. When the hole injection blocking layer 417 and the second electrode 415 each have the same metal element (In above), the adhesion between the hole injection blocking layer 417 and the second electrode 415 can be increased.

Note that instead of the above In-Ga-Zn oxide, an In-Sn-Zn oxide, an In-Y-Zn oxide, an In-Hf-Zn oxide, or an In-Zr-Zn oxide can be used. Good. The hole injection blocking layer 417 can be typically formed by a sputtering method or a plasma CVD method.

[Electron injection blocking layer 419]
As illustrated in FIGS. 1C and 1D, the photoelectric conversion element 10 according to one embodiment of the present invention further includes an electron injection blocking layer 419 between the first electrode 411 and the photoelectric conversion layer 413. May be provided. The electron injection blocking layer 419 has a function of suppressing injection of electrons from the first electrode 411 to the photoelectric conversion layer 413. The electron injection blocking layer 419 may be called a charge injection blocking layer because it has a function of suppressing charge injection into the photoelectric conversion layer 413.

The electron injection blocking layer may have a structure in which nickel oxide, antimony sulfide, or the like is provided.

The photoelectric conversion element 10 according to one embodiment of the present invention may include a hole injection blocking layer 417 and an electron injection blocking layer 419 as illustrated in FIG.

<Method for manufacturing photoelectric conversion element 10>
A method for manufacturing the photoelectric conversion element 10 according to one embodiment of the present invention will be described.

[Production method 1]
A method for manufacturing the photoelectric conversion element 10 including crystalline selenium in the photoelectric conversion layer 413 will be described with reference to FIGS. 2A to 2D are cross-sectional views illustrating a method for manufacturing the photoelectric conversion element 10.

First, a first electrode 411 is formed over the layer 441 (FIG. 2A). Note that in FIG. 2A, a formation layer of the first electrode 411 is illustrated as a layer 441 for convenience. The layer 441 may be a substrate, or may be a layer including a driver transistor formed over the substrate or over the substrate.

Next, a base layer 443 is formed over the first electrode 411 (FIG. 2B). The base layer 443 has one or more elements selected from the elements X. As the element X, the above-described element can be used. As the base layer 443, one selected from, for example, silver, bismuth, indium, indium oxide, tin, tin oxide, tellurium, In-Sn oxide (ITO: Indium Tin Oxide), and In-Sn-Si oxide (ITSO) is used. The above can be used. The base layer 443 may be a single layer or a stacked layer.

The element X included in the base layer 443 preferably has a large diffusion coefficient in selenium, and preferably forms a compound with selenium. In this specification and the like, a compound having selenium and the element X is referred to as a selenium compound. The selenium compound preferably has crystallinity.

Here, selenium and a selenium compound will be described with reference to Table 1. Table 1 shows a crystal space group (Space Group), a crystal system (Crystal System), and a lattice constant (Lattice Constant) of selenium and a selenium compound. Note that the values shown in Table 1 are quoted from an inorganic crystal structure database (ICSD: Inorganic Crystal Structure Database). Further, Se in Table 1 shows data of single crystal selenium.

As shown in Table 1, it is preferable that the degree of mismatch between the lattice constant of single crystal selenium and the selenium compound be small. Further, it is more preferable that the selenium compound and the single crystal selenium have the same crystal structure, but the crystal structures may be different if the degree of lattice mismatch is small. Note that the photoelectric conversion layer 413 of one embodiment of the present invention may include a selenium compound shown in Table 1 in some cases. Note that a selenium compound included in the photoelectric conversion layer 413 of one embodiment of the present invention is not limited thereto, and may include a compound other than the selenium compounds shown in Table 1.

The base layer 443 preferably has high wettability with selenium. Further, the selenium compound preferably has high wettability to selenium. When the wettability to selenium is high, aggregation or re-evaporation when selenium is crystallized can be suppressed. Therefore, it is possible to suppress the occurrence of a film peeling region during the formation of crystalline selenium. Specifically, it is preferable to use a material containing silver for the base layer 443. Silver has a high diffusion rate in selenium. Further, a compound of selenium and silver (Ag ₂ Se) has high wettability. Similarly, it is preferable to use a material containing bismuth for the base layer 443.

The thickness of the base layer 443 is preferably from 0.20 nm to 140 nm. Further, the thickness is preferably 0.60 nm or more and 100 nm or less. Further, the thickness is preferably 1.0 nm or more and 60 nm or less. When the thickness is in the above range, a photoelectric conversion element having uniform crystalline selenium with a small film peeling region can be manufactured. In addition, by using crystalline selenium with a small film peeling region, an imaging device with small variation in characteristics can be manufactured.

The underlayer 443 is formed by a sputtering method, an evaporation method, a pulsed laser deposition (PLD) method, a plasma enhanced chemical vapor deposition (PECVD) method, a thermal CVD (chemical vapor deposition) method, or a thermal enhanced chemical vapor deposition (PECVD) method. Atomic layer deposition (ALD), a vacuum evaporation method, or the like can be used. An example of the thermal CVD method is an organic metal chemical vapor deposition (MOCVD) method.

FIG. 2B illustrates an example in which the shape of the base layer 443 is not processed; however, the present invention is not limited to this. As shown in FIG. 3A, the base layer 443 may have an island shape. Further, a stripe shape, a mesh shape, a shape having an opening, or the like may be used. For example, the base layer 443 can be partially formed over the first electrode 411 using a metal mask. Alternatively, the base layer 443 formed over the first electrode 411 may be processed into a predetermined shape by dry etching or wet etching. When the base layer 443 has an island shape, the amount of the element X included in the base layer 443 may be adjusted with respect to the amount of selenium included in the selenium layer in some cases. Further, the base layer 443 can be provided in a desired region.

Next, the base layer 443 is heated, and selenium is deposited in the heated state. For example, by placing the layer 441 on a heated stage, the base layer 443 can be heated. The substrate temperature at the time of selenium deposition is preferably a temperature at which the layer 441 is at least 50 ° C. and at most 90 ° C. By setting the temperature within the above range, the element X included in the base layer 443 is diffused into the selenium layer during selenium deposition. Further, by reacting the diffused element X with selenium, selenium and a selenium compound containing the element X are formed. Since the selenium compound has a small degree of mismatch of lattice constant with single-crystal selenium, crystalline selenium is formed using the selenium compound as a crystal nucleus. In other words, uniform crystalline selenium with high flatness can be formed while selenium is being formed. Through the above steps, the photoelectric conversion layer 413 including crystalline selenium is formed over the first electrode 411 (FIG. 2C). Note that the photoelectric conversion layer 413 may partly be amorphous selenium.

In this specification and the like, forming a film in a state where the substrate is heated may be referred to as heated film formation. On the other hand, forming a film without heating the substrate may be referred to as room temperature (RT: Room Temperature) film formation.

As a method for producing crystalline selenium, a method of forming a film of amorphous selenium and performing heat treatment is known. However, a region where selenium does not exist may be generated by coagulation of selenium as amorphous selenium is crystallized by the heat treatment. In this specification and the like, a region where selenium does not exist is referred to as a film peeling region. When a film peeling region occurs in the photoelectric conversion layer, characteristic variations occur between the photoelectric conversion elements, which may cause a reduction in imaging performance of the imaging device. In addition, since the roughness of the photoelectric conversion layer 413 is increased with the occurrence of selenium aggregation or a film peeling region, the coverage and adhesion of the second electrode 415 provided over the photoelectric conversion layer 413 may be reduced. . Poor coverage and adhesion of the second electrode 415 can cause a short circuit between the first electrode 411 and the second electrode 415. Therefore, it is preferable that the photoelectric conversion layer be a uniform crystalline selenium having a small film peeling region, high flatness, and uniformity.

The photoelectric conversion layer 413 which is one embodiment of the present invention has uniform crystalline selenium because crystalline selenium is formed at the time of selenium deposition. In addition, the formation of the selenium compound enhances the adhesion between the underlayer 443 and the crystalline selenium, suppresses the aggregation of crystalline selenium and the occurrence of a film peeling region, and provides crystalline selenium with high flatness. That is, the photoelectric conversion layer 413 having a small amount of film peeling, high flatness, and uniform crystalline selenium can be obtained. In addition, by using such a photoelectric conversion layer 413, an imaging device with less variation in characteristics can be manufactured.

After formation of the photoelectric conversion layer 413, the base layer 443 may not be clearly confirmed. FIG. 2C illustrates an example in which the foundation layer 443 cannot be clearly confirmed after the formation of the photoelectric conversion layer 413 and the photoelectric conversion layer 413 is formed over the first electrode 411; however, the present invention is not limited thereto. . As shown in FIG. 3B, the underlayer 443a may have a smaller thickness than when the underlayer 443 is formed, and the photoelectric conversion layer 413 may be formed over the underlayer 443a. The thickness of the base layer 443a may be approximately the same as that when the base layer 443 is formed, or may be larger than that when the base layer 443 is formed. As illustrated in FIG. 3C, the base layer 443 may be an island-shaped base layer 443b, and the photoelectric conversion layer 413 may be formed over the first electrode 411 and the base layer 443b. Further, the boundary between the base layer 443a and the base layer 443b and the photoelectric conversion layer 413 may not be clear.

The base layers 443a and 443b may include selenium in addition to the components of the base layer 443 in some cases. Note that in this specification and the like, the base layers 443a and 443b may be referred to as buffer layers.

The selenium layer can be formed by a sputtering method, an evaporation method, a pulse laser deposition (PLD) method, a plasma chemical vapor deposition (PECVD) method, a thermal CVD method, an ALD method, a vacuum evaporation method, or the like. An MOCVD method is an example of the thermal CVD method.

When the evaporation method is used for forming the selenium layer, the direction of the substrate illustrated in FIG. 2C is upside down. When performing vapor deposition, the substrate is sandwiched between the substrate holder and the vapor deposition mask, and the vapor deposition mask made of metal is attracted by a permanent magnet installed in the substrate holder to fix the substrate. The deposition is performed such that the deposition source is located. Note that the pressure during the deposition is preferably 1.0 × 10 ⁻³ Pa or less. Further, the pressure is preferably 1.0 × 10 ⁻⁴ Pa or less. Further, the pressure is preferably about 1.0 × 10 ⁻⁵ Pa.

After the formation of the base layer 443, selenium is preferably formed without leaving time. Further, after the formation of the base layer 443, selenium is preferably formed without exposing the surface of the base layer 443 to the atmosphere. Further, after forming the base layer 443 in a vacuum, selenium is preferably formed continuously in a vacuum. By depositing selenium continuously after forming the base layer 443, attachment of impurities such as atmospheric components to the surface of the base layer 443 can be suppressed, and the photoelectric conversion layer 413 with few impurities can be formed. In addition, generation of a film peeling region in the photoelectric conversion layer 413 can be suppressed. Further, the photoelectric conversion layer 413 with high crystallinity can be formed.

In this specification and the like, between the formation of the underlayer and the formation of the selenium layer, continuous film formation or continuous formation is performed so that the processing substrate is not exposed to the atmosphere but is always placed in a vacuum, nitrogen, or rare gas atmosphere. Sometimes called a film. In addition, the process in which the selenium layer is formed once after being exposed to the air atmosphere after the formation of the underlayer is sometimes referred to as discontinuous film formation or discontinuous film formation.

For example, a multi-chamber sputtering apparatus which has a plurality of film formation chambers and a plurality of targets and continuously forms a plurality of kinds of film types in a vacuum can be used for selenium film formation. Alternatively, a multi-chamber evaporation apparatus which has a plurality of evaporation sources and continuously forms a plurality of kinds of film types in a vacuum can be used. Further, a composite device which includes a sputtering chamber and a vapor deposition chamber device and successively forms a plurality of kinds of film types in a vacuum can be used.

After the formation of the photoelectric conversion layer 413, heat treatment may be performed. By performing the heat treatment, the crystallinity of crystalline selenium included in the photoelectric conversion layer 413 may be further increased in some cases. Note that heat treatment may not be performed after the formation of the photoelectric conversion layer 413.

Next, a second electrode 415 is formed over the photoelectric conversion layer 413. Through the above steps, the photoelectric conversion element 10 according to one embodiment of the present invention can be manufactured (FIG. 2D).

Further, heat treatment may be performed after the formation of the second electrode 415. By performing the heat treatment, the crystallinity of crystalline selenium included in the photoelectric conversion layer 413 may be further increased in some cases. Note that heat treatment does not have to be performed after the second electrode 415 is formed.

[Production method 2]
Another method for manufacturing the photoelectric conversion element 10 will be described with reference to FIGS. 4A to 4C are cross-sectional views illustrating a method for manufacturing the photoelectric conversion element 10.

First, a first electrode 411 is formed over the layer 441 (FIG. 4A).

Next, the first electrode 411 is heated, and selenium is deposited in the heated state. For deposition of selenium, a co-evaporation method can be used. Note that the co-evaporation method is a method in which a plurality of different substances are simultaneously evaporated from different evaporation sources to perform evaporation.

As the first evaporation source, a material having one or more elements X can be used. As the first evaporation source, for example, silver, bismuth, indium, indium oxide, tin, tin oxide, tellurium, or the like can be used. Further, a mixture of a plurality of materials may be used as the first evaporation source. In particular, it is preferable to use a material containing silver for the first evaporation source. Similarly, it is preferable to use a material having bismuth for the first evaporation source. As the second evaporation source, a material containing selenium can be used.

By placing the layer 441 on the heated stage, the first electrode 411 can be heated. The substrate temperature at the time of selenium deposition is preferably a temperature at which the layer 441 is at least 50 ° C. and at most 90 ° C. When the temperature is in the above range, the element X included in the first evaporation source reacts with selenium included in the second evaporation source to form selenium and a selenium compound including the element X. Since the selenium compound has a small degree of mismatch of lattice constant with single-crystal selenium, crystalline selenium is formed using the selenium compound as a crystal nucleus. That is, crystalline selenium can be formed while selenium is being formed. Through the above steps, the photoelectric conversion layer 413 including crystalline selenium is formed over the first electrode 411 (FIG. 4B). Note that the photoelectric conversion layer 413 may partly be amorphous selenium.

In addition, a co-sputtering method can be used for forming selenium. Note that the co-sputtering method is a method in which a plurality of different substances are simultaneously formed from different targets by sputtering. As the first target, a material having one or more elements X can be used. As the first target, for example, silver, bismuth, indium, indium oxide, tin, tin oxide, tellurium, In-Sn oxide (ITO), In-Sn-Si oxide (ITSO), or the like can be used. As the second target, a material containing selenium can be used.

After the formation of the photoelectric conversion layer 413, heat treatment may be performed. By performing the heat treatment, the crystallinity of crystalline selenium included in the photoelectric conversion layer 413 may be further increased in some cases. Note that heat treatment may not be performed after the formation of the photoelectric conversion layer 413.

Next, a second electrode 415 is formed over the photoelectric conversion layer 413. Through the above steps, the photoelectric conversion element 10 according to one embodiment of the present invention can be manufactured (FIG. 4C).

Further, heat treatment may be performed after the formation of the second electrode 415. By performing the heat treatment, the crystallinity of crystalline selenium included in the photoelectric conversion layer 413 may be further increased in some cases. Note that heat treatment may not be performed after the formation of the second electrode 415.

[Production method 3]
Another method for manufacturing the photoelectric conversion element 10 will be described with reference to FIGS. 5A to 5E are cross-sectional views illustrating a method for manufacturing the photoelectric conversion element 10.

First, a first electrode 411 is formed over the layer 441 (FIG. 5A).

Next, a base layer 443 is formed over the first electrode 411 (FIG. 5B). Regarding the base layer 443, the above description can be referred to, and thus the description is omitted.

Next, a selenium layer 445 is formed (FIG. 5C). The temperature of the substrate at the time of selenium deposition is preferably a temperature at which the layer 441 is higher than or equal to room temperature and lower than 50 ° C. By setting the temperature within the above range, it is possible to suppress the occurrence of a film peeling region in the selenium layer 445. Note that the selenium layer 445 is amorphous, but may be partially crystalline.

The selenium layer can be formed by a sputtering method, an evaporation method, a pulse laser deposition (PLD) method, a plasma chemical vapor deposition (PECVD) method, a thermal CVD method, an ALD method, a vacuum evaporation method, or the like. An MOCVD method is an example of the thermal CVD method.

After the formation of the base layer 443, the selenium layer 445 is preferably formed without time. Further, after the formation of the base layer 443, the selenium layer 445 is preferably formed without exposing the surface of the base layer 443 to the atmosphere. Further, after forming the base layer 443 in a vacuum, it is preferable to form the selenium layer 445 continuously in a vacuum. By forming the base layer 443 and the selenium layer 445 continuously, impurities such as atmospheric components can be prevented from being attached to the surface of the base layer 443, and the photoelectric conversion layer 413 with few impurities can be formed. In addition, generation of a film peeling region in the photoelectric conversion layer 413 can be suppressed. Further, the photoelectric conversion layer 413 with high crystallinity can be formed.

FIGS. 5B and 5C show examples in which the shape of the base layer 443 is not processed; however, the present invention is not limited to this. As shown in FIG. 6A, the base layer 443 may be processed into an island shape. Further, a stripe shape, a mesh shape, a shape having an opening, or the like may be used. Then, as shown in FIG. 6B, a selenium layer 445 may be formed over the island-shaped base layer 443 and the first electrode 411. When the base layer 443 has an island shape, the amount of the element X included in the base layer 443 may be adjusted with respect to the amount of selenium included in the selenium layer 445 in some cases. Further, the base layer 443 can be provided in a desired region.

Next, heat treatment is performed to crystallize the selenium layer 445 to form crystalline selenium. Through the above steps, the photoelectric conversion layer 413 including crystalline selenium is formed over the first electrode 411 (FIG. 5D).

As the heat treatment, after the first heat treatment is performed, a second heat treatment is performed at a higher temperature than the first heat treatment. The temperature of the first heat treatment is preferably from 50 ° C to 90 ° C. Further, the temperature is preferably from 60 ° C to 80 ° C. The temperature of the second heat treatment is preferably from 70 ° C to 220 ° C. Further, the temperature is preferably from 90 ° C to 210 ° C. Further, the temperature is preferably from 110 ° C to 200 ° C. The first heat treatment is preferably performed at a temperature at which the element X included in the base layer 443 is diffused into the selenium layer 445 and selenium and a selenium compound including the element X are formed. The second heat treatment is preferably higher than the temperature of the first heat treatment and at a temperature at which the selenium layer is crystallized. By setting the temperature within the above range, crystalline selenium is formed with the selenium compound as a crystal nucleus. Therefore, generation of a film peeling region in the photoelectric conversion layer 413 can be suppressed. Further, the photoelectric conversion layer 413 with high crystallinity can be formed. Note that the second heat treatment may be performed continuously after the first heat treatment, or the first heat treatment and the second heat treatment may not be performed continuously.

For the heat treatment, an electric furnace, a laser annealing device, a lamp annealing device, or the like can be used. A device for heating an object to be processed by heat conduction or heat radiation from a heating element such as a resistance heating element may be used. Further, a hot plate may be used. Alternatively, a rapid heating (RTA) device can be used. Examples of the RTA apparatus include a GRTA (Gas Rapid Thermal Anneal) apparatus and a lamp rapid heating (LRTA) apparatus. The GRTA apparatus is an apparatus that performs heat treatment using a high-temperature gas. As the high-temperature gas, a rare gas such as argon, or an inert gas such as nitrogen which does not react with the object by heat treatment is used. The LRTA apparatus is an apparatus that heats an object to be processed by radiation of light (electromagnetic waves) emitted from a lamp such as a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high-pressure sodium lamp, and a high-pressure mercury lamp.

As a heat treatment atmosphere, a rare gas such as argon, air, nitrogen, oxygen, dry air, or the like can be used. Alternatively, a mixed atmosphere of a rare gas and oxygen or a mixed atmosphere of a rare gas and nitrogen can be used.

After formation of the photoelectric conversion layer 413, the base layer 443 may not be clearly confirmed. FIG. 5D illustrates an example in which the base layer 443 cannot be clearly confirmed after the formation of the photoelectric conversion layer 413 and the photoelectric conversion layer 413 is formed over the first electrode 411; however, the present invention is not limited thereto. . As shown in FIG. 3B, the underlayer 443a may have a smaller thickness than when the underlayer 443 is formed, and the photoelectric conversion layer 413 may be formed over the underlayer 443a. The thickness of the base layer 443a may be approximately the same as that when the base layer 443 is formed, or may be larger than that when the base layer 443 is formed. As illustrated in FIG. 3C, the base layer 443 may be an island-shaped base layer 443b, and the photoelectric conversion layer 413 may be formed over the first electrode 411 and the base layer 443b. Further, the boundary between the base layer 443a and the base layer 443b and the photoelectric conversion layer 413 may not be clear.

The base layers 443a and 443b may include selenium in addition to the components of the base layer 443 in some cases.

Next, a second electrode 415 is formed over the photoelectric conversion layer 413. Through the above steps, the photoelectric conversion element 10 according to one embodiment of the present invention can be manufactured (FIG. 5E).

[Production method 4]
Another method for manufacturing the photoelectric conversion element 10 will be described with reference to FIGS. 7A to 7E are cross-sectional views illustrating a method for manufacturing the photoelectric conversion element 10.

First, a first electrode 411 is formed over the layer 441 (FIG. 7A).

Next, a selenium layer 445 is formed. The temperature of the substrate at the time of selenium deposition is preferably a temperature at which the layer 441 is higher than or equal to room temperature and lower than 50 ° C. By setting the temperature in the above-described range, the selenium layer 445 having a small film peeling region is formed over the first electrode 411 (FIG. 7B). Note that the selenium layer 445 is amorphous, but may be partially crystalline.

The selenium layer can be formed by a sputtering method, an evaporation method, a pulse laser deposition (PLD) method, a plasma chemical vapor deposition (PECVD) method, a thermal CVD method, an ALD method, a vacuum evaporation method, or the like. An MOCVD method is an example of the thermal CVD method.

Next, a base layer 443 is formed over the selenium layer 445 (FIG. 7C). Regarding the base layer 443, the above description can be referred to, and thus the description is omitted.

After the formation of the selenium layer 445, the base layer 443 is preferably formed without time. Further, after formation of the selenium layer 445, the base layer 443 is preferably formed without exposing the surface of the selenium layer 445 to the atmosphere. Furthermore, after forming the selenium layer 445 in a vacuum, it is preferable to form the base layer 443 continuously in a vacuum. By forming the base layer 443 and the selenium layer 445 continuously, impurities such as atmospheric components can be prevented from being attached to the surface of the base layer 443, and the photoelectric conversion layer 413 with few impurities can be formed. In addition, generation of a film peeling region in the photoelectric conversion layer 413 can be suppressed. Further, the photoelectric conversion layer 413 with high crystallinity can be formed.

FIG. 7C shows an example in which the shape of the base layer 443 is not processed, but the present invention is not limited to this. The base layer 443 may be processed into an island shape. Further, a stripe shape, a mesh shape, a shape having an opening, or the like may be used. When the base layer 443 has an island shape, the amount of the element X included in the base layer 443 may be adjusted with respect to the amount of selenium included in the selenium layer 445 in some cases. Further, the base layer 443 can be provided in a desired region.

Next, heat treatment is performed to crystallize the selenium layer 445 to form crystalline selenium. Through the above steps, the photoelectric conversion layer 413 including crystalline selenium is formed over the first electrode 411 (FIG. 7D).

Regarding the heat treatment, the above description can be referred to, and the description is omitted.

After formation of the photoelectric conversion layer 413, the base layer 443 may not be clearly confirmed. FIG. 7D illustrates an example in which the base layer 443 cannot be clearly confirmed after the formation of the photoelectric conversion layer 413 and the photoelectric conversion layer 413 is formed over the first electrode 411; however, the present invention is not limited thereto. . The base layer may have a smaller thickness than when the base layer 443 is formed, and the photoelectric conversion layer 413 may be formed below the base layer. The thickness of the underlayer may be approximately the same as that when the underlayer 443 is formed, or may be greater than that when the underlayer 443 is formed. The underlayer may have an island shape. The boundary between the base layer and the photoelectric conversion layer 413 may not be clear. The base layer may include selenium in addition to the components of the base layer 443 in some cases.

Next, a second electrode 415 is formed over the photoelectric conversion layer 413. Through the above steps, the photoelectric conversion element 10 according to one embodiment of the present invention can be manufactured (FIG. 7E).

This embodiment can be implemented in appropriate combination with the structures described in the other embodiments.

(Embodiment 2)
In this embodiment, a photoelectric conversion element having a structure different from that in Embodiment 1 will be described with reference to drawings.

One embodiment of the present invention is a photoelectric conversion element using selenium for a photoelectric conversion layer, which can perform imaging at a relatively low voltage using an avalanche multiplication effect. In addition, by using crystalline selenium and amorphous selenium for the photoelectric conversion layer, light sensitivity can be improved in almost the entire visible light region. Further, by using an oxide having an appropriate thickness and a wide band gap as an n-type semiconductor layer for forming a pn junction, dark current can be reduced and photocurrent can be increased.

Therefore, light sensitivity can be increased as compared with the conventional photoelectric conversion element using silicon for the photoelectric conversion layer, and imaging under low illuminance can be facilitated. Further, a high-resolution imaging device can be realized.

FIG. 8 is a perspective view illustrating a structure of a photoelectric conversion element of one embodiment of the present invention. The photoelectric conversion element 10 includes a photoelectric conversion layer 11, a hole injection blocking layer 12, a buffer layer 13, a first electrode 15, and a second electrode 14.

The photoelectric conversion element 10 is a pn junction type photodiode, and has the second electrode 14 side as a light receiving surface. A selenium-based material can be used for the photoelectric conversion layer 11. In FIG. 8, light (Light) incident on the photoelectric conversion element 10 is indicated by an arrow.

It is preferable that the photoelectric conversion layer 11 be a stack of a crystalline selenium layer 11a and an amorphous selenium layer 11b. Note that FIG. 8 illustrates an example in which the crystalline selenium layer 11a and the amorphous selenium layer 11b have substantially the same thickness. However, as illustrated in FIG. The amorphous selenium layer 11b may be formed thick and thin.

As the crystalline selenium layer 11a, the structure and the manufacturing method of the photoelectric conversion layer 413 described in Embodiment 1 can be used.

The crystalline selenium layer can be formed by solid-phase growth using an amorphous selenium layer as a starting film. At this time, irregularities may occur on the layer surface due to grain growth. In addition, segregation of impurities easily occurs on the layer surface and crystal grain boundaries. The layer surface is a region to be a pn junction surface, and the presence of a shape factor such as unevenness and impurities may cause deterioration of interface characteristics.

Therefore, in order to make the pn junction plane as flat as possible, it is preferable to form another p-type semiconductor layer on the crystalline selenium layer. Further, by forming the p-type semiconductor layer, the impurity concentration in a region to be a pn junction surface and its vicinity can be reduced. In one embodiment of the present invention, amorphous selenium having close physical properties to crystalline selenium is used for the p-type semiconductor layer.

FIG. 10A shows an indium-gallium oxide (IGO) corresponding to the hole injection blocking layer 12 and an indium-gallium oxide corresponding to the second electrode 14 on the crystal selenium layer (c-Se) grown by solid phase. It is a cross-sectional STEM image of the laminated body provided with tin oxide (ITO). It can be seen that the interface between the crystalline selenium layer (c-Se) and the indium-gallium oxide (IGO) has irregularities.

FIG. 10B shows a laminate in which an amorphous selenium layer (a-Se), indium-gallium oxide (IGO), and indium-tin oxide (ITO) are provided on a crystalline selenium layer (c-Se). 5 is a cross-sectional STEM image of the sample. By providing the amorphous selenium layer (a-Se) in this manner, the pn junction surface can be made almost flat.

Note that amorphous selenium has a relatively large difference in light absorption coefficient between the short wavelength side and the long wavelength side in the visible light region. Therefore, in a photoelectric conversion element using an amorphous selenium single layer, the sensitivity on the long wavelength side decreases. From this point as well, it is preferable that the photoelectric conversion layer 11 be a stack of the crystalline selenium layer 11a and the amorphous selenium layer 11b. Further, by including the crystalline selenium layer 11a in the photoelectric conversion layer 11, the applied voltage for exhibiting the avalanche multiplication effect can be reduced.

Amorphous selenium is a material that is easily crystallized at a relatively low temperature, and the amorphous selenium layer 11b may be crystallized in a later manufacturing process. Therefore, an impurity for suppressing crystallization may be added to the amorphous selenium layer 11b. Examples of the impurity include arsenic, antimony, silicon, titanium, and the like. Further, under an appropriate concentration, crystallization can be suppressed even by a Group 16 element such as sulfur. The concentration of the impurity is 0.1 at% to 10 at%, preferably 0.1 at% to 5 at%, and more preferably 0.1 at% to 1 at%. By setting the impurity concentration in the amorphous selenium layer 11b within the above range, crystallization can be suppressed while suppressing an increase in dark current.

FIG. 11 shows a device A using a single layer of an amorphous selenium layer (a-Se) as a photoelectric conversion layer, and a stack of a crystalline selenium layer (c-Se) and an amorphous selenium layer (a-Se). FIG. 13 is a diagram comparing the wavelength dependence of the current amplification factor (I _photo / I _dark ) of the device B which has been used. Note that the size of the light receiving surfaces of the element A and the element B is 2 mm × 2 mm, and the voltage (reverse bias: V _R ) applied between the electrodes is −15 V.

As described above, in the element B having the crystalline selenium in the photoelectric conversion layer, the current amplification factor on the long wavelength side can be improved with respect to the element A. On the shorter wavelength side, the current amplification factor of the element B is lower than that of the element A, because the dark current (I _dark ) of the element B is larger than that of the element B. The result that the photocurrent (I _photo ) is larger in the element B than in the element A is obtained. It is considered that the increase in dark current of the element B is caused by an increase in the impurity concentration in the photoelectric conversion layer during the crystal growth process.

The thickness of the photoelectric conversion layer 11 may be determined according to the application. For example, in an imaging device using the photoelectric conversion element, when it is desired to perform an imaging operation using an avalanche multiplication effect at a lower voltage, the thickness of the photoelectric conversion layer 11 may be relatively reduced. In addition, when an imaging operation with higher sensitivity is desired regardless of the voltage, the thickness of the photoelectric conversion layer 11 may be relatively increased.

In any case, in the non-single-crystal selenium layer, carriers excited by light outside the depletion layer formed by the pn junction and the applied voltage are almost inactivated, so that the depletion layer covers the entire photoelectric conversion layer efficiently. It is preferable to select the film thickness so as to spread. For example, when the photoelectric conversion element is used with a reverse bias of about 15 V, the thickness of the photoelectric conversion layer 11 is preferably set to about 500 nm.

Further, the respective film thicknesses of the crystalline selenium layer 11a and the amorphous selenium layer 11b can also be determined depending on the application. For example, when priority is given to sensitivity on the long wavelength side, the crystalline selenium layer 11a may be made relatively thick. When priority is given to imaging under low illuminance, the thickness of the amorphous selenium layer 11b, which can reduce dark current, may be relatively thick.

The buffer layer 13 is a region where a metal and / or an alloy of a metal and selenium is formed. As the metal, for example, silver, indium, tin, tellurium, bismuth, or the like can be used. In this embodiment, an example in which silver is used as the metal will be described.

As described above, the crystalline selenium layer can be obtained by the solid phase growth of the amorphous selenium layer, but has poor adhesion to the base, and when the crystal grows, the crystalline selenium layer is agglomerated and the layer is peeled off. There is. Therefore, in order to prevent them, it is preferable to provide a material that forms an alloy with selenium between the base and the amorphous selenium layer and perform solid phase growth. Here, the crystalline selenium layer is formed by providing a thin silver layer on the first electrode 15 serving as a base, providing an amorphous selenium layer on the thin layer, and then performing heat treatment at a maximum of about 110 ° C. Form. The thickness of the thin layer can be, for example, 1 nm to 2 nm.

At the beginning of the heat treatment, silver and selenium form an alloy, after which crystalline selenium grows on the alloy. Therefore, the problems of adhesion and aggregation can be solved, and the occurrence of a film peeling region can be suppressed. In addition, all the thin layers of silver may be alloyed.

During the heat treatment, silver may diffuse into the crystalline selenium layer and change the carrier concentration. Further, silver may be segregated at a grain boundary or a surface. These are one of the factors that increase the dark current of the photoelectric conversion element. Therefore, it is preferable to increase the distance between the surface of the crystalline selenium layer and the pn junction surface. For example, when the structure illustrated in FIG. 9B is used and the photoelectric conversion element is used at a reverse bias of about 15 V, the thickness of the crystalline selenium layer 11a is 50 nm to 100 nm, and the thickness of the amorphous selenium layer 11b is 400 nm. The thickness is preferably about 450 nm.

Note that, in the above description, an example in which the crystalline selenium layer 11a is formed and then the amorphous selenium layer 11b is provided, but by selecting appropriate film formation conditions, as shown in FIG. The crystalline selenium layer 11c can be formed directly on the layer 11a. In this case, the concentration of silver in the crystalline selenium layer 11c can be suppressed lower than that in the crystalline selenium layer 11a, so that dark current can be suppressed and light sensitivity can be increased in a wide range of the visible light region.

Alternatively, the amorphous selenium layer 11b may be provided after the formation of the crystalline selenium layer 11a, and the amorphous selenium layer 11b may be crystallized in a subsequent heating step to form the crystalline selenium layer 11c.

Further, a selenium layer 16 may be provided between the first electrode 15 and the buffer layer 13 as shown in FIG. The selenium layer 16 is crystallized almost simultaneously with the step of forming the crystalline selenium layer 11a, but may be made amorphous by adding the above-described impurities.

In the pixel of the imaging device, the first electrode 15 corresponds to a pixel electrode, and thus the selenium layer 16 has a role of electrically separating the pixel electrodes. For the first electrode 15, the structure and material of the first electrode 411 described in Embodiment 1 can be used. In addition, the selenium layer 16 may be unnecessary if the uppermost layer of the first electrode 15 is made of silver.

The hole injection blocking layer 12 is preferably formed of a material having a wide band gap and transmitting visible light. For example, zinc oxide, gallium oxide, indium oxide, tin oxide, an oxide in which they are mixed, or the like can be used. In one embodiment of the present invention, indium-gallium oxide is used.

FIG. 12A is a band diagram in a bonded state of the second electrode 14, the hole injection blocking layer 12, and the photoelectric conversion layer 11. The photoelectric conversion layer 11 is crystalline selenium, and the hole injection blocking layer 12 is gallium oxide. This is an example using. Gallium oxide has a large band gap of about 4.9 eV, and thus has a high effect of preventing injection of holes from the second electrode 14 into the photoelectric conversion layer 11. Therefore, the dark current (I _dark ) can be kept low.

However, since gallium oxide is a material having a low carrier concentration, the width Wp of a depletion layer in a p-type semiconductor layer formed by a pn junction is difficult to increase. Therefore, the incident light cannot be completely absorbed in the depletion layer, and is also absorbed in a region outside the depletion layer. The photocarriers generated in the depletion layer can be efficiently extracted to the outside by the internal electric field, but the photocarriers generated in the region outside the depletion layer are deactivated.

Therefore, in order to efficiently extract the photocarriers to the outside, that is, to increase the photocurrent ( _Iphoto ), it is preferable to increase the width Wp of the depletion layer formed in the photoelectric conversion layer 11. It is possible to increase the depletion layer width Wp by increasing the carrier concentration of the hole injection blocking layer 12. However, if a material having an extremely high carrier concentration is used, the material from the second electrode 14 via a deep level is reduced. Holes may be injected into the photoelectric conversion layer 11 in some cases. Therefore, the hole injection blocking layer 12 is preferably a material having a slightly higher carrier concentration than indium oxide. Such a material includes, for example, indium-gallium oxide.

In one embodiment of the present invention, an indium-gallium oxide having an atomic ratio of In: Ga = 10: 90 to 2:98 and its vicinity can be used. Particularly preferably, the atomic ratio is In: Ga = 5: 95 or near it. In the following description, the atomic ratio of indium-gallium oxide is In: Ga = 5: 95.

FIG. 12B is a band diagram in the case where indium-gallium oxide is used as the hole injection blocking layer 12. Compared with the case where gallium oxide is used for the hole injection blocking layer 12, the band gap is almost the same as 4.7 eV, and it is estimated that the function of the hole injection blocking can be maintained. Further, since indium-gallium oxide has a higher carrier density than gallium oxide, the width Wp of the depletion layer can be increased, and an increase in photocurrent can be estimated.

FIG. 13 shows an element C in which the photoelectric conversion layer 11 is an amorphous selenium layer (500 nm) and the hole injection blocking layer 12 is gallium oxide (30 nm), and the hole injection blocking layer 12 is indium-gallium oxide ( 13 is a comparison between the dark current (I _dark ) of the device D using the same (30 nm) and the photocurrent (I _photo ) at the time of light irradiation (wavelength 600 nm: 20 μW / cm ² ). The size of the light receiving surface of each of the element C and the element D is 2 mm × 2 mm.

As shown in FIG. 13, the dark current of the element D is lower than that of the element C. This is because selenium and gallium oxide have almost the same electron affinity (about 3.9 eV), whereas indium-gallium oxide has a smaller electron affinity (about 3.6 eV). Therefore, in the element D, the energy difference at the bottom of the conduction band at the pn junction interface becomes larger, and a barrier for suppressing electron injection is formed. Therefore, the dark current can be made smaller than that of the element C.

In addition, the photocurrent in the irradiation of light with a wavelength of 600 nm is higher in the element D than in the element C. This indicates that light having a relatively long wavelength contributes to the generation of carriers, and also indicates that the depletion layer width Wp has widened as shown in the band diagram of FIG. ing.

From the above, it is understood that the photoelectric conversion element using the indium-gallium oxide for the hole injection blocking layer 12 has excellent electric characteristics.

Further, by appropriately controlling the thickness of the indium-gallium oxide used for the hole injection blocking layer 12, the dark current can be further reduced and the photocurrent can be further increased. FIG. 14 shows a case where the photoelectric conversion layer 11 is a stack of a crystalline selenium layer (50 nm) and an amorphous selenium layer (440 nm), and the thickness of indium-gallium oxide used for the hole injection blocking layer 12 is changed. It is a figure which shows a dark current and a current amplification factor ( _Iphoto / _Idark ). The photocurrent (I _photo ) is a value at the time of light irradiation with a wavelength of 450 nm and an irradiance of 20 μW / cm ² .

FIG. 14 shows a tendency that the dark current is minimal and the current amplification factor is maximal when the hole injection blocking layer 12 is near 10 nm. This tendency can be explained with reference to the band diagrams shown in FIGS.

FIG. 15A is a band diagram of a bonding state of the second electrode 14, the hole injection blocking layer 12, and the photoelectric conversion layer 11 when the hole injection blocking layer 12 is relatively thin. The second electrode 14 is preferably formed using a material having a property of transmitting visible light, and the structure and the material of the second electrode 415 described in Embodiment 1 can be used. For example, a conductive oxide such as indium-tin oxide (ITO) can be used for the second electrode 14.

ITO can be typically formed by a sputtering method, but indium or tin atoms or clusters may be implanted in the base in the early stage of the film formation. In a region in which atoms of indium, tin, and the like are implanted in the hole injection blocking layer 12, which is a base, the carrier density increases as the number of defects increases. If the thickness t _n of the hole injection blocking layer 12 is relatively thin, since a percentage of the thickness direction of the region is large, for example, dark current due to a leakage current, such as a tunnel current is increased. On the other hand, the width Wp of the depletion layer in the photoelectric conversion layer 11 increases as the carrier concentration of the hole injection blocking layer 12 increases near the pn junction surface. Therefore, the photocurrent tends to increase.

FIG. 15 (B) is a second electrode 14 when the thickness t _n of the hole injection blocking layer 12 is relatively thick, a band diagram of the junction state of the hole injection blocking layer 12 and the photoelectric conversion layer 11. As with the thickness t _n of the hole injection blocking layer 12 is thin, the hole injection blocking layer 12 areas such as indium and tin atoms are implanted is formed. However, since the distance from the pn junction surface is relatively long, a leak current caused by a tunnel current or the like can be suppressed, and a dark current can be suppressed low. On the other hand, since the carrier concentration of the hole injection blocking layer 12 in the vicinity of the pn junction does not change, the depletion layer width Wp of the photoelectric conversion layer 11 does not easily increase. Therefore, the photocurrent tends to hardly increase.

The thickness t _n of the hole injection blocking layer 12 by suitably can combine the above advantages. Therefore, it can be said experimental results and the description of FIG. 14, the thickness _{t n} is preferably 5nm or more 20nm or less of the hole injection blocking layer 12, and more preferably 10nm and its vicinity.

As described above, a pn junction photoelectric conversion element having excellent electric characteristics is formed by using a stack of crystalline selenium and amorphous selenium for the photoelectric conversion layer 11 and using indium-gallium oxide for the n-type semiconductor layer. be able to.

This embodiment can be implemented in appropriate combination with the structures described in the other embodiments.

(Embodiment 3)
In this embodiment, an example of an imaging device in which the photoelectric conversion element described in Embodiments 1 and 2 can be used is described with reference to drawings.

FIG. 16 illustrates a pixel circuit that can be used for the imaging device of one embodiment of the present invention. The pixel circuit includes the transistor 51, the transistor 52, the transistor 53, the transistor 54, and the photoelectric conversion element 10 described in Embodiment 1.

One electrode (anode) of the photoelectric conversion element 10 is electrically connected to one of a source and a drain of the transistor 51. One electrode of the photoelectric conversion element 10 is electrically connected to one of a source and a drain of the transistor 52. The other of the source and the drain of the transistor 51 is electrically connected to the gate of the transistor 53. One of a source and a drain of the transistor 53 is electrically connected to one of a source and a drain of the transistor 54.

The other electrode (cathode) of the photoelectric conversion element 10 is electrically connected to the wiring 72 (HVDD). The gate of the transistor 51 is electrically connected to the wiring 75 (TX). The other of the source and the drain of the transistor 53 is electrically connected to the wiring 79 (VDD). The gate of the transistor 52 is electrically connected to the wiring 76 (RS). The other of the source and the drain of the transistor 52 is electrically connected to the wiring 73 (GND). The other of the source and the drain of the transistor 54 is electrically connected to the wiring 71 (OUT). The gate of the transistor 54 is electrically connected to the wiring 78 (SE). The wiring 72 (HVDD) is electrically connected to one terminal of the high-voltage power supply 56, and the other terminal of the high-voltage power supply 56 is electrically connected to the wiring 77 (GND).

Here, the wiring 71 (OUT) can function as an output line for outputting a signal from a pixel. The wiring 73 (GND), the wiring 77 (GND), and the wiring 79 (VDD) can have a function as a power supply line. For example, the wiring 73 (GND) and the wiring 77 (GND) can function as a low potential power supply line, and the wiring 79 (VDD) can function as a high potential power supply line. The wiring 75 (TX), the wiring 76 (RS), and the wiring 78 (SE) can function as signal lines for controlling on / off of each transistor.

Note that the wiring 73 (GND) and the wiring 77 (GND) may be provided as one wiring. Further, the potential of the two wirings is not limited to GND, and may be any potential that is sufficiently lower than the potential supplied to the wiring 79 (VDD).

The photoelectric conversion element 10 exhibits a high-efficiency photoelectric characteristic when a high potential HVDD is applied. Note that the potential HVDD is higher than the potential VDD supplied to the wiring 79 (VDD). Further, as the photoelectric conversion element 10, it is preferable to use a photoelectric conversion element that produces an avalanche multiplication effect in order to increase the light detection sensitivity at low illuminance. In order to produce an avalanche multiplication effect, a relatively high potential HVDD is required. Therefore, the high-voltage power supply 56 has a function of supplying the potential HVDD, and the potential HVDD is supplied to the other electrode of the photoelectric conversion element 10 through the wiring 72 (HVDD). Note that the photoelectric conversion element 10 can be used by applying a potential that does not cause an avalanche multiplication effect.

The transistor 51 can function as a transfer transistor for transferring the potential of the charge storage portion (NR) that changes according to the output of the photoelectric conversion element 10 to the charge storage portion (ND). The transistor 52 can function as a reset transistor for initializing the potentials of the charge storage portion (NR) and the charge storage portion (ND). The transistor 53 can function as an amplification transistor that outputs a signal corresponding to the potential of the charge storage portion (ND). The transistor 54 can function as a selection transistor for selecting a pixel from which a signal is read.

When a high voltage is applied to the photoelectric conversion element 10, it is necessary to use a transistor with a high withstand voltage that can withstand the high voltage as a transistor connected to the photoelectric conversion element 10. As the high-voltage transistor, for example, a transistor including an oxide semiconductor for a semiconductor layer (hereinafter, an OS transistor) can be used. Specifically, an OS transistor is preferably used as the transistor 51 and the transistor 52.

The transistors 51 and 52 are desired to have excellent switching characteristics. However, since the transistor 53 is desired to have excellent amplification characteristics, it is preferable that the transistors 53 have high on-state current. Therefore, it is preferable that a transistor using silicon for an active layer or an active region (hereinafter, a Si transistor) be used as the transistor 53 and the transistor 54.

With the above-described structure of the transistors 51 to 54, an imaging device with high light detection sensitivity at low illuminance and capable of outputting a signal with low noise can be manufactured. Further, since the light detection sensitivity is high, the light capturing time can be shortened, and imaging can be performed at high speed.

Note that an OS transistor may be used as the transistor 53 and the transistor 54 without limitation to the above structure. Alternatively, a Si transistor may be used as the transistor 51 and the transistor 52. In any case, the imaging operation of the pixel circuit is possible.

Next, the operation of the pixel will be described with reference to the timing chart of FIG. Note that in the example operation described below, the potential of HVDD is supplied as “H” and the potential of GND is supplied as “L” to the wiring 76 (RS) connected to the gate of the transistor 52. A wiring 75 (TX) connected to the gate of the transistor 51 and a wiring 78 (SE) connected to the gate of the transistor 54 are supplied with VDD as "H" and GND as "L", respectively. . Further, the potential of VDD is supplied to the wiring 79 (VDD) connected to the source of the transistor 53. Note that a configuration in which a potential other than the above is supplied to each wiring may be employed.

At the time T1, the wiring 76 (RS) is set to “H”, the wiring 75 (TX) is set to “H”, and the potentials of the charge accumulation portion (NR) and the charge accumulation portion (ND) are set to a reset potential (GND) (reset). motion). Note that the potential VDD may be supplied to the wiring 76 (RS) as “H” during the reset operation.

When the wiring 76 (RS) is set to “L” and the wiring 75 (TX) is set to “L” at the time T2, the potential of the charge accumulation portion (NR) changes (accumulation operation). The potential of the charge storage unit (NR) changes from GND to HVDD at the maximum in accordance with the intensity (Bright) of light incident on the photoelectric conversion element 10.

At the time T3, the potential of the wiring 75 (TX) is set to “H”, and the charge in the charge storage unit (NR) is transferred to the charge storage unit (ND) (transfer operation).

In the accumulation operation, the potential of the charge accumulation portion (ND) changes according to the intensity of light incident on the photoelectric conversion element 10, but since the VDD is supplied to the gate of the transistor 51, the charge accumulation portion (ND) When the potential of VDD reaches VDD, the transistor 51 is turned off. Therefore, the potential of the charge storage section (ND) changes from the reset potential (GND) to VDD at the maximum. That is, a potential of VDD at the maximum is applied to the gate of the transistor 53.

Although the wiring 75 (TX) is set to “L” in the accumulation operation in FIG. 17, the wiring 75 (TX) may be set to “H”. In this case, the potential of the charge storage portion (ND) also changes with the change of the potential of the charge storage portion (NR). However, since VDD is supplied to the gate of the transistor 51, the potential of the charge storage portion (ND) is changed. Reaches VDD, the transistor 51 is turned off. Therefore, the potential of the charge storage section (ND) changes from the reset potential (GND) to VDD at the maximum. That is, even in this case, the potential of VDD is applied to the gate of the transistor 53 at the maximum.

Note that by setting the wiring 75 (TX) to “L” in the accumulation operation, the influence of noise due to the transistor 51 can be reduced. On the other hand, by setting the wiring 75 (TX) to “H”, the influence of noise due to switching of the transistor 51 can be reduced.

At the time T4, the wiring 76 (RS) is set to “L” and the wiring 75 (TX) is set to “L”, and the transfer operation is completed. At this point, the potential of the charge storage section (ND) is determined.

During the period from time T5 to time T6, the wiring 76 (RS) is set at “L”, the wiring 75 (TX) is set at “L”, the wiring 78 (SE) is set at “H”, Output to the wiring 71 (OUT). That is, an output signal corresponding to the intensity of light incident on the photoelectric conversion element 10 in the accumulation operation can be obtained.

FIG. 18 illustrates an example of a pixel configuration of an imaging device including the above-described pixel circuit. The imaging device can include a layer 31, a layer 32, and a layer 33, each of which has a region overlapping each other.

The layer 31 has a configuration of the photoelectric conversion element 10, and includes the pixel electrode 35 corresponding to the first electrode 411 or the first electrode 15, the photoelectric conversion layer 413 or the photoelectric conversion layer 36 corresponding to the photoelectric conversion layer 11, The common electrode 37 corresponding to the second electrode 415 or the second electrode 14 is provided. In FIG. 18, light (Light) incident on the imaging device is indicated by an arrow.

The layer 32 can be, for example, a layer including an OS transistor (the transistor 51 and the transistor 52). In the circuit configuration of the pixel illustrated in FIG. 16, when the intensity of light incident on the photoelectric conversion element 10 is low, the potential of the charge accumulation unit (ND) decreases. Since the off-state current of the OS transistor is extremely low, a current corresponding to the gate potential can be accurately output even when the gate potential is extremely low. Therefore, the illuminance range that can be detected, that is, the dynamic range can be expanded.

In addition, due to the low off-state current characteristics of the transistor 51 and the transistor 52, a period in which charge can be held in the charge accumulation portion (ND) and the charge accumulation portion (NR) can be extremely long. Therefore, it is possible to apply a global shutter method in which charge accumulation operation is simultaneously performed in all pixels without complicating a circuit configuration and an operation method.

As a semiconductor material used for the OS transistor, a metal oxide having an energy gap of 2 eV or more, preferably 2.5 eV or more, more preferably 3 eV or more can be used. A typical example is an oxide semiconductor containing indium; for example, a CAC-OS described later can be used.

The semiconductor layer is represented by an In-M-Zn-based oxide including, for example, indium, zinc, and M (a metal such as aluminum, titanium, gallium, germanium, yttrium, zirconium, lanthanum, cerium, tin, neodymium, or hafnium). It can be a membrane.

In the case where the oxide semiconductor included in the semiconductor layer is an In-M-Zn-based oxide, the atomic ratio of metal elements of a sputtering target used for forming the In-M-Zn oxide is In ≧ M, Zn It is preferable to satisfy ≧ M. As the atomic ratio of metal elements of such a sputtering target, In: M: Zn = 1: 1: 1, In: M: Zn = 1: 1: 1.2, In: M: Zn = 3: 1: 2, In: M: Zn = 4: 2: 3, In: M: Zn = 4: 2: 4.1, In: M: Zn = 5: 1: 6, In: M: Zn = 5: 1: 7, In: M: Zn = 5: 1: 8 and the like are preferable. Note that each of the atomic ratios of the semiconductor layers to be formed includes a variation of ± 40% of the atomic ratio of the metal element contained in the sputtering target.

As the semiconductor layer, an oxide semiconductor with a low carrier density is used. For example, the semiconductor layer has a carrier density of 1 × 10 ¹⁷ / cm ³ or less, preferably 1 × 10 ¹⁵ / cm ³ or less, more preferably 1 × 10 ¹³ / cm ³ or less, and still more preferably 1 × 10 ¹¹ / cm 3. ³ or less, more preferably less than 1 × 10 ¹⁰ / cm ³ , and an oxide semiconductor with a carrier density of 1 × 10 ⁻⁹ / cm ³ or more can be used. Such an oxide semiconductor is referred to as a high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor. Thus, the oxide semiconductor has stable characteristics because the impurity concentration is low and the density of defect states is low.

Note that the present invention is not limited thereto, and a transistor having an appropriate composition may be used in accordance with required semiconductor characteristics and electric characteristics (eg, field-effect mobility and threshold voltage) of the transistor. In addition, in order to obtain necessary semiconductor characteristics of a transistor, it is preferable that the carrier density and the impurity concentration of the semiconductor layer, the defect density, the atomic ratio between a metal element and oxygen, the interatomic distance, and the density be appropriate. .

When an oxide semiconductor included in the semiconductor layer contains silicon or carbon, which is one of Group 14 elements, oxygen vacancies increase and the semiconductor becomes n-type. For this reason, the concentration of silicon or carbon (concentration obtained by secondary ion mass spectrometry) in the semiconductor layer is set to 2 × 10 ¹⁸ atoms / cm ³ or less, preferably 2 × 10 ¹⁷ atoms / cm ³ or less.

In addition, an alkali metal and an alkaline earth metal may generate carriers when combined with an oxide semiconductor, which may increase off-state current of a transistor. Therefore, the concentration of alkali metal or alkaline earth metal in the semiconductor layer (concentration obtained by secondary ion mass spectrometry) is 1 × 10 ¹⁸ atoms / cm ³ or less, preferably 2 × 10 ¹⁶ atoms / cm ³ or less. To

In addition, when nitrogen is contained in the oxide semiconductor included in the semiconductor layer, electrons serving as carriers are generated, the carrier density is increased, and the oxide semiconductor is easily made n-type. As a result, a transistor including an oxide semiconductor containing nitrogen is likely to have normally-on characteristics. For this reason, the nitrogen concentration (concentration obtained by secondary ion mass spectrometry) in the semiconductor layer is preferably 5 × 10 ¹⁸ atoms / cm ³ or less.

Further, the semiconductor layer may have a non-single-crystal structure, for example. The non-single-crystal structure is, for example, a CAAC-OS (C-Axis Aligned Crystalline Oxide Semiconductor or a C-Axis Aligned and A-B-Plane Anchorized Crystalline Oxide Crystal having a c-axis-oriented crystal), Includes microcrystalline or amorphous structure. Among the non-single-crystal structures, the amorphous structure has the highest density of defect states, and the CAAC-OS has the lowest density of defect states.

An oxide semiconductor film having an amorphous structure has, for example, a disordered atomic arrangement and no crystalline component. Alternatively, an oxide semiconductor film having an amorphous structure has, for example, a completely amorphous structure and no crystal part.

Note that even when the semiconductor layer is a mixed film including two or more of an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region. Good. For example, the mixed film may have a single-layer structure or a stacked structure including any two or more of the above-described regions.

A structure of a cloud-aligned composite (CAC) -OS, which is one embodiment of a non-single-crystal semiconductor layer, is described below.

The CAC-OS is one structure of a material in which an element included in an oxide semiconductor is unevenly distributed in a size of, for example, 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 2 nm or less. Note that in the following, one or more metal elements are unevenly distributed in an oxide semiconductor, and a region including the metal element has a size of 0.5 nm to 10 nm, preferably 1 nm to 2 nm, or a size in the vicinity thereof. The state mixed by is also referred to as a mosaic shape or a patch shape.

Note that the oxide semiconductor preferably contains at least indium. In particular, it preferably contains indium and zinc. In addition to them, aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium, etc. Or a plurality of types selected from the group consisting of:

For example, CAC-OS in an In-Ga-Zn oxide (an In-Ga-Zn oxide may be particularly referred to as CAC-IGZO among CAC-OSs) is an indium oxide (hereinafter referred to as InO). _X1 (X1 is greater real than 0) and.), or indium zinc oxide _{(hereinafter, in X2 Zn Y2 O Z2 (} X2, Y2, and Z2 is larger real than 0) and a.), gallium An oxide (hereinafter, referred to as GaO _X3 (X3 is a real number larger than 0)) or gallium zinc oxide (hereinafter, Ga _X4 Zn _Y4 O _Z4 (X4, Y4, and Z4 are real numbers larger than 0)) to.) and the like, the material becomes mosaic by separate into, mosaic _{InO X1} or _in X2 _Zn Y2 _{O Z2,} is a configuration in which uniformly distributed in the film (hereinafter Also referred to as a cloud-like.) A.

That is, the CAC-OS is a composite oxide semiconductor having a structure in which a region containing GaO _X3 as a main component and a region containing In _X2 Zn _Y2 O _Z2 or InO _X1 as a main component are mixed. Note that in this specification, for example, it is assumed that the atomic ratio of In to the element M in the first region is larger than the atomic ratio of In to the element M in the second region. It is assumed that the In concentration is higher than that of the region No. 2.

Note that IGZO is a common name and may refer to one compound of In, Ga, Zn, and O. Representative examples are _represented by InGaO 3 _(ZnO) m1 (m1 is a natural number), or _{In (1 + x0) Ga (} 1-x0) O 3 (ZnO) m0 (-1 ≦ x0 ≦ 1, m0 is an arbitrary number) Crystalline compounds may be mentioned.

The above crystalline compound has a single crystal structure, a polycrystal structure, or a CAAC structure. Note that the CAAC structure is a crystal structure in which a plurality of IGZO nanocrystals have a c-axis orientation and are connected without being oriented in the ab plane.

On the other hand, CAC-OS relates to the material configuration of an oxide semiconductor. A CAC-OS is a material composition containing In, Ga, Zn, and O, a region which is observed as a nanoparticle mainly containing Ga as a part, and a nanoparticle mainly containing In as a part. A region observed in a shape means a configuration in which each region is randomly dispersed in a mosaic shape. Therefore, in the CAC-OS, the crystal structure is a secondary element.

Note that the CAC-OS does not include a stacked structure of two or more kinds of films having different compositions. For example, a structure including two layers of a film mainly containing In and a film mainly containing Ga is not included.

Note that a clear boundary may not be observed between a region where GaO _X3 is a main component and a region where GaO _X3 is a main component and In _X2 Zn _Y2 O _Z2 or InO _X1 is a main component.

Note that instead of gallium, selected from aluminum, yttrium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, or the like In the case where one or a plurality of kinds are included, the CAC-OS has a region which is observed in the form of a nanoparticle mainly including the metal element and a nanoparticle mainly including In as a part. The region observed in the form of particles refers to a configuration in which each of the regions is randomly dispersed in a mosaic shape.

The CAC-OS can be formed by a sputtering method without heating the substrate, for example. In the case where the CAC-OS is formed by a sputtering method, any one or more selected from an inert gas (typically, argon), an oxygen gas, and a nitrogen gas is used as a deposition gas. Good. Further, the flow rate ratio of the oxygen gas to the total flow rate of the film formation gas during the film formation is preferably as low as possible. For example, the flow rate ratio of the oxygen gas is preferably from 0% to less than 30%, more preferably from 0% to 10%. .

The CAC-OS is characterized in that a clear peak is not observed when measured using a θ / 2θ scan by an Out-of-plane method, which is one of X-ray diffraction (XRD) measurement methods. Have. That is, it is understood from the X-ray diffraction that the orientation of the measurement region in the a-b plane direction and the c-axis direction is not observed.

In an electron beam diffraction pattern obtained by irradiating an electron beam with a probe diameter of 1 nm (also referred to as a nanobeam electron beam), the CAC-OS includes a ring-shaped region having high luminance and a plurality of ring regions. Bright spots are observed. Therefore, the electron diffraction pattern shows that the crystal structure of the CAC-OS has an nc (nano-crystal) structure having no orientation in a planar direction and a cross-sectional direction.

In addition, for example, in a CAC-OS in an In-Ga-Zn oxide, GaO _X3 is a main component by EDX mapping acquired using energy dispersive X-ray spectroscopy (EDX). It can be confirmed that the region and the region containing In _X2 Zn _Y2 O _Z2 or InO _X1 as a main component are unevenly distributed and mixed.

The CAC-OS has a different structure from an IGZO compound in which metal elements are uniformly distributed, and has different properties from the IGZO compound. In other words, the CAC-OS is phase-separated into a region containing GaO _X3 or the like as a main component and a region containing In _X2 Zn _Y2 O _Z2 or InO _X1 as a main component. Has a mosaic structure.

Here, the region in which In _X2 Zn _Y2 O _Z2 or InO _X1 is a main component is a region having higher conductivity than the region in which GaO _X3 or the like is a main component. That is, the conductivity of the oxide semiconductor is exhibited by the flow of carriers in a region containing In _X2 Zn _{Y 2} O _Z2 or InO _X1 as a main component. Therefore, high field-effect mobility (μ) can be realized by distributing a region containing In _X2 Zn _Y2 O _Z2 or InO _X1 as a main component in a cloud shape in the oxide semiconductor.

On the other hand, a region containing GaO _X3 or the like as a main component is a region having higher insulating properties than a region containing In _X2 Zn _Y2 O _Z2 or InO _{X 1} as a main component. That is, a region in which GaO _X3 or the like is a main component is distributed in the oxide semiconductor, whereby a leakage current can be suppressed and a favorable switching operation can be realized.

Therefore, in the case where a CAC-OS is used for a semiconductor element, the insulating property caused by GaO _X3 or the like and the conductivity caused by In _X2 Zn _Y2 O _Z2 or InO _X1 act complementarily to each other, so that high performance is obtained. On-state current (I _on ) and high field-effect mobility (μ) can be realized.

A semiconductor element using the CAC-OS has high reliability. Therefore, CAC-OS is suitable as a constituent material of various semiconductor devices.

The layer 33 can be a supporting substrate or a layer including Si transistors (the transistors 53 and 54). The Si transistor can have a structure in which an active region is provided in a single crystal silicon substrate and a structure in which a crystalline silicon active layer is provided over an insulating surface such as a glass substrate.

FIG. 19 is a block diagram illustrating a circuit configuration of an imaging device of one embodiment of the present invention. The image pickup apparatus includes a pixel array 21 having pixels 20 arranged in a matrix, a circuit 22 (row driver) having a function of selecting a row of the pixel array 21, and a correlation double for an output signal of the pixel 20. A circuit 23 for performing sampling processing (CDS circuit), a circuit 24 having a function of converting analog data output from the circuit 23 into digital data (A / D conversion circuit or the like), and data converted by the circuit 24 And a circuit 25 (column driver) having a function of selecting and reading out the data. Note that a structure without the circuit 23 may be employed.

For example, the elements of the pixel array 21 excluding the photoelectric conversion elements can be provided in the layer 32 in FIG. Elements of the circuits 22 to 25 can be provided in the layer 33. These circuits can be constituted by CMOS circuits using silicon transistors.

With such a structure, a transistor suitable for each circuit can be used and the area of the imaging device can be reduced.

20A, 20B, and 20C are diagrams illustrating a specific configuration of the imaging device illustrated in FIG. FIG. 20A is a cross-sectional view showing the channel length direction of the transistors 51, 52, 53, and 54. FIG. 20B is a cross-sectional view taken along dashed-dotted line X1-X2 in FIG. 20A, and illustrates a cross section of the transistor 51 in the channel width direction. FIG. 20C is a cross-sectional view taken along dashed-dotted line Y1-Y2 in FIG. 20A, and illustrates a cross section of the transistor 53 in the channel width direction.

The layer 31 can have a structure including a partition 82 in addition to the photoelectric conversion element 10. The partition 82 is provided at the boundary of the pixel electrode 35 between pixels. The selenium layer used for the photoelectric conversion layer has high resistance and can have a structure that is not separated between pixels.

In the layer 32, transistors 51 and 52 which are OS transistors are provided. Although the transistors 51 and 52 each have a structure having a back gate 81, either of them may have a back gate. In some cases, the back gate 81 is electrically connected to a front gate of a transistor provided to be opposed to the back gate as illustrated in FIG. Alternatively, a configuration in which a fixed potential different from that of the front gate may be supplied to the back gate 81 may be employed.

Although a self-aligned top-gate transistor is illustrated as an OS transistor in FIG. 20A, a non-self-aligned transistor may be used as illustrated in FIG.

The transistor 33 and the transistor 54 which are Si transistors are provided in the layer 33. 20A illustrates an example in which the Si transistor includes a fin-type semiconductor layer provided on the silicon substrate 300; however, the Si transistor may be a planar type as illustrated in FIG. 21B. Alternatively, as illustrated in FIG. 21C, a transistor including a silicon thin film semiconductor layer 310 may be used. The semiconductor layer can be polycrystalline silicon or single crystal silicon of SOI (Silicon on Insulator). In addition, a circuit for driving a pixel can be provided in the layer 33.

An insulating layer 80 is provided between a region where the OS transistor is formed and a region where the Si transistor is formed. Hydrogen in the insulating layer provided near the active regions of the transistors 53 and terminates dangling bonds of silicon. Therefore, the hydrogen has an effect of improving the reliability of the transistors 53 and 54. On the other hand, hydrogen in an insulating layer provided in the vicinity of an oxide semiconductor layer which is an active layer of the transistors 51 and 52 is one of the factors for generating carriers in the oxide semiconductor layers. Therefore, the hydrogen may cause a reduction in the reliability of the transistors 51 and 52.

Therefore, in the case where one layer including a Si transistor and the other layer including an OS transistor are stacked, an insulating layer 80 having a function of preventing diffusion of hydrogen is preferably provided therebetween. By confining hydrogen in one layer by the insulating layer 80, the reliability of the transistors 53 and 54 can be improved. In addition, since the diffusion of hydrogen from one layer to the other layer is suppressed, the reliability of the transistors 51 and 52 can be improved.

As the insulating layer 80, for example, aluminum oxide, aluminum oxynitride, gallium oxide, gallium oxynitride, yttrium oxide, yttrium oxynitride, hafnium oxide, hafnium oxynitride, yttria-stabilized zirconia (YSZ), or the like can be used.

FIG. 22A is a cross-sectional view illustrating an example in which a color filter and the like are added to the imaging device of one embodiment of the present invention. In the cross-sectional view, part of a region including a pixel circuit for three pixels is shown. An insulating layer 100 is formed on the layer 31 on which the photoelectric conversion element 10 is formed. The insulating layer 100 can be formed using a silicon oxide film having high light-transmitting property with respect to visible light. Further, a silicon nitride film may be stacked as a passivation film. Further, a dielectric film such as hafnium oxide may be laminated as an antireflection film.

A light-shielding layer 110 may be formed on the insulating layer 100. The light-blocking layer 110 has a function of preventing color mixture of light passing through the upper color filter. As the light-blocking layer 110, a metal layer such as aluminum or tungsten can be used. Further, the metal layer and a dielectric film having a function as an antireflection film may be stacked.

An organic resin layer 120 can be provided as a planarization film over the insulating layer 100 and the light-blocking layer 110. A color filter 130 (color filter 130a, color filter 130b, color filter 130c) is formed for each pixel. For example, assigning colors such as R (red), G (green), B (blue), Y (yellow), C (cyan), and M (magenta) to the color filters 130a, 130b, and 130c. Thus, a color image can be obtained.

An insulating layer 160 having a property of transmitting visible light can be provided over the color filter 130.

Further, as shown in FIG. 22B, an optical conversion layer 150 may be used instead of the color filter 130. With such a configuration, an imaging device that can obtain images in various wavelength regions can be provided.

For example, if a filter that blocks light having a wavelength equal to or less than the wavelength of visible light is used for the optical conversion layer 150, an infrared imaging device can be obtained. If a filter that blocks light having a wavelength of near-infrared rays or less is used for the optical conversion layer 150, a far-infrared imaging device can be obtained. If a filter that blocks light having a wavelength equal to or longer than the wavelength of visible light is used for the optical conversion layer 150, an ultraviolet imaging device can be obtained.

In addition, if a scintillator is used for the optical conversion layer 150, an imaging device that can be used for an X-ray imaging device and obtains an image in which the intensity of radiation is visualized can be obtained. When radiation such as X-rays transmitted through a subject enters a scintillator, it is converted into light (fluorescence) such as visible light or ultraviolet light by a photoluminescence phenomenon. Then, image data is obtained by detecting the light with the photoelectric conversion element 10. Further, the imaging device having the above configuration may be used for a radiation detector or the like.

The scintillator includes a substance that, when irradiated with radiation such as X-rays or gamma rays, absorbs the energy and emits visible light or ultraviolet light. For example, Gd ₂ O ₂ S: Tb, Gd ₂ O ₂ S: Pr, Gd ₂ O ₂ S: Eu, BaFCl: Eu, NaI, CsI, CaF ₂ , BaF ₂ , CeF ₃ , LiF, LiI, ZnO, etc. Those dispersed in a resin or ceramics can be used.

Note that, in the photoelectric conversion element 10 using a selenium-based material, radiation such as X-rays can be directly converted into electric charges, so that a structure in which a scintillator is unnecessary can be employed.

Further, as shown in FIG. 22C, a microlens array 140 may be provided over the color filters 130a, 130b, and 130c. Light passing through the individual lenses of the microlens array 140 passes through the color filter immediately below, and irradiates the photoelectric conversion element 10. Further, as shown in FIG. 22D, a microlens array 140 may be provided over the optical conversion layer 150.

This embodiment can be implemented in appropriate combination with the structures described in the other embodiments.

(Embodiment 4)
In this embodiment, an example of a package containing an image sensor chip and a camera module will be described. The structure of the imaging device of one embodiment of the present invention can be used for the image sensor chip.

FIG. 23A is an external perspective view of an upper surface side of a package containing an image sensor chip. The package includes a package substrate 210 for fixing the image sensor chip 250, a cover glass 220, an adhesive 230 for bonding the two, and the like.

FIG. 23B is an external perspective view of the lower surface side of the package. The lower surface of the package has a BGA (Ball grid array) configuration using solder balls as bumps 240. In addition, not limited to BGA, LGA (Land Grid Array) or PGA (Pin Grid Array) may be used.

FIG. 23C is a perspective view of the package with a cover glass 220 and a part of the adhesive 230 omitted, and FIG. 23D is a cross-sectional view of the package. An electrode pad 260 is formed on the package substrate 210, and the electrode pad 260 and the bump 240 are electrically connected through a through hole 280 and a land 285. The electrode pad 260 is electrically connected to an electrode of the image sensor chip 250 by a wire 270.

FIG. 24A is an external perspective view of an upper surface side of a camera module in which an image sensor chip is housed in a lens-integrated package. The camera module includes a package substrate 211 to which the image sensor chip 251 is fixed, a lens cover 221, a lens 235, and the like. Further, an IC chip 290 having functions such as a driving circuit and a signal conversion circuit of an imaging device is provided between the package substrate 211 and the image sensor chip 251, and has a configuration as a SiP (System in package). I have.

FIG. 24B is an external perspective view of the lower surface side of the camera module. The lower surface and four side surfaces of the package substrate 211 have a QFN (Quad flat no-lead package) configuration in which mounting lands 241 are provided. Note that this configuration is an example, and a QFP (Quad flat package) or the above-described BGA may be used.

FIG. 24C is a perspective view of the module with a part of the lens cover 221 and the lens 235 omitted, and FIG. 24D is a cross-sectional view of the camera module. A part of the land 241 is used as an electrode pad 261, and the electrode pad 261 is electrically connected to electrodes of the image sensor chip 251 and the IC chip 290 by wires 271.

By mounting the image sensor chip in the above-described package, mounting on a printed circuit board or the like becomes easy, and the image sensor chip can be incorporated into various semiconductor devices and electronic devices.

The structure described in this embodiment can be used in appropriate combination with any of the structures described in the other embodiments.

(Embodiment 5)
As an electronic device that can use the imaging device of one embodiment of the present invention, a display device, a personal computer, an image storage device or an image reproducing device provided with a recording medium, a mobile phone, a game machine including a mobile device, and a mobile data terminal , E-book terminal, video camera, digital still camera, goggle type display (head mounted display), navigation system, sound reproduction device (car audio, digital audio player, etc.), copier, facsimile, printer, multifunction printer , An automatic teller machine (ATM), a vending machine, and the like. FIG. 25 shows specific examples of these electronic devices.

FIG. 25A illustrates a monitoring camera, which includes a housing 951, a lens 952, a supporting portion 953, and the like. The imaging device of one embodiment of the present invention can be provided as one of components for acquiring an image in the monitoring camera. Note that the surveillance camera is a conventional name and does not limit the use. For example, a device having a function as a surveillance camera is also called a camera or a video camera.

FIG. 25B illustrates a video camera, which includes a first housing 971, a second housing 972, a display portion 973, operation keys 974, a lens 975, a connection portion 976, and the like. The operation keys 974 and the lens 975 are provided on the first housing 971, and the display portion 973 is provided on the second housing 972. The imaging device of one embodiment of the present invention can be provided as one of the components for acquiring an image in the video camera.

FIG. 25C illustrates a digital camera, which includes a housing 961, a shutter button 962, a microphone 963, a light-emitting portion 967, a lens 965, and the like. The imaging device of one embodiment of the present invention can be provided as one of the components for acquiring an image in the digital camera.

FIG. 25D illustrates a wristwatch-type information terminal, which includes a housing 931, a display portion 932, a wristband 933, operation buttons 935, a crown 936, a camera 939, and the like. The display unit 932 may be a touch panel. The imaging device of one embodiment of the present invention can be provided as one of components for acquiring an image in the information terminal.

FIG. 25E illustrates an example of a mobile phone, which includes a housing 981, a display portion 982, operation buttons 983, an external connection port 984, a speaker 985, a microphone 986, a camera 987, and the like. The mobile phone includes a touch sensor in the display portion 982. All operations such as making a call and inputting characters can be performed by touching the display portion 982 with a finger, a stylus, or the like. The imaging device of one embodiment of the present invention can be provided as one of the components for acquiring an image in the mobile phone.

FIG. 25F illustrates a portable data terminal, which includes a housing 911, a display portion 912, a camera 919, and the like. Information can be input and output using the touch panel function of the display portion 912. The imaging device of one embodiment of the present invention can be provided as one of the components for acquiring an image in the portable data terminal.

Note that this embodiment can be implemented in appropriate combination with the structures described in the other embodiments.

In this example, crystalline selenium according to one embodiment of the present invention was manufactured, and crystallinity and the presence or absence of a film-peeled region were evaluated.

The samples are a total of 19 samples: samples A1 to A10 which are one embodiment of the present invention and comparative samples a1 to a9 which are comparisons. The samples A1 to A10 and the comparative samples a1 to a9 are different from each other in the presence or absence of the formation of the underlayer, the type of the underlayer, the substrate temperature at the time of the formation of the selenium layer, and the like.

<Sample>
[Sample A1 to Sample A4]
Samples A1 to A4 were formed by depositing silver as a base layer over a glass substrate by Tsub = RT. Thereafter, a selenium layer was formed at 200 nm at Tsub = 90 ° C. by an evaporation method. The underlayer and the selenium layer were formed continuously. No heat treatment was performed after the selenium layer was formed. The silver thickness of Sample A1 was 2 nm. The film thickness of silver of Sample A2 was 5 nm. The film thickness of silver of Sample A3 was 10 nm. The film thickness of silver of Sample A4 was 20 nm.

[Sample A5 and Sample A6]
Samples A5 and A6 were formed on a glass substrate as a base layer by depositing silver at a temperature of 90 ° C. Thereafter, a selenium layer was formed at 200 nm at Tsub = 90 ° C. by an evaporation method. The underlayer and the selenium layer were formed continuously. No heat treatment was performed after the selenium layer was formed. The film thickness of silver of Sample A5 was 2 nm. Sample A6 had a silver thickness of 20 nm.

[Sample A7]
Sample A7 was formed by depositing bismuth as an underlayer on a glass substrate by Tsub = RT. Thereafter, a selenium layer was formed at 200 nm at Tsub = 90 ° C. by an evaporation method. The underlayer and the selenium layer were formed continuously. No heat treatment was performed after the selenium layer was formed. The film thickness of bismuth in Sample A7 was 20 nm.

[Sample A8]
Sample A8 was formed by using ITSO as a base layer over a glass substrate by a sputtering method at Tsub = 100 ° C. Thereafter, a selenium layer was formed at 200 nm at Tsub = 90 ° C. by an evaporation method. The underlayer and the selenium layer were formed as discontinuous films. No heat treatment was performed after the selenium layer was formed. The thickness of the ITSO film of Sample A8 was 200 nm.

[Sample A9 and Sample A10]
Samples A9 and A10 were formed as a base layer on a glass substrate by sputtering ITO using Tsub = RT. After that, a 200 nm thick selenium layer was formed by an evaporation method. The underlayer and the selenium layer were formed as discontinuous films. No heat treatment was performed after the selenium layer was formed. The film thickness of ITO in Sample A9 and Sample A10 was 100 nm. The selenium layer of Sample A9 was formed at Tsub = 90 ° C. The selenium layer of Sample A10 was formed at Tsub = 100 ° C.

[Comparative sample a1]
The comparative sample a1 was formed on a glass substrate as a base layer by depositing silver using Tsub = RT. Thereafter, a selenium layer was formed to a thickness of 200 nm by a vapor deposition method using Tsub = RT. The underlayer and the selenium layer were formed continuously. No heat treatment was performed after the selenium layer was formed. The silver thickness of the comparative sample a1 was 20 nm.

[Comparative sample a2]
Comparative sample a2 was formed by depositing bismuth as an underlayer on a glass substrate by Tsub = RT. Thereafter, a selenium layer was formed to a thickness of 200 nm by a vapor deposition method using Tsub = RT. The underlayer and the selenium layer were formed continuously. No heat treatment was performed after the selenium layer was formed. The film thickness of bismuth of Comparative Sample a2 was 20 nm.

[Comparative sample a3]
Comparative sample a3 was formed by sputtering titanium as a base layer on a glass substrate by Tsub = RT. Thereafter, a selenium layer was formed at 200 nm at Tsub = 90 ° C. by an evaporation method. The underlayer and the selenium layer were formed continuously. No heat treatment was performed after the selenium layer was formed. The thickness of titanium of Comparative Sample a3 was 20 nm.

[Comparative sample a4]
Comparative sample a4 was formed by sputtering indium as a base layer on a glass substrate by Tsub = RT. Thereafter, a selenium layer was formed at 200 nm at Tsub = 90 ° C. by an evaporation method. The underlayer and the selenium layer were formed continuously. No heat treatment was performed after the selenium layer was formed. The film thickness of indium of the comparative sample a4 was 20 nm.

[Comparative Samples a5 to a9]
In Comparative Samples a5 to a9, a selenium layer was formed to a thickness of 500 nm over a glass substrate by an evaporation method. Comparative samples a5 to a9 did not form an underlayer. No heat treatment was performed after the selenium layer was formed. The selenium layer of Comparative Sample a5 was formed with Tsub = RT. The selenium layer of the comparative sample a6 was formed at Tsub = 50 ° C. The selenium layer of the comparative sample a7 was formed at Tsub = 60 ° C. The selenium layer of the comparative sample a8 was formed at Tsub = 70 ° C. The selenium layer of the comparative sample a9 was formed at Tsub = 90 ° C.

Table 2 shows the conditions of each sample. Table 2 shows the film type of the underlayer, the method of forming the underlayer, the substrate temperature (Tsub) at the time of forming the underlayer, the film thickness of the underlayer, the method of forming the selenium layer, and the time of forming the selenium layer for each sample. 2 shows the substrate temperature (Tsub) and the thickness of the selenium layer. The description of RT in the column of the substrate temperature (Tsub) indicates that the film was formed at room temperature (RT) without heating the substrate. The column described as “underlayer-selenium interlayer” indicates whether the underlayer deposition and the selenium layer deposition were performed continuously or discontinuously. The column described as heat treatment indicates whether heat treatment was performed after the selenium layer was formed. In this example, no heat treatment was performed on any of the samples.

<Sample preparation method>
The method for manufacturing each sample is described with reference to FIGS. FIGS. 26A and 26B are cross-sectional views illustrating a method for manufacturing a sample.

First, a base layer 63 was formed over a substrate 61 (see FIG. 26A).

As the substrate 61, a glass substrate AN100 manufactured by Asahi Glass Co., Ltd. was used.

In Samples A1 to A6, silver was used for the base layer 63. For sample A1, silver was deposited to a thickness of 2 nm at Tsub = RT by an evaporation method. As Sample A2, silver was deposited to a thickness of 5 nm at Tsub = RT by an evaporation method. For sample A3, silver was formed to a thickness of 10 nm at Tsub = RT by an evaporation method. Sample A4 was formed by depositing 20 nm of silver at Tsub = RT using an evaporation method. For sample A5, a silver film was formed to a thickness of 2 nm at Tsub = 90 ° C. by an evaporation method. Sample A6 was formed by depositing silver with a thickness of 20 nm at Tsub = 90 ° C. by an evaporation method.

Sample A7 used bismuth for the underlayer 63. A 20 nm film was formed at Tsub = RT using an evaporation method.

In Sample A8, ITSO was used for the base layer 63. A 200 nm film was formed at Tsub = 100 ° C. by using a sputtering method.

In Samples A9 and A10, ITO was used for the base layer 63. A 100 nm film was formed at Tsub = RT using a sputtering method.

In Comparative Sample a1, silver was used for the underlayer 63. A 20 nm film was formed at Tsub = RT using an evaporation method.

The comparative sample a2 used bismuth for the underlayer 63. A 20 nm film was formed at Tsub = RT using an evaporation method.

In Comparative Sample a3, titanium was used for the underlayer 63. A 20 nm film was formed at Tsub = RT using a sputtering method.

The comparative sample a4 used indium for the underlayer 63. A 20 nm film was formed at Tsub = RT using a sputtering method.

In Comparative Samples a5 to a9, the underlayer 63 was not formed.

For the formation of the underlayer 63 of the samples A1 to A7, the comparative sample a1, and the comparative sample a2, a deposition chamber of a combined evaporation-sputtering device (device model number: VD15-065) manufactured by Shinko Seiki Co., Ltd. was used. Using resistance heating (Ta board), about 0.20 nm / sec. An underlayer was formed at a deposition rate of. The pressure during the deposition was about 1.0 × 10 ⁻⁵ Pa. Samples A1 to A6 and Comparative Sample a1 used silver as an evaporation source. Sample A7 and comparative sample a2 used bismuth as an evaporation source.

The underlayer 63 of the sample A8, the comparative sample a3, and the comparative sample a4 was formed using a sputtering chamber of a combined evaporation-sputtering device (device model number: VD15-065) manufactured by Shinko Seiki Co., Ltd. For the sample A8, an ITSO target was used, and as a deposition gas, an argon (Ar) gas at a flow rate of 50 sccm and an oxygen (O ₂ ) gas at a flow rate of ₂ sccm were used. The pressure during film formation was adjusted to be 0.4 Pa. The deposition power was 200 W. As the ITSO target, a target having a weight ratio of In ₂ O ₃ : SnO ₂ : SiO ₂ = 85: 10: 5 was used. As a comparative sample a3, a titanium target was used, and as a film forming gas, an argon (Ar) gas having a flow rate of 40 sccm was used. The pressure during film formation was adjusted to be 0.4 Pa. The deposition power was 400 W. The comparative sample a4 used an indium target, and the deposition gas used was an argon (Ar) gas having a flow rate of 40 sccm. The pressure during film formation was adjusted to be 0.4 Pa. The deposition power was 400 W.

The underlayer 63 of Samples A9 and A10 was formed using a sputtering device (device number: E401-S) manufactured by Canon Anelva Engineering. An ITO target was used, and a deposition gas used was an argon (Ar) gas having a flow rate of 30 sccm and an oxygen (O ₂ ) gas having a flow rate of 30 sccm. The pressure during film formation was adjusted to be 0.2 Pa. The deposition power was 100 W. As the ITO target, a target having an atomic ratio of In: Sn = 9: 1 was used.

Next, a selenium layer 65 was formed (see FIG. 26B).

For Samples A1 to A9, selenium was deposited to a thickness of 200 nm at Tsub = 90 ° C. by an evaporation method. For sample A10, selenium was deposited to a thickness of 200 nm at Tsub = 100 ° C. by an evaporation method.

As the comparative sample a1 and the comparative sample a2, selenium was deposited to a thickness of 200 nm by Tsub = RT using an evaporation method. For Comparative Sample a3 and Comparative Sample a4, selenium was deposited to a thickness of 200 nm at Tsub = 90 ° C. by an evaporation method. For the comparative sample a5, selenium was formed to a thickness of 500 nm by Tsub = RT using an evaporation method. For the comparative sample a6, selenium was formed to a thickness of 500 nm at Tsub = 50 ° C. by an evaporation method. For the comparative sample a7, selenium was formed to a thickness of 500 nm at Tsub = 60 ° C. by an evaporation method. For the comparative sample a8, selenium was formed to a thickness of 500 nm at Tsub = 70 ° C. by an evaporation method. For the comparative sample a9, selenium was formed to a thickness of 500 nm at Tsub = 90 ° C. by an evaporation method.

For the samples A1 to A7 and the comparative samples a1 to a4, the selenium layer 65 was continuously formed in vacuum after the formation of the base layer 63. The samples A8 to A10 were each exposed to the air atmosphere after the formation of the underlayer 63, and then the selenium layer 65 was formed.

For the deposition of the selenium layers of Samples A1 to A10 and Comparative Samples a1 to a9, a deposition chamber of a combined evaporation-sputtering apparatus (device model number: VD15-065) manufactured by Shinko Seiki Co., Ltd. was used. The deposition of selenium is performed using resistance heating (Ta board) at about 0.20 nm / sec. At a deposition rate of The pressure during the deposition was about 1.0 × 10 ⁻⁵ Pa.

Through the above steps, Samples A1 to A10 and Comparative Samples a1 to a9 were manufactured.

<XRD measurement>
Next, XRD measurements of Samples A1 to A10 and Comparative Samples a1 to a9 were performed to evaluate the crystallinity of the selenium layer. For XRD measurement, X-ray diffractometer D8 manufactured by Bruker AXS
DISCOVER Hybrid was used, and a CuKα ray having a wavelength of 0.15418 nm was used as an X-ray source.

XRD spectra of Samples A1 to A6 are shown in FIGS. FIG. 27 shows a spectrum obtained by a θ-2θ scanning method which is a kind of an out-of-plane method, and the horizontal axis represents a diffraction angle 2θ [deg. ], And the vertical axis indicates the diffraction X-ray intensity (Intensity) [arbitrary unit (arb. Unit)]. The θ-2θ scanning method is a method of changing the incident angle of X-rays and measuring the X-ray diffraction intensity by setting the angle of a detector provided facing the X-ray source to be the same as the incident angle. The θ-2θ scan method may be called a powder method. FIG. 28 shows a spectrum obtained by a GIXRD (Grading-Incidence XRD) method which is a kind of an out-of-plane method, and the horizontal axis represents a diffraction angle 2θ [deg. ], And the vertical axis indicates the diffraction X-ray intensity (Intensity) [arbitrary unit (arb. Unit)]. The GIXRD method is a method of measuring the X-ray diffraction intensity by fixing the incident angle of X-rays to a very shallow angle and changing the angle of a detector provided to face the X-ray source. The GIXRD method may be referred to as a 2θ scan method, a thin film method, or a Seemann-Bohlin method. In the GIXRD method, the X-ray incident angle is 0.35 deg. And fixed.

FIGS. 27 and 28 show Se (ICSD code 40018), Ag (ICSD code 44387) and Ag ₂ Se (ICSD) of the inorganic crystal structure database (ICSD).
code 15213) is also shown.

As shown in FIGS. 27 and 28, the peaks observed in Samples A1 to A6 using silver for the underlayer almost coincide with the peak positions of Se (ICSD code 40018), and thus, Samples A1 to A6 were used. Was confirmed to be crystalline selenium. It was found that crystalline selenium can be obtained by forming a film of selenium by heating using silver for the underlayer.

XRD spectra of Samples A7 to A10 are shown in FIGS. FIG. 29 shows a spectrum obtained by the θ-2θ scanning method. The horizontal axis represents the diffraction angle 2θ [deg. ], And the vertical axis indicates the diffraction X-ray intensity (Intensity) [arbitrary unit (arb. Unit)]. FIG. 30 shows a spectrum obtained by the GIXRD method. The horizontal axis represents the diffraction angle 2θ [deg. ], And the vertical axis indicates the diffraction X-ray intensity (Intensity) [arbitrary unit (arb. Unit)]. In the GIXRD method, the X-ray incident angle is set to 0.35 deg. And fixed.

FIGS. 29 and 30 show Se (ICSD code 40018), Bi (ICSD code 64703), and Bi ₂ Se ₃ (ICSD) of the inorganic crystal structure database (ICSD).
165226) and In _1.94 Sn _0.06 O ₃ (ICSD code 50847) are also shown.

As shown in FIGS. 29 and 30, the peak observed in sample A7 using bismuth for the underlayer almost coincides with the peak position of Se (ICSD code 40018), so that the selenium layer of sample A7 has crystalline selenium. Was confirmed. It was found that crystalline selenium can be obtained by heating and forming selenium using bismuth for the underlayer.

Since the peak observed in Sample A8 using ITSO for the underlayer almost coincides with the peak position of Se (ICSD code 40018), it was confirmed that the selenium layer of Sample A8 was crystalline selenium. It was found that crystalline selenium can be obtained by forming a film of selenium by heating using ITSO for the underlayer.

Since the peaks observed in Samples A9 and A10 using ITO as the underlayer almost coincide with the peak positions of In _1.94 Sn _0.06 O ₃ (ICSD code 50847) and Se (ICSD code 40018). It was confirmed that the selenium layers of Samples A9 and A10 were crystalline selenium. It was found that crystalline selenium can be obtained by forming a film of selenium by heating using ITO for the underlayer. It is considered that selenium was crystallized by the compound containing selenium and indium or the compound containing selenium and tin, and crystalline selenium was obtained.

XRD spectra of Comparative Samples a1 to a4 are shown in FIGS. FIG. 31 shows a spectrum obtained by the θ-2θ scanning method, and the horizontal axis represents the diffraction angle 2θ [deg. ], And the vertical axis indicates the diffraction X-ray intensity (Intensity) [arbitrary unit (arb. Unit)]. FIG. 32 shows a spectrum obtained by the GIXRD method. The horizontal axis represents the diffraction angle 2θ [deg. ], And the vertical axis indicates the diffraction X-ray intensity (Intensity) [arbitrary unit (arb. Unit)]. In the GIXRD method, the X-ray incident angle is set to 0.35 deg. And fixed.

FIGS. 31 and 32 show Se (ICSD code 40018), Ag (ICSD code 44387), Ag ₂ Se (ICSD code 15213), Bi (ICSD code 64703), and Ti (ICSD code 41503) in the inorganic crystal structure database (ICSD). ) And In (ICSD code 171679).

As shown in FIGS. 31 and 32, the minute peak observed in the comparative sample a1 almost coincides with the peak position of Ag ₂ Se (ICSD code 15213), so that the comparative sample a1 has Ag ₂ Se. I understood. Since no peak attributed to Se was observed, it was found that the selenium layer of Comparative Sample a1 had low crystallinity. Comparative sample a1 is a sample in which silver is used for the underlayer and a selenium layer is formed at room temperature. On the other hand, the above-mentioned sample A4 is a sample in which silver is used for the base layer and a selenium layer is formed by heating. In sample A4, a peak attributed to Se was observed, and in comparative sample a1, no peak was observed. Therefore, it was clarified that crystalline selenium can be obtained after forming a selenium film by forming a selenium layer by heating using silver for the underlayer.

Since no peak attributed to Se was observed in Comparative Sample a2, it was found that the selenium layer of Comparative Sample a2 had low crystallinity. Comparative sample a2 is a sample in which bismuth is used for the underlayer and a selenium layer is formed at room temperature. On the other hand, the above-mentioned sample A7 is a sample in which bismuth is used for the base layer and a selenium layer is formed by heating. In sample A7, a peak attributed to Se was observed, and in comparative sample a2, no peak was observed. Therefore, it was clarified that crystalline selenium can be obtained after selenium deposition by forming a selenium layer by heating using bismuth for the underlayer.

Since the minute peak observed in the comparative sample a3 almost coincides with the peak position of Ti (ICSD code 41503), it was found that the comparative sample a3 had Ti. Since no peak attributed to Se was observed, it was found that the selenium layer of Comparative Sample a3 had low crystallinity. Comparative sample a3 is a sample in which titanium is used for the base layer and a selenium layer is formed by heating. Therefore, it was found that it was difficult to obtain crystalline selenium after selenium deposition even when selenium was deposited by heating using titanium for the underlayer.

Since the minute peak observed in the comparative sample a4 almost coincides with the peak position of In (ICSD code 171679), it was found that the comparative sample a4 had In. Since no peak attributed to Se was observed, it was found that the selenium layer of Comparative Sample a4 had low crystallinity. Comparative sample a4 is a sample in which indium was used for the underlayer and a selenium layer was formed by heating. Therefore, it was found that even when indium was used for the base layer and the selenium layer was formed by heating, it was difficult to obtain crystalline selenium after the selenium film was formed.

FIG. 33 shows XRD spectra of Comparative Samples a5 to a9. FIG. 33 shows a spectrum obtained by the θ-2θ scanning method, and the horizontal axis represents the diffraction angle 2θ [deg. ], And the vertical axis indicates the diffraction X-ray intensity (Intensity) [arbitrary unit (arb. Unit)].

FIG. 33 shows Se (ICSD code 40018), Ag (ICSD code 44387), and Ag ₂ Se (ICSD code) of the inorganic crystal structure database (ICSD).
15213) is also shown.

As shown in FIG. 33, in Comparative Samples a5 to a8, no peak attributed to Se was observed. In Comparative Sample a9, a peak attributed to Se was observed, but was a very minute peak. Therefore, it was found that the selenium layers of Comparative Samples a5 to a9 had low crystallinity. Comparative Samples a5 to a9 are samples in which a selenium layer was formed without forming a base layer. Therefore, it was found that a crystalline selenium layer was obtained by forming the underlayer.

<SEM observation>
Next, SEM observation of Samples A1 to A10 and Comparative Samples a1 to a9 was performed to evaluate the presence or absence of a film peeling region of the selenium layer. For SEM observation, a scanning electron microscope apparatus SU8030 manufactured by Hitachi High-Technologies Corporation was used, the acceleration voltage was 1 kV, and the observation magnification was 10,000 times.

FIG. 34A shows an SEM image of the plane of the sample A1, FIG. 34B shows an SEM image of the plane of the sample A2, FIG. 34C shows an SEM image of the plane of the sample A3, and FIG. FIG. 34D shows an SEM image of the plane of the sample A5 in FIG. 34E, and FIG. 34F shows an SEM image of the plane of the sample A6. As shown in FIGS. 34A to 34F, in each of Samples A1 to A6 using silver for the base layer, no film-peeled region was observed. It was found that by using silver for the underlayer, crystalline selenium having a small film peeling region can be manufactured.

FIG. 35A shows an SEM image of the plane of the sample A7, FIG. 35B shows an SEM image of the plane of the sample A8, FIG. 35C shows an SEM image of the plane of the sample A9, and FIG. It is shown in FIG. As shown in FIG. 35A, in Sample A7 using bismuth for the base layer, no film-peeled region was observed. It was found that by using bismuth for the underlayer, crystalline selenium with a small film peeling region can be manufactured. As shown in FIGS. 35B to 35D, in each of Samples A8 to A10 in which ITO or ITSO was used for the base layer, a film-peeled region was observed. By using ITO or ITSO for the underlayer, crystalline selenium can be produced, but it was not possible to completely suppress the occurrence of a film peeling region. Note that in FIGS. 35B to 35D, the particles having a distorted shape are considered to be crystallized selenium.

FIG. 36A shows an SEM image of a plane of the comparative sample a3, and FIG. 36B shows an SEM image of a plane of the comparative sample a4. As shown in FIGS. 36A and 36B, in Comparative Sample a3 and Comparative Sample a4 using titanium or indium for the base layer, no film peeling region was observed. As described above, in Comparative Sample a3 and Comparative Sample a4, no peak was observed by XRD, and the crystallinity of the selenium layer was low.

FIG. 37A shows an SEM image of the plane of the comparative sample a5, FIG. 37B shows an SEM image of the plane of the comparative sample a6, FIG. 37C shows an SEM image of the plane of the comparative sample a8, and FIG. 37D is shown in FIG. In Comparative Sample a5, no film peeling region was observed. As shown in FIGS. 37B to 37D, in Comparative Sample a6, Comparative Sample a8, and Comparative Sample a9, a film peeling region was observed, and it was confirmed that selenium was aggregated. As described above, in Comparative Samples a5 to a8, no peak was observed by XRD. In Comparative Sample a9, although a peak attributed to Se was observed, it was a very minute peak. Note that in FIG. 37D, it is considered that particles having a distorted shape are crystalline selenium and particles having a smooth shape are amorphous selenium. As shown in Comparative Samples a5 to a9, when the selenium layer was formed by heating without providing the underlayer, it was found that the selenium layer had low crystallinity and a film peeling region was easily generated. Therefore, it was found that the formation of the underlayer was very effective in producing crystalline selenium having a small film peeling region.

In this example, crystalline selenium according to one embodiment of the present invention was manufactured, and crystallinity and the presence or absence of a film-peeled region were evaluated.

The samples are a total of 10 samples of Sample A4, Sample A7, Sample A8, and Samples B1 to B3, which are one embodiment of the present invention, and Comparative Samples a3, a4, b1, and b2, which are comparisons. . Sample A4, sample A7, sample A8, sample B1 to sample B3, comparative sample a3, comparative sample a4, comparative sample b1 and comparative sample b2 have a film type of the underlayer, whether the underlayer and the selenium layer are continuously formed or not. They are different from each other in the continuous film formation. Sample A4, sample A7, sample A8, comparative sample a3, and comparative sample a4 are the same as the samples described in Example 1.

<Sample>
[Sample A4 and Sample B1]
Samples A4 and B1 were each formed on a glass substrate with a thickness of 20 nm as a base layer by evaporation of silver using Tsub = RT. Thereafter, a selenium layer was formed at 200 nm at Tsub = 90 ° C. by an evaporation method. No heat treatment was performed after the selenium layer was formed. In Sample A4, a base layer and a selenium layer were continuously formed. In sample B1, a base layer and a selenium layer were formed as discontinuous films.

[Sample A7 and Sample B2]
As a sample A7 and a sample B2, bismuth was formed as an underlayer on a glass substrate to have a thickness of 20 nm by a vapor deposition method and Tsub = RT. Thereafter, a selenium layer was formed at 200 nm at Tsub = 90 ° C. by an evaporation method. No heat treatment was performed after the selenium layer was formed. In Sample A7, an underlayer and a selenium layer were continuously formed. In Sample B2, the underlayer and the selenium layer were formed as discontinuous films.

[Sample B3 and Sample A8]
In Samples B3 and A8, ITSO was formed as a base layer over a glass substrate by sputtering with a thickness of 200 nm at Tsub = 100 ° C. Thereafter, a selenium layer was formed at 200 nm at Tsub = 90 ° C. by an evaporation method. No heat treatment was performed after the selenium layer was formed. In Sample B3, an underlayer and a selenium layer were continuously formed. In Sample A8, the base layer and the selenium layer were formed as discontinuous films.

[Comparative sample a3 and comparative sample b1]
In Comparative Sample a3 and Comparative Sample b1, titanium was formed as a base layer on a glass substrate by sputtering with a thickness of 20 nm using Tsub = RT. Thereafter, a selenium layer was formed at 200 nm at Tsub = 90 ° C. by an evaporation method. No heat treatment was performed after the selenium layer was formed. In Comparative Sample a3, an underlayer and a selenium layer were continuously formed. In the comparative sample b1, the underlayer and the selenium layer were formed as discontinuous films.

[Comparative sample a4 and comparative sample b2]
Comparative sample a4 and comparative sample b2 were each formed as a base layer on a glass substrate by sputtering indium with a thickness of 20 nm by Tsub = RT. Thereafter, a selenium layer was formed at 200 nm at Tsub = 90 ° C. by an evaporation method. No heat treatment was performed after the selenium layer was formed. In Comparative Sample a4, an underlayer and a selenium layer were continuously formed. In Comparative Sample b2, the underlayer and the selenium layer were formed as discontinuous films.

Table 3 shows the conditions of each sample. Table 3 shows the film type of the underlayer, the method of forming the underlayer, the substrate temperature (Tsub) when forming the underlayer, the thickness of the underlayer, the method of forming the selenium layer, and the time of forming the selenium layer for each sample. 2 shows the substrate temperature (Tsub) and the thickness of the selenium layer. The description of RT in the column of the substrate temperature (Tsub) indicates that the film was formed at room temperature (RT) without heating the substrate. The column described as “underlayer-selenium interlayer” indicates whether the underlayer deposition and the selenium layer deposition were performed continuously or discontinuously. The column described as heat treatment indicates whether heat treatment was performed after the selenium layer was formed. In this example, no heat treatment was performed on any of the samples.

<Sample preparation method>
The method for manufacturing each sample is described with reference to FIGS. The description of the sample A4, the sample A7, the sample A8, the comparative sample a3, and the comparative sample a4 can be referred to the description of Example 1, and thus the description is omitted.

First, a base layer 63 was formed over a substrate 61 (see FIG. 26A).

As the substrate 61, a glass substrate AN100 manufactured by Asahi Glass Co., Ltd. was used.

Sample B1 used silver for the underlayer 63. A 20 nm film was formed at Tsub = RT using an evaporation method.

Sample B2 used bismuth for the underlayer 63. A 20 nm film was formed at Tsub = RT using an evaporation method.

Sample B3 used ITSO for the underlayer 63. A 200 nm film was formed at Tsub = 100 ° C. by using a sputtering method.

In the comparative sample b1, titanium was used for the underlayer 63. A 20 nm film was formed at Tsub = RT using a sputtering method.

The comparative sample b2 used indium for the underlayer 63. A 20 nm film was formed at Tsub = RT using a sputtering method.

For the formation of the underlayer 63 of the samples B1 and B2, a deposition chamber of a combined evaporation-sputtering apparatus (apparatus model number: VD15-065) manufactured by Shinko Seiki Co., Ltd. was used. Using resistance heating (Ta board), about 0.20 nm / sec. An underlayer was formed at a deposition rate of. The pressure during the deposition was about 1.0 × 10 ⁻⁵ Pa. Sample B1 used silver as an evaporation source. For sample B2, bismuth was used as an evaporation source.

The underlayer 63 of the sample B3, the comparative sample b1, and the comparative sample b2 was formed using a sputtering chamber of a combined evaporation-sputtering apparatus (device model number: VD15-065) manufactured by Shinko Seiki. For the sample B3, an ITSO target was used, and as a deposition gas, an argon (Ar) gas at a flow rate of 50 sccm and an oxygen (O ₂ ) gas at a flow rate of ₂ sccm were used. The pressure during film formation was adjusted to be 0.4 Pa. The deposition power was 200 W. As the ITSO target, a target having a weight ratio of In ₂ O ₃ : SnO ₂ : SiO ₂ = 85: 10: 5 was used. The comparative sample b1 used a titanium target, and the deposition gas used was an argon (Ar) gas having a flow rate of 40 sccm. The pressure during film formation was adjusted to be 0.4 Pa. The deposition power was 400 W. The comparative sample b2 used an indium target, and the deposition gas used was an argon (Ar) gas having a flow rate of 40 sccm. The pressure during film formation was adjusted to be 0.4 Pa. The deposition power was 400 W.

Next, a selenium layer 65 was formed (see FIG. 26B).

For Sample B1, Sample B2, Sample B3, Comparative Sample b1, and Comparative Sample b2, selenium was formed to a thickness of 200 nm at Tsub = 90 ° C. by an evaporation method.

The sample B1, the sample B2, the comparative sample b1, and the comparative sample b2 were once exposed to the atmosphere after forming the underlayer 63, and then the selenium layer 65 was formed. For sample B3, the selenium layer 65 was continuously formed in vacuum after the formation of the underlayer 63.

For the deposition of the selenium layers of the sample B1, the sample B2, the sample B3, the comparative sample b1, and the comparative sample b2, a deposition chamber of a combined evaporation-sputtering apparatus (device model number: VD15-065) manufactured by Shinko Seiki Co., Ltd. is used. Was. The deposition of selenium is performed using resistance heating (Ta board) at about 0.20 nm / sec. At a deposition rate of The pressure during the deposition was about 1.0 × 10 ⁻⁵ Pa.

Through the above steps, Sample B1, Sample B2, Sample B3, Comparative Sample b1, and Comparative Sample b2 were produced.

<XRD measurement>
Next, XRD measurement of Sample B1, Sample B2, Sample B3, Comparative Sample b1, and Comparative Sample b2 was performed to evaluate the crystallinity of the selenium layer. For XRD measurement, an X-ray diffractometer D8 DISCOVER Hybrid manufactured by Bruker AXS was used, and a CuKα ray having a wavelength of 0.15418 nm was used as an X-ray source.

The XRD spectra of Sample B1, Sample B2, and Sample B3 are shown in FIGS. FIG. 38 shows a spectrum obtained by the θ-2θ scanning method, and the horizontal axis represents the diffraction angle 2θ [deg. ], And the vertical axis indicates the diffraction X-ray intensity (Intensity) [arbitrary unit (arb. Unit)]. FIG. 39 shows a spectrum obtained by the GIXRD method, and the horizontal axis represents the diffraction angle 2θ [deg. ], And the vertical axis indicates the diffraction X-ray intensity (Intensity) [arbitrary unit (arb. Unit)]. In the GIXRD method, the X-ray incident angle is 0.35 deg. And fixed.

38 and 39 show Se (ICSD code 40018), Ag (ICSD code 44387) and Ag ₂ Se (ICSD) of the inorganic crystal structure database (ICSD).
code 15213) is also shown. The spectra of Sample A4, Sample A7, and Sample A8 are also shown.

As shown in FIGS. 38 and 39, the peaks observed in Samples A4 and B1 using silver for the underlayer almost coincide with the peak positions of Se (ICSD code 40018), so that Samples A4 and B1 were obtained. Was confirmed to be crystalline selenium. As shown in FIG. 38, the sample A4 has a larger XRD peak and higher crystallinity than the sample B1. In Sample A4, since an underlayer and a selenium layer were continuously formed, impurities such as the air atmosphere did not adhere to the surface of the underlayer, and a favorable interface between the underlayer and the selenium layer was formed when the selenium layer was formed. It is thought that it became easy to change. It was found that the underlayer and the selenium layer were preferably formed continuously.

The peaks observed in Samples A7 and B2 using bismuth for the underlayer are Se (ICSD
Since the peak position almost coincides with the peak position of Code 40018), it was confirmed that the selenium layers of Samples A7 and B2 were crystalline selenium. As shown in FIG. 38, the sample A7 has a larger XRD peak and higher crystallinity than the sample B2. In Sample A7, since the underlayer and the selenium layer were continuously formed, impurities such as the air atmosphere did not adhere to the surface of the underlayer, and a favorable interface between the underlayer and the selenium layer was formed when the selenium layer was formed. It is thought that it became easy to change. It was found that the underlayer and the selenium layer were preferably formed continuously.

In Sample B3 using ITSO for the underlayer, no peak was observed. Similarly, the peak observed in the sample A8 using ITSO for the underlayer almost coincides with the peak position of Se (ICSD code 40018), so it was confirmed that the selenium layer of the sample A8 was crystalline selenium. The cause of the higher crystallinity of sample A8, which is a discontinuous film formation, is higher than that of sample B3, which is a continuous film formation of an underlayer and a selenium layer. It is presumed that the state of the surface of the underlayer changes due to exposure to the air atmosphere, and selenium is easily crystallized.

The XRD spectra of Comparative Sample b1 and Comparative Sample b2 are shown in FIGS. FIG. 40 shows a spectrum obtained by the θ-2θ scanning method, and the horizontal axis represents the diffraction angle 2θ [deg. ], And the vertical axis indicates the diffraction X-ray intensity (Intensity) [arbitrary unit (arb. Unit)]. FIG. 41 shows a spectrum obtained by the GIXRD method, and the horizontal axis represents the diffraction angle 2θ [deg. ], And the vertical axis indicates the diffraction X-ray intensity (Intensity) [arbitrary unit (arb. Unit)]. In the GIXRD method, the X-ray incident angle is set to 0.35 deg. And fixed.

FIGS. 40 and 41 also show the spectra of Se (ICSD code 40018), Ti (ICSD code 41503), and In (ICSD code 171679) of the Inorganic Crystal Structure Database (ICSD). In addition, the spectra of Comparative Sample a3 and Comparative Sample a4 are also shown.

As shown in FIGS. 40 and 41, the minute peaks observed in the comparative sample a3 and the comparative sample b1 almost coincide with the peak positions of Ti (ICSD code 41503). It was found to have Ti. Since no peak attributed to Se was observed, it was found that the selenium layers of Comparative Sample a3 and Comparative Sample b1 had low crystallinity. Comparative sample a3 and comparative sample b1 are samples obtained by heating and forming a selenium layer by using titanium for the base layer. Therefore, it was found that it was difficult to obtain crystalline selenium after selenium deposition even when selenium was deposited by heating using titanium for the underlayer.

The minute peak observed in the comparative sample a4 and the comparative sample b2 is In (ICSD code
171679), which indicates that the comparative sample a4 and the comparative sample b2 have In. Since no peak attributed to Se was observed, it was found that the selenium layers of Comparative Sample a4 and Comparative Sample b2 had low crystallinity. Comparative sample a4 and comparative sample b2 are samples in which selenium layers are formed by heating using indium for the base layer. Therefore, it was found that even when indium was used for the base layer and the selenium layer was formed by heating, it was difficult to obtain crystalline selenium after the selenium film was formed.

<SEM observation>
Next, SEM observation of the sample B1, the sample B2, the sample B3, and the comparative sample b2 was performed, and the presence or absence of a film peeling region of the selenium layer was evaluated. For SEM observation, a scanning electron microscope apparatus SU8030 manufactured by Hitachi High-Technologies Corporation was used, the acceleration voltage was 1 kV, and the observation magnification was 10,000 times.

FIG. 42A shows the SEM image of the plane of the sample B1, FIG. 42B shows the SEM image of the plane of the sample B2, FIG. 42C shows the SEM image of the plane of the sample B3, and the SEM image of the plane of the comparative sample b2. Is shown in FIG.

As shown in FIG. 42A, in Sample B1 in which silver was used for the base layer, no film-peeled region was observed. It was found that by using silver for the underlayer, crystalline selenium having a small film peeling region can be manufactured.

As shown in FIG. 42B, in the sample B2 using bismuth for the base layer, a film peeled region was observed. As shown in Table 3, both Sample A7 and Sample B2 used bismuth for the underlayer, and differed in that the underlayer and the selenium layer were formed continuously or discontinuously. In Sample A7 which was a continuous film formation, no film peeling region was observed as shown in FIG. On the other hand, in the sample B2 which is a discontinuous film formation, a film peeling region was observed. Therefore, in sample A7, since the underlayer and the selenium layer were continuously formed, impurities such as the air atmosphere did not adhere to the surface of the underlayer, and a favorable interface between the underlayer and the selenium layer was formed when the selenium layer was formed. It is considered that selenium became hard to aggregate, and the occurrence of a film peeling region was suppressed. That is, it was found that by using bismuth for the base layer and continuously forming the base layer and the selenium layer, crystalline selenium having a small film peeling region can be manufactured.

As shown in FIG. 42C, in Sample B3 in which ITSO was used for the base layer, no film-peeled region was observed. As described above, in Sample B3, no XRD peak was observed, and the selenium layer had low crystallinity.

As shown in FIG. 42 (D), in the comparative sample b2 using indium for the base layer, a film peeling region was observed. As described above, in Comparative Sample b2, no XRD peak was observed, and the selenium layer had low crystallinity.

In this example, crystalline selenium according to one embodiment of the present invention was manufactured, and crystallinity and the presence or absence of a film-peeled region were evaluated.

The samples are six samples in total, which are samples C1 to C6 according to one embodiment of the present invention. Samples C1 to C6 have different heat treatments after the selenium layer is formed.

<Sample>
[Sample C1 to Sample C6]
In Samples C1 to C6, silver was formed as a base layer on a glass substrate to have a thickness of 2 nm by an evaporation method using Tsub = RT. Thereafter, a selenium layer was formed to a thickness of 200 nm by a vapor deposition method using Tsub = RT. The underlayer and the selenium layer were formed continuously. Heat treatment was performed after the selenium layer was formed. The heat treatment of the sample C1 was performed at 70 ° C. for 3 minutes. And Sample C2 was subjected to a first heat treatment at 70 ° C. for 3 minutes. , Followed by a second heat treatment at 90 ° C. for 10 sec. Processed. Sample C3 was subjected to a first heat treatment at 70 ° C. for 3 minutes. , And then continuously as a second heat treatment at 110 ° C. for 10 sec. Processed. Sample C4 was subjected to first heat treatment at 70 ° C. for 3 min. , Followed by a second heat treatment at 150 ° C. for 10 sec. Processed. Sample C5 was subjected to first heat treatment at 70 ° C. for 3 minutes. , Followed by a second heat treatment at 200 ° C. for 60 sec. Processed. The heat treatment of the sample C6 was not performed at 70 ° C., but was performed at 200 ° C. for 60 sec. Only processing.

Tables 4 and 5 show the conditions of each sample. Table 4 shows the film type of the underlayer, the method of forming the underlayer, the substrate temperature (Tsub) at the time of forming the underlayer, the film thickness of the underlayer, the method of forming the selenium layer, and the time of forming the selenium layer of each sample. 2 shows the substrate temperature (Tsub) and the thickness of the selenium layer. The description of RT in the column of the substrate temperature (Tsub) indicates that the film was formed at room temperature (RT) without heating the substrate. The column described as “underlayer-selenium interlayer” indicates whether the underlayer deposition and the selenium layer deposition were performed continuously or discontinuously. The column described as heat treatment indicates whether heat treatment was performed after the selenium layer was formed. Table 5 shows the conditions of the heat treatment after forming the selenium layer of each sample.

<Sample preparation method>
A method for manufacturing each sample is described with reference to FIGS. FIGS. 43A to 43C are cross-sectional views illustrating a method for manufacturing a sample.

First, a base layer 63 was formed over a substrate 61 (see FIG. 43A).

As the substrate 61, a glass substrate AN100 manufactured by Asahi Glass Co., Ltd. was used.

In samples C1 to C6, silver was used for the base layer 63. A 2 nm film was formed at Tsub = RT using an evaporation method.

For the formation of the underlayer 63 of the samples C1 to C6, a deposition chamber of a combined evaporation-sputtering apparatus (device model number: VD15-065) manufactured by Shinko Seiki Co., Ltd. was used. Using resistance heating (Ta board), about 0.20 nm / sec. An underlayer was formed at a deposition rate of. The pressure during the deposition was about 1.0 × 10 ⁻⁵ Pa. Samples C1 to C6 used silver as an evaporation source.

Next, a selenium layer 67 was formed (see FIG. 43B).

In Samples C1 to C6, a 200-nm-thick selenium layer 67 was formed at Tsub = RT by an evaporation method.

Next, heat treatment was performed to obtain a selenium layer 65 (see FIG. 43C). A hot plate (apparatus model number: EC-1200N) manufactured by As One Corporation was used for the heat treatment. The heat treatment was performed in an air atmosphere. Sample C1 was 70 ° C. for 3 min. Processed. Sample C2 was subjected to a first heat treatment at 70 ° C. for 3 minutes. , Followed by a second heat treatment at 90 ° C. for 10 sec. Processed. Sample C3 was subjected to a first heat treatment at 70 ° C. for 3 minutes. , And then continuously as a second heat treatment at 110 ° C. for 10 sec. Processed. Sample C4 was subjected to first heat treatment at 70 ° C. for 3 min. , Followed by a second heat treatment at 150 ° C. for 10 sec. Processed. Sample C5 was subjected to first heat treatment at 70 ° C. for 3 minutes. , Followed by a second heat treatment at 200 ° C. for 60 sec. Processed. Sample C6 was 200 ° C. for 60 sec. Processed. In this example, the heat treatment was performed in the draft chamber.

Through the above steps, Samples C1 to C6 were manufactured.

<XRD measurement>
Next, XRD measurement of Samples C1 to C5 was performed to evaluate the crystallinity of the selenium layer. For XRD measurement, an X-ray diffractometer D8 DISCOVER Hybrid manufactured by Bruker AXS was used, and a CuKα ray having a wavelength of 0.15418 nm was used as an X-ray source.

The XRD spectra of Samples C1 to C5 are shown in FIGS. FIG. 44 shows a spectrum obtained by the θ-2θ scanning method, and the horizontal axis represents the diffraction angle 2θ [deg. ], And the vertical axis indicates the diffraction X-ray intensity (Intensity) [arbitrary unit (arb. Unit)]. FIG. 45 shows a spectrum obtained by the GIXRD method. The horizontal axis represents the diffraction angle 2θ [deg. ], And the vertical axis indicates the diffraction X-ray intensity (Intensity) [arbitrary unit (arb. Unit)]. In the GIXRD method, the X-ray incident angle is 0.35 deg. And fixed.

44 and 45 show Se (ICSD code 40018), Ag (ICSD code 44387) and Ag ₂ Se (ICSD) of the inorganic crystal structure database (ICSD).
code 15213) is also shown.

As shown in FIGS. 44 and 45, the peaks observed in Samples C3 to C5 almost coincide with the peak positions of Se (ICSD code 40018), so that the selenium layers of Samples C3 to C5 are made of crystalline selenium. I was able to confirm that there was. In FIG. 44, it was found that the peak height was higher and the peak width was smaller in the order of Sample C3, Sample C4, and Sample C5. That is, it was found that the higher the temperature of the heat treatment, the higher the crystallinity of the selenium layer.

<SEM observation>
Next, SEM observation of Samples C1 to C5 was performed to evaluate the presence or absence of a film peeling region of the selenium layer. For SEM observation, a scanning electron microscope apparatus SU8030 manufactured by Hitachi High-Technologies Corporation was used, the acceleration voltage was 1 kV, and the observation magnification was 10,000 times.

FIG. 46A shows an SEM image of the plane of the sample C1, FIG. 46B shows an SEM image of the plane of the sample C2, FIG. 46C shows an SEM image of the plane of the sample C3, and FIG. FIG. 46D shows an SEM image of a plane of the sample C5 shown in FIG. As shown in FIGS. 46A to 46E, in any of Samples C1 to C5 in which silver was used for the base layer, no film-peeled region was observed. As described above, in Samples C3 to C5, a peak was observed by XRD, and the selenium layer had high crystallinity. Therefore, it was found that the formation of the underlayer was very effective in producing crystalline selenium having a small film peeling region.

<TEM observation, EDX measurement>
Next, the samples C3 to C5 were sliced with a focused ion beam (FIB), and the cross sections of the samples C3 to C5 were observed with a STEM. In addition, the cross section of each of Samples C3 to C5 was subjected to composition analysis by EDX measurement. For FIB processing, a FIB-SEM double beam apparatus XVision 210DB manufactured by SII Nanotechnology was used, the acceleration voltage was 30 kV, and gallium (Ga) was used as irradiation ions. For STEM observation and EDX measurement, a scanning transmission electron microscope HD-2700 manufactured by Hitachi High-Technologies Corporation was used, the acceleration voltage was 200 kV, and the beam diameter was about 0.4 nmφ.

In the EDX measurement, a silicon drift detector Octane T Ultra manufactured by EDAX was used as a detector. In the EDX measurement, the lower limit of detection was about 1 atomic%. The EDX measurement can detect elements from boron (B) having an atomic number of 5 to uranium (U) having an atomic number of 92.

STEM images of the cross section of the sample C3 are shown in FIGS. 47, 48A, 48B, 49A, 49B, 50A, and 50B.

FIG. 47 is a transmission electron image (TE image: Transmission Electron Image) at a magnification of 50,000 times. As shown in FIG. 47, it was confirmed that the surface of the selenium layer of Sample C3 was substantially flat. Note that a carbon film was provided on the selenium layer as a sample protection film during FIB processing. Further, a platinum film was provided to prevent electrification during STEM observation.

FIG. 48A is a transmission electron image (TE image) at a magnification of 200,000. FIG. 48B is a Z contrast image (ZC image) at a magnification of 200,000 times at the same place as in FIG. 48A. In the Z contrast image, a substance having a larger atomic number looks brighter. As shown in FIGS. 48A and 48B, it is confirmed that the density (luminance) of the STEM image in the selenium layer is substantially uniform, and that the film quality in the selenium layer of sample C3 is substantially uniform. It could be confirmed.

FIGS. 49A, 49B, and 50A are transmission electron images (TE images) at a magnification of 3,000,000 times. FIG. 49A is a STEM image near the surface of the selenium layer. The observation point is point1-1 shown in FIG. 50 (B). FIG. 49B is a STEM image near the center in the thickness direction of the selenium layer. The observation location is point1-2 shown in FIG. FIG. 50A is a STEM image of the selenium layer near the glass substrate. The observation point is point 1-3 shown in FIG. 50 (B). In FIG. 49B and FIG. 50A, a crystal lattice image could be confirmed. This corresponds to the fact that a peak indicating a crystal of sample C3 is observed in the XRD measurement described above.

STEM images of a cross section of the sample C4 are shown in FIGS. 51, 52A, 52B, 53A, 53B, 54A, and 54B.

FIG. 51 is a transmission electron image (TE image) at a magnification of 50,000 times. As shown in FIG. 51, it was confirmed that the surface of the selenium layer of Sample C4 was substantially flat.

FIG. 52A is a transmission electron image (TE image) at a magnification of 200,000. FIG. 52B is a Z contrast image (ZC image) at the same magnification as in FIG. As shown in FIGS. 52 (A) and 52 (B), the density (luminance) of the STEM image in the selenium layer is substantially uniform, and the film quality in the selenium layer of sample C4 is substantially uniform. It could be confirmed.

FIGS. 53A, 53B, and 54A are transmission electron images (TE images) at a magnification of 3,000,000 times. FIG. 53A is a STEM image near the surface of the selenium layer. The observation point is point 2-1 shown in FIG. FIG. 53B is a STEM image near the center of the selenium layer in the thickness direction. The observation point is point 2-2 shown in FIG. FIG. 54A is a STEM image of the selenium layer near the glass substrate. The observation point is point 2-3 shown in FIG. 54 (B). In FIGS. 53A, 53B, and 54A, a crystal lattice image could be confirmed. This corresponds to the fact that a peak indicating a crystal of sample C4 is observed in the XRD measurement described above. In addition, since the crystal lattice image of Sample C4 can be clearly confirmed as compared with Sample C3, it was confirmed that the crystallinity was high.

STEM images of the cross section of Sample C5 are shown in FIGS. 55, 56 (A), 56 (B), 57 (A), 57 (B), 58 (A) and 58 (B).

FIG. 55 is a transmission electron image (TE image) at a magnification of 50,000 times. As shown in FIG. 55, it was confirmed that the surface of the selenium layer of Sample C5 was substantially flat.

FIG. 56A is a transmission electron image (TE image) at a magnification of 200,000. FIG. 56B is a Z-contrast image (ZC image) at the same magnification as in FIG. 56A at a magnification of 200,000. As shown in FIG. 56 (A) and FIG. 56 (B), the density (luminance) of the STEM image in the selenium layer is substantially uniform, and the film quality in the selenium layer of sample C5 is substantially uniform. It could be confirmed. Compared with the sample C3 at 110 ° C. and the sample C4 at 150 ° C. in the second heat treatment, the sample C5 at 200 ° C. has a more uniform density (luminance) of the STEM image in the selenium layer. That is, it was found that the film quality in the selenium layer was more uniform.

In addition, in the sample C6, a film peeling region that can be visually confirmed after the heat treatment was generated. Sample C6 was not subjected to a heat treatment at 70 ° C., and was heated at 200 ° C. for 60 sec. This is a sample in which only heat treatment was performed. It is presumed that silver diffuses into the selenium layer by the heat treatment at 70 ° C. to form a compound having selenium and silver. It is considered that in Sample C6, before the compound containing selenium and silver was sufficiently formed, the selenium layer was crystallized by the heat treatment at 200 ° C., and thus a film peeling region was generated. Therefore, after the first heat treatment is performed at a temperature (for example, 70 ° C.) at which a compound having selenium and an element X is formed, a second heat treatment is performed at a higher temperature than the first heat treatment, and the second heat treatment is performed. It was found that it was preferable to set the temperature to crystallize (for example, 200 ° C.).

FIGS. 57 (A), 57 (B) and 58 (A) are transmission electron images (TE images) at a magnification of 3,000,000. FIG. 57A is a STEM image near the surface of the selenium layer. The observation point is point 3-1 shown in FIG. FIG. 57B is a STEM image near the center of the selenium layer in the thickness direction. The observation point is point 3-2 shown in FIG. FIG. 58A is a STEM image of the selenium layer near the glass substrate. The observation point is point 3-3 shown in FIG. 57A, 57B and 58A, a crystal lattice image could be confirmed. This corresponds to the fact that a peak indicating a crystal of sample C5 is observed in the XRD measurement described above. Further, as compared with Sample C3 and Sample C4, Sample C5 was able to clearly confirm the crystal lattice image, and thus was confirmed to have high crystallinity.

Next, the EDX spectrum will be described. In the EDX measurement, the measurement point was irradiated with an electron beam, and the energy of the characteristic X-rays generated thereby and the number of times of generation were measured to obtain an EDX spectrum. The obtained spectrum was subjected to peak separation to identify elements. The EDX measurement points were three places near the surface of the selenium layer, near the center in the thickness direction, and near the glass substrate of Samples C3 to C5, respectively.

FIG. 59 shows a STEM image of a cross section of the sample C3 and EDX measurement points. EDX spectra are shown in FIGS. 60 (A) to 60 (C). FIG. 60A is an EDX spectrum near the surface of the selenium layer. The observation points are points 1-4 shown in FIG. FIG. 60B is an EDX spectrum near the center in the thickness direction of the selenium layer. The observation point is point 1-5 shown in FIG. FIG. 60C is an EDX spectrum of the selenium layer near the glass substrate. The observation point is point 1-6 shown in FIG.

FIG. 61 shows a STEM image of the cross section of Sample C4 and EDX measurement points. EDX spectra are shown in FIGS. 62 (A) to 62 (C). FIG. 62A is an EDX spectrum near the surface of the selenium layer. The observation point is point 2-4 shown in FIG. FIG. 62B is an EDX spectrum near the center in the thickness direction of the selenium layer. The observation point is point 2-5 shown in FIG. FIG. 62C is an EDX spectrum of the selenium layer near the glass substrate. The observation point is point 2-6 shown in FIG.

FIG. 63 shows a STEM image of the cross section of Sample C5 and EDX measurement points. EDX spectra are shown in FIGS. 64 (A) to 64 (C). FIG. 64A is an EDX spectrum near the surface of the selenium layer. The observation point is point 3-4 shown in FIG. FIG. 64B is an EDX spectrum near the center in the thickness direction of the selenium layer. The observation point is point 3-5 shown in FIG. FIG. 64C is an EDX spectrum of the selenium layer near the glass substrate. The observation point is point 3-6 shown in FIG.

In FIGS. 60 (A) to 60 (C), FIGS. 62 (A) to 62 (C), and FIGS. 64 (A) to 64 (C), the horizontal axis represents characteristic X-ray energy (Energy) [keV]. And the vertical axis indicates the characteristic X-ray intensity (Intensity) [counts].

All EDX measurement points of Samples C3 to C5 are derived from carbon (C), oxygen (O), silicon (Si), silver (Ag), copper (Cu), gallium (Ga), and selenium (Se). A peak was observed. Table 6 shows the atomic concentrations [atomic%] of carbon (C), oxygen (O), silicon (Si), silver (Ag), copper (Cu), gallium (Ga), and selenium (Se). The atomic concentration [atomic%] shown in Table 6 indicates the number of atoms of carbon (C), oxygen (O), silicon (Si), silver (Ag), copper (Cu), gallium (Ga), and selenium (Se). When the total is 100.0 atomic%, the ratio of the number of atoms of each element is shown. Carbon (C), oxygen (O), silicon (Si), copper (Cu), gallium (Ga), and selenium (Se) were each quantified using peaks derived from the electronic transition of atoms to the K shell. Silver (Ag) was quantified using a peak derived from the electronic transition of the atom to the L shell. Note that carbon (C), oxygen (O), and silicon (Si) are considered to be derived from the collodion film used for the analysis. Copper (Cu) is considered to be due to scattering from the mesh used for the collodion film. Gallium (Ga) is considered to be derived from FIB processing.

The ratio of the atomic concentration of silver to selenium (Ag / Se) is shown in Table 7 and FIG. Ag / Se can also be said to be the ratio of the number of silver atoms to selenium.

In Table 7, the column described as “Ag / Se” indicates Ag / Se for each EDX measurement point. The column described as “average 1” indicates the average value of Ag / Se for each sample. The column described as “average2” indicates the average value of Ag / Se at the EDX measurement points of all the samples C3 to C5.

In sample C3, the minimum value of Ag / Se was 0.119, the maximum value was 0.172, and the average value was 0.141. In sample C4, the minimum value of Ag / Se was 0.065, the maximum value was 0.255, and the average value was 0.140. In sample C5, the minimum value of Ag / Se was 0.086, the maximum value was 0.144, and the average value was 0.112. The average value of the measurement points of all the samples C3 to C5 was 0.131.

In FIG. 65, the horizontal axis indicates the sample name, and the vertical axis indicates Ag / Se [arbitrary unit (arb. Unit)]. Open circles indicate the values of Ag / Se for each EDX measurement point. The broken line of the black square indicates the average value (average 1) of Ag / Se for each sample. The alternate long and short dash line indicates the average value (average 2) of Ag / Se of the EDX measurement points of all the samples C3 to C5. Note that the silver concentration distribution may locally change due to the effect of heat generated by FIB processing or electron beam irradiation in EDX measurement. Therefore, the actual Ag / Se may be lower than the values shown in Table 7 and FIG.

As shown in Table 7 and FIG. 65, in each of Samples C3 to C5, there was no significant difference in Ag / Se at the measurement points, so that Ag was uniformly distributed in the selenium layer. I understood. In addition, since there was no significant difference in Ag / Se between the samples C3 to C5, it was found that Ag was uniformly distributed in the selenium layer in these heat treatment temperature ranges. Do you get it. It was found that the selenium layers of Samples C3 to C5 had a region where Ag / Se was 0.050 or more and 0.30 or less. It was found that by setting the above-mentioned range of Ag / Se, uniform crystalline selenium having a small film peeling area can be produced.

Reference Signs List 10 photoelectric conversion element 11 photoelectric conversion layer 11a crystalline selenium layer 11b amorphous selenium layer 11c crystalline selenium layer 12 hole injection blocking layer 13 buffer layer 14 electrode 15 electrode 16 selenium layer 20 pixel 21 pixel array 22 circuit 23 circuit 24 circuit 25 Circuit 31 Layer 32 Layer 33 Layer 35 Pixel electrode 36 Photoelectric conversion layer 37 Common electrode 51 Transistor 52 Transistor 53 Transistor 54 Transistor 56 High voltage power supply 61 Substrate 63 Underlayer 65 Selenium layer 67 Selenium layer 71 Wiring 72 Wiring 73 Wiring 75 Wiring 76 Wiring 77 wiring 78 wiring 79 wiring 80 insulating layer 81 back gate 82 partition wall 100 insulating layer 110 light shielding layer 120 organic resin layer 130 color filter 130a color filter 130b color filter 130c color filter 140 micro lens array 150 Chemical conversion layer 160 Insulating layer 210 Package substrate 211 Package substrate 220 Cover glass 221 Lens cover 230 Adhesive 235 Lens 240 Bump 241 Land 250 Image sensor chip 251 Image sensor chip 260 Electrode pad 261 Electrode pad 270 Wire 271 Wire 280 Through hole 285 Land 290 IC chip 300 Silicon substrate 310 Semiconductor layer 411 Electrode 413 Photoelectric conversion layer 415 Electrode 417 Hole injection blocking layer 419 Electron injection blocking layer 441 Layer 443 Underlayer 443a Underlayer 443b Underlayer 445 Selenium layer 911 Housing 912 Display unit 919 Camera 931 housing 932 display portion 933 wristband 935 button 936 crown 939 camera 951 housing 952 lens 953 support portion 961 housing 962 shutter Button 963 Microphone 965 Lens 967 Light emitting unit 971 Housing 972 Housing 973 Display unit 974 Operation keys 975 Lens 976 Connection unit 981 Housing 982 Display unit 983 Operation buttons 984 External connection port 985 Speaker 986 Microphone 987 Camera

Claims (16)

A first electrode, a second electrode, and a photoelectric conversion layer provided between the first electrode and the second electrode;
The photoelectric conversion layer contains selenium and the element X,
The photoelectric conversion element wherein the element X is at least one of silver and bismuth. In claim 1,
The photoelectric conversion element, wherein the photoelectric conversion layer has a region in which a ratio of the number of atoms of the element X to the number of atoms of selenium (X / Se) is 0.0010 or more and 0.70 or less. In claim 1,
The photoelectric conversion element, wherein the photoelectric conversion layer has a stack of a crystalline selenium layer and an amorphous selenium layer. A first electrode, a second electrode, a hole injection blocking layer, and a photoelectric conversion layer;
The hole injection blocking layer is provided between the second electrode and the photoelectric conversion layer,
The photoelectric conversion layer is provided between the first electrode and the hole injection blocking layer,
The hole injection blocking layer and the photoelectric conversion layer have a region in contact with each other,
The second electrode has a light-transmitting property,
The hole injection blocking layer has an oxide containing indium and gallium,
The photoelectric conversion element, wherein the photoelectric conversion layer has a stack of a crystalline selenium layer and an amorphous selenium layer. In claim 4,
The photoelectric conversion element in which the amorphous selenium layer has a region in contact with the hole injection blocking layer. In claim 4,
The photoelectric conversion element in which the crystalline selenium layer is thinner than the amorphous selenium layer. In any one of claims 4 to 6,
The thickness tn of the hole injection blocking layer is 5 nm or more and 20 nm or less. In any one of claims 4 to 6,
A photoelectric conversion element, wherein an alloy layer of silver and selenium is provided between the photoelectric conversion layer and the first electrode. In claim 8,
A photoelectric conversion element in which a crystalline selenium layer is provided between the silver and selenium alloy layer and the first electrode.   An imaging device, wherein a pixel includes the photoelectric conversion element according to claim 1 or 4 and a transistor including a metal oxide in a semiconductor layer. In claim 10,
The imaging device, wherein the metal oxide includes In, Zn, and M (M is Al, Ti, Ga, Sn, Y, Zr, La, Ce, Nd, or Hf).   An electronic apparatus comprising the imaging device according to claim 10 and a display device. Providing a base layer having the element X on the first electrode;
Heating the underlayer, providing a layer having selenium on the underlayer,
Providing a second electrode on the selenium-containing layer,
The method for manufacturing a photoelectric conversion element, wherein the element X is at least one of silver and bismuth. In claim 13,
The method for manufacturing a photoelectric conversion element, wherein the heating temperature is 50 ° C. or more and 90 ° C. or less. Providing a base layer having the element X on the first electrode;
Providing a layer having selenium on the underlayer,
Performing a first heat treatment on the selenium-containing layer;
Performing a second heat treatment at a higher temperature than the first heat treatment to form a layer containing crystalline selenium;
Providing a second electrode on the layer containing crystalline selenium,
The method for manufacturing a photoelectric conversion element, wherein the element X is at least one of silver and bismuth. In claim 15,
The first heat treatment is at least 50 ° C. and at most 90 ° C.,
The method for manufacturing a photoelectric conversion element in which the second heat treatment is higher than the temperature of the first heat treatment and is higher than or equal to 70 ° C and lower than or equal to 220 ° C.

Images