JPWO2018101437A1 - Variable phase multiplier - Google Patents

Variable phase multiplier Download PDF

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JPWO2018101437A1
JPWO2018101437A1 JP2018554263A JP2018554263A JPWO2018101437A1 JP WO2018101437 A1 JPWO2018101437 A1 JP WO2018101437A1 JP 2018554263 A JP2018554263 A JP 2018554263A JP 2018554263 A JP2018554263 A JP 2018554263A JP WO2018101437 A1 JPWO2018101437 A1 JP WO2018101437A1
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multiplier
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JP6826349B2 (en
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澄人 常木
章雄 福島
均 久保田
慎吾 田丸
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National Institute of Advanced Industrial Science and Technology AIST
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/82Types of semiconductor device ; Multistep manufacturing processes therefor controllable by variation of the magnetic field applied to the device
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03BGENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B15/00Generation of oscillations using galvano-magnetic devices, e.g. Hall-effect devices, or using superconductivity effects
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03BGENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B19/00Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source
    • H03B19/06Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source by means of discharge device or semiconductor device with more than two electrodes
    • H03B19/14Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source by means of discharge device or semiconductor device with more than two electrodes by means of a semiconductor device
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00Galvanomagnetic devices
    • H10N50/10Magnetoresistive devices

Abstract

本発明の位相可変型逓倍器は、基準信号の周波数frefをn倍に逓倍する逓倍器と、同期後の周波数fに等しいか又は同期可能な同期前周波数fMRを持つ高周波を出力する磁気抵抗素子と、同期前周波数fMRの周波数を変えるためのバイアス電圧印加機構とを備える。基準信号の周波数frefとして同期後の周波数fの(1/n)倍(nは2以上の自然数又はその逆数)の周波数(1/n)fを磁気抵抗素子に注入同期することにより、逓倍器から基準信号の周波数frefのn倍の周波数fを持つ第1の高周波出力が出力され、磁気抵抗素子から同期された周波数fを持つ第2の高周波出力が出力され、バイアス電圧印加機構によって同期前周波数fMRを変えることにより、第1の高周波出力の位相に対して第2の高周波出力の位相を変えることができる。The phase variable type multiplier of the present invention includes a multiplier that multiplies the frequency fref of the reference signal by n times, and a magnetoresistive element that outputs a high frequency having a pre-synchronization frequency fMR that is equal to or synchronizable with the frequency f after synchronization. And a bias voltage applying mechanism for changing the frequency of the pre-synchronization frequency fMR. By multiplying the frequency (1 / n) f of (1 / n) times (n is a natural number of 2 or more) or the frequency (1 / n) f of the reference signal frequency fref by injection locking to the magnetoresistive element, a multiplier is obtained. Outputs a first high-frequency output having a frequency f that is n times the frequency fref of the reference signal, and outputs a second high-frequency output having a synchronized frequency f from the magnetoresistive element before being synchronized by the bias voltage application mechanism. By changing the frequency fMR, the phase of the second high frequency output can be changed with respect to the phase of the first high frequency output.

Description

本発明は、一般的に周波数逓倍器に関し、より具体的には、高周波の位相を変えることができる位相可変型の周波数逓倍器に関する。   The present invention generally relates to frequency multipliers, and more particularly to a phase variable frequency multiplier capable of changing the phase of a high frequency.

マイクロ波(1GHz〜300GHz程度)を含む高周波(100MHz〜300GHz程度)を使った通信技術は、近年ますます重要になり、その技術は携帯電話、無線LAN、衛星放送、レーダー等における無線通信で広く使用されている。無線通信では送りたい信号を高周波の振幅、周波数又は位相の変調に置き換えることで、情報の送受信を行っている。   In recent years, communication technology using high frequencies (about 100 MHz to 300 GHz) including microwaves (about 1 GHz to 300 GHz) has become more and more important, and the technology is widely used in wireless communication in mobile phones, wireless LANs, satellite broadcasting, radars, etc. in use. In wireless communication, information is transmitted and received by replacing a signal to be transmitted with high-frequency amplitude, frequency, or phase modulation.

通信量の増大に伴い、無線通信での信号の高周波化が進んでおり、高周波発振器の周波数を整数倍(2倍、3倍、・・)に増大させる逓倍器(周波数逓倍器)の重要性も年々増している。一方で、近年、無線通信において、高周波信号の指向性を持たせることが望まれている。高周波信号の指向性を持たせるには、高周波の位相を任意に変える必要がある。例えば、レーダーに指向性を持たせたフェイズドアレイレーダーがそうである。   As the amount of communication increases, the frequency of radio communication signals is increasing, and the importance of a multiplier (frequency multiplier) that increases the frequency of a high-frequency oscillator to an integral multiple (2 times, 3 times,...). It is also increasing year by year. On the other hand, in recent years, it has been desired to provide high-frequency signal directivity in wireless communication. In order to give high-frequency signal directivity, it is necessary to arbitrarily change the phase of the high-frequency signal. For example, a phased array radar in which the radar has directivity.

また、周波数逓倍器で用いられるものを含めて、より小型で安価な高周波発振器の需要もますます高まっている。その小型化を目指して、例えば、特許文献1に例示される磁気抵抗素子(以下、「MR素子」という)を用いた高周波発振器が提案されている。MR素子を用いた高周波発振器では、従来の共振器(VCO)を利用する高周波発振器と同様に、出力周波数が安定しない(ピーク幅が広い)という問題がある。その問題解決のため、注入同期という手法が提案されている(非特許文献1)。   There is also an increasing demand for smaller and cheaper high-frequency oscillators, including those used in frequency multipliers. With the aim of reducing the size, for example, a high-frequency oscillator using a magnetoresistive element (hereinafter referred to as “MR element”) exemplified in Patent Document 1 has been proposed. In the high frequency oscillator using the MR element, there is a problem that the output frequency is not stable (the peak width is wide) similarly to the high frequency oscillator using the conventional resonator (VCO). In order to solve this problem, a technique called injection locking has been proposed (Non-Patent Document 1).

注入同期では、基準信号源を付加し、基準信号源から出力する安定した(ピーク幅が狭い)高周波をMR素子に注入することにより、MR素子の出力周波数を安定させる(ピーク幅を狭くする)ものである。これは、基準信号の周波数とMR素子の同期前周波数の周波数差が所定のバンド幅よりも小さい場合に、MR素子の出力周波数が基準信号の出力周波数と同じになる現象を利用するものである。その場合、周波数が同じになるだけでなく、周波数が正確に追従し同期するので、MR素子の出力周波数を安定させることができる。   In injection locking, by adding a reference signal source and injecting a stable (narrow peak width) high frequency output from the reference signal source into the MR element, the output frequency of the MR element is stabilized (the peak width is narrowed). Is. This utilizes the phenomenon that the output frequency of the MR element becomes the same as the output frequency of the reference signal when the frequency difference between the frequency of the reference signal and the pre-synchronization frequency of the MR element is smaller than a predetermined bandwidth. . In this case, not only the frequency becomes the same, but also the frequency follows and synchronizes accurately, so that the output frequency of the MR element can be stabilized.

特開2006−295908号公報JP 2006-295908 A

W. H. Rippard, MR. Pufall, S. Kaka, T. J. Silva, S. E. Russek, J. A. Katine, Physical Review Letters 95 (2005) 067203W. H. Rippard, MR. Pufall, S. Kaka, T. J. Silva, S. E. Russek, J. A. Katine, Physical Review Letters 95 (2005) 067203

本発明の目的は、高周波発振器としてMR素子を用いかつ注入同期を利用して、高周波の位相を変えることができる位相可変型の周波数逓倍器(以下、「位相可変型逓倍器」と呼ぶ)を提供することである。   An object of the present invention is to provide a phase variable frequency multiplier (hereinafter referred to as “phase variable multiplier”) that can change the phase of a high frequency by using an MR element as a high frequency oscillator and utilizing injection locking. Is to provide.

既出の注入同期は、MR素子の出力周波数の安定性を向上させる(ピーク幅を狭くする)だけでなく、上述の課題である位相差Δφを任意に制御できる。詳しく言えば、基準信号の周波数frefとMR素子が出力する同期前周波数fMRとの位相差Δφは、

Δφ=arcsin{(fMR―fref)/W} (1)

の関係がある。arcsinは逆正弦関数である。MR素子の同期前周波数fMRは、印加する電圧、磁界、温度などにより可変にする(制御する)ことができるので、注入同期により、基準信号の出力とMR素子からの出力の各周波数はfという所定値(固定値)のまま、位相差Δφだけを変えることができる。ただ、出力する2つの高周波fの位相差Δφは必ずしも、このΔφと同一ではない。何故ならば、信号線を通ることで位相がずれるからである。ここでは、出力する2つの高周波の位相差Δφが上記の式(1)に由来して変えることができることを説明したいだけである。
The above injection locking not only improves the stability of the output frequency of the MR element (decreases the peak width), but can also arbitrarily control the phase difference Δφ which is the above-mentioned problem. Specifically, the phase difference Δφ between the frequency f ref of the reference signal and the pre-synchronization frequency f MR output by the MR element is

Δφ = arcsin {(f MR −f ref ) / W} (1)

There is a relationship. arcsin is an arc sine function. Since the pre-synchronization frequency f MR of the MR element can be varied (controlled) by the applied voltage, magnetic field, temperature, etc., each frequency of the output of the reference signal and the output from the MR element is f by injection locking. Only the phase difference Δφ can be changed with the predetermined value (fixed value). However, the phase difference Δφ between the two output high frequencies f is not necessarily the same as Δφ. This is because the phase is shifted by passing through the signal line. Here, it is only necessary to explain that the phase difference Δφ between the two high frequencies to be output can be changed from the above equation (1).

他方、注入同期はどんなときに起きるかと言うと、同期後の周波数をfとするとき、基準信号の出力周波数frefがfに等しく、MR素子の出力(共鳴)周波数fMRがfに等しいときにだけに起こるのではなく、基準信号の周波数frefがfのn倍(nは2以上の自然数又はその逆数)と等しいか又は「ほぼ等しい」ときにも起こる。同期が起こり得るバンド幅Wは基準信号の高周波出力を大きくすると広くなる傾向があり、「ほぼ等しい」と言ってもfの40%以内、好ましくは30%以内なら同期可能である。従って、本明細書では、「ほぼ等しい」とは言わずに「同期可能な」とも表現する。On the other hand, when injection locking occurs, when the frequency after synchronization is f, the output frequency f ref of the reference signal is equal to f, and the output (resonance) frequency f MR of the MR element is equal to f. This occurs not only when the reference signal frequency f ref is equal to or “nearly equal” n times f (n is a natural number greater than or equal to 2). The bandwidth W at which synchronization can occur tends to increase when the high-frequency output of the reference signal is increased. Even if “substantially equal” is satisfied, synchronization is possible within 40% of f, preferably within 30%. Therefore, in this specification, the expression “synchronizable” is used instead of “substantially equal”.

本発明者らはこのn倍に着目して本発明を成すに至った。本発明では、同期後の周波数をfとするとき、基準信号の周波数frefとして、周波数が通常の1倍のものではなく1/n倍(f/n)に等しいものを用いて注入同期を行うこととした。そして、基準信号をMR素子系とは別に出力に回し、その際に周波数を逓倍器によりn倍に戻すこととした。なお、一般的には逓倍器は周波数を2倍、3倍、…と増大させる機器であるが、本発明では1/2、1/3倍…に減少させるものも説明の都合で逓倍器と呼ぶ。こうすることにより、逓倍器から逓倍された周波数fを持つ高周波が出力(出力1)させ、他方、MR素子系から基準信号と同期がとれた周波数fを持つ高周波が出力(出力2)させることができる。その際に、MR素子は同期前周波数fMRが可変可能であるので、出力1の位相は安定させつつ、出力2の位相を変えることができ、その結果、所定の(変えることが可能な)位相差Δφを得ることができる。これが、本発明の位相可変型逓倍器(n倍逓倍器)の位相可変の概要(原理)である。The inventors of the present invention have made the present invention paying attention to this n times. In the present invention, when the frequency after synchronization is f, injection locking is performed using a frequency f ref of the reference signal that is equal to 1 / n times (f / n) instead of one time as usual. I decided to do it. Then, the reference signal is sent to the output separately from the MR element system, and at that time, the frequency is returned to n times by the multiplier. In general, a multiplier is a device that increases the frequency by 2 times, 3 times,..., But in the present invention, a device that reduces the frequency by 1/2, 1/3 times,. Call. By doing so, the high frequency having the frequency f multiplied by the multiplier is output (output 1), while the high frequency having the frequency f synchronized with the reference signal is output (output 2) from the MR element system. Can do. At this time, since the pre-synchronization frequency f MR of the MR element can be varied, the phase of the output 1 can be changed while the phase of the output 1 is stabilized. As a result, the MR element can be changed to a predetermined (can be changed). A phase difference Δφ can be obtained. This is an outline (principle) of phase variation of the phase variable type multiplier (n-times multiplier) of the present invention.

上述した原理に基づき本発明の一態様の位相可変型逓倍器は、基準信号の周波数frefをn倍に逓倍する逓倍器と、同期後の周波数fに等しいか又は同期可能な同期前周波数fMRを持つ高周波を出力する磁気抵抗素子と、同期前周波数fMRの周波数を変えるためのバイアス電圧印加機構と、を備える。そして、基準信号の周波数frefとして同期後の周波数fの1/n倍(nは2以上の自然数又はその逆数)の周波数(1/n)fを磁気抵抗素子に注入同期することにより、逓倍器から基準信号の周波数frefのn倍の周波数fを持つ第1の高周波出力が出力され、磁気抵抗素子から同期された周波数fを持つ第2の高周波出力が出力される。さらに、バイアス電圧印加機構によって同期前周波数fMRを変えることにより、第1の高周波出力の位相に対して第2の高周波出力の位相を変えることができる。Based on the above-described principle, the phase variable multiplier according to one aspect of the present invention includes a multiplier that multiplies the frequency f ref of the reference signal by n times, and a pre-synchronization frequency f that is equal to or synchronizable with the frequency f after synchronization. A magnetoresistive element that outputs a high frequency having MR and a bias voltage application mechanism for changing the frequency of the pre-synchronization frequency f MR are provided. The frequency (1 / n) f, which is 1 / n times the frequency f after synchronization (n is a natural number equal to or greater than 2) or the inverse thereof, is injected and synchronized with the magnetoresistive element as the frequency fref of the reference signal, thereby being multiplied. A first high-frequency output having a frequency f that is n times the frequency f ref of the reference signal is output from the device, and a second high-frequency output having a synchronized frequency f is output from the magnetoresistive element. Furthermore, the phase of the second high-frequency output can be changed with respect to the phase of the first high-frequency output by changing the pre-synchronization frequency f MR by the bias voltage application mechanism.

本発明の一実施形態の位相可変型逓倍器の構成を示す図である。It is a figure which shows the structure of the phase variable type | mold multiplier of one Embodiment of this invention. 本発明の他の一実施形態の位相可変型逓倍器の構成を示す図である。It is a figure which shows the structure of the phase variable type | mold multiplier of other one Embodiment of this invention. 本発明の一実施形態のMR素子の構成を示す図である。It is a figure which shows the structure of MR element of one Embodiment of this invention. 本発明の一実施形態の分配器の構成(入出力)を示す図である。It is a figure which shows the structure (input / output) of the divider | distributor of one Embodiment of this invention. 本発明の一実施形態の減衰器の構成(入出力)を示す図である。It is a figure which shows the structure (input / output) of the attenuator of one Embodiment of this invention. 本発明の一実施形態の方向性結合器の構成(入出力)を示す図である。It is a figure which shows the structure (input / output) of the directional coupler of one Embodiment of this invention. 本発明の一実施形態の位相可変型逓倍器での信号の流れを示す図である。It is a figure which shows the flow of the signal in the phase variable type multiplier of one Embodiment of this invention. 本発明の一実施形態のバイアス電圧に対するMR素子の出力スペクトルの変化を示す図である。It is a figure which shows the change of the output spectrum of MR element with respect to the bias voltage of one Embodiment of this invention. 本発明の一実施形態のバイアス電圧に対するMR素子の周波数の変化を示す図である。It is a figure which shows the change of the frequency of MR element with respect to the bias voltage of one Embodiment of this invention. 本発明の一実施形態の位相可変型逓倍器の2出力の高周波スペクトルを示す図である。It is a figure which shows the high frequency spectrum of 2 outputs of the phase variable type | mold multiplier of one Embodiment of this invention. 本発明の一実施形態の位相可変型逓倍器の2出力の周波数のバイアス電圧依存性を示す図である。It is a figure which shows the bias voltage dependence of the frequency of 2 outputs of the phase variable type | mold multiplier of one Embodiment of this invention. 本発明の一実施形態の位相可変型逓倍器の2出力の位相差のバイアス電圧依存性を示す図である。It is a figure which shows the bias voltage dependence of the phase difference of 2 outputs of the phase variable type | mold multiplier of one Embodiment of this invention.

図面を参照しながら本発明の実施形態について説明する。図1は、本発明の一実施形態の位相可変型逓倍器の構成を示す図である。図1の位相可変型逓倍器は、逓倍器1と、MR素子2と、バイアス電圧印加機構3と、第1信号線4と、出力信号線5と、結合手段6と、バイアスティー(Bias Tee)7を含む。逓倍器1は、入力される基準信号の周波数fref(=f/n)をn倍(2以上の自然数)に増加させるものが、周波数逓倍器とも言われる。具体的には、B級又はC級増幅器や可変容量ダイオードとバンドパスフィルタを用いた回路が逓倍器1として使用される。逓倍器として使用されるB級及びC級増幅器は、いずれも基準信号(きれいな正弦波=基本波)を入力すると、増幅されるものの、出力信号が歪み、出力信号には基本波に高調波(基準信号の周波数の整数倍の周波数を持つ)が混ざる。そこで、増幅器の出力側にフィルタを設けて、所望の整数倍の周波数を持つ高調波だけを通し他をカットする。こうして、逓倍器として機能するのである。また、逓倍器1は、入力される基準信号の周波数fref(=f/n)をn倍(2以上の自然数の逆数)に減少させるものでもよい。減少させるものは一般には周波数分周器と言われるが、本発明では説明の都合で「逓倍器」と呼ぶ。そのような逓倍器(一般には周波数分周器)としては、具体的には、フリップフロップ回路を用いたものなどがある。Embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a diagram showing the configuration of a phase variable multiplier according to an embodiment of the present invention. 1 includes a multiplier 1, an MR element 2, a bias voltage application mechanism 3, a first signal line 4, an output signal line 5, a coupling means 6, a bias tee (Bias Tee). ) 7 is included. A multiplier 1 that increases the frequency f ref (= f / n) of an input reference signal by n times (a natural number of 2 or more) is also called a frequency multiplier. Specifically, a circuit using a class B or class C amplifier, a variable capacitance diode, and a band pass filter is used as the multiplier 1. Both the class B and class C amplifiers used as a multiplier are amplified when a reference signal (clean sine wave = fundamental wave) is input, but the output signal is distorted, and the output signal has harmonics ( Have a frequency that is an integer multiple of the frequency of the reference signal). Therefore, a filter is provided on the output side of the amplifier so that only harmonics having a desired integer multiple frequency are passed and the others are cut. Thus, it functions as a multiplier. The multiplier 1 may reduce the frequency f ref (= f / n) of the input reference signal by n times (the reciprocal of a natural number of 2 or more). What is reduced is generally called a frequency divider, but in the present invention, it is called a “multiplier” for convenience of explanation. Specific examples of such a multiplier (generally a frequency divider) include those using a flip-flop circuit.

MR素子2は、周波数fMRで共鳴発振し高周波を出力する。MR素子は、磁化の向きで水平タイプ、垂直タイプと磁気渦タイプに分かれるが、どれも使用することが出来る。MR素子は、図3に例示するように、基本的には自由層、非磁性層及び固定層を備えている。自由層と固定層は、強磁性体材料からなり、例えばFeBやCoFeB等で構成される。非磁性層は、非磁性金属または絶縁体からなり、例えばCu、Ag、Cr等、またはMg、Al、Si、Ca、Li等の酸化物、窒化物、ハロゲン化物等から構成される。MR素子2では、自由層から固定層に又はその逆向きに直流電流を流すと、自由層の電子スピンが、直流電流のスピントルクにより励起され、自由層と固定層の磁化の相対角度が時間に対して共鳴する。この共鳴は、トンネル磁気抵抗効果又は巨大磁気抵抗効果を通じて高周波信号に変換され、MR素子が高周波を発振(本発明では「出力」と言うこともある)することになる。The MR element 2 oscillates at a frequency f MR and outputs a high frequency. MR elements are classified into a horizontal type, a vertical type and a magnetic vortex type depending on the direction of magnetization, and any of them can be used. As illustrated in FIG. 3, the MR element basically includes a free layer, a nonmagnetic layer, and a fixed layer. The free layer and the fixed layer are made of a ferromagnetic material and are made of, for example, FeB or CoFeB. The nonmagnetic layer is made of a nonmagnetic metal or an insulator, and is made of, for example, Cu, Ag, Cr or the like, or an oxide, nitride, halide or the like of Mg, Al, Si, Ca, Li or the like. In the MR element 2, when a direct current is passed from the free layer to the fixed layer or vice versa, the electron spin of the free layer is excited by the spin torque of the direct current, and the relative angle between the magnetization of the free layer and the fixed layer is the time. Resonates against. This resonance is converted into a high-frequency signal through the tunnel magnetoresistive effect or the giant magnetoresistive effect, and the MR element oscillates a high frequency (sometimes referred to as “output” in the present invention).

バイアス電圧印加機構3は、MR素子2を動作させ、かつ、発振(出力)周波数fMRを変えるために必要とされる。バイアス電圧(直流)の入力によりMR素子の共鳴周波数が変化し出力周波数fMR(しいては位相差Δφ)を変えることができる。バイアス電圧印加機構は、一般にはバイアス電圧源及び電圧印加のための信号線からなる。一般にMR素子は、抵抗が10〜1kΩ程度であるので100〜700mV程度の電圧を印加する必要があることから、バイアス電圧源としては最大出力が1V、100mA程度の直流電源が望ましい。The bias voltage application mechanism 3 is required for operating the MR element 2 and changing the oscillation (output) frequency f MR . By inputting a bias voltage (DC), the resonance frequency of the MR element changes, and the output frequency f MR (and therefore the phase difference Δφ) can be changed. The bias voltage application mechanism generally includes a bias voltage source and a signal line for voltage application. Since the MR element generally has a resistance of about 10 to 1 kΩ, it is necessary to apply a voltage of about 100 to 700 mV. Therefore, a DC power supply with a maximum output of 1 V and about 100 mA is desirable as the bias voltage source.

第1信号線4は、周波数fref(=f/n)の基準信号を受けて逓倍器3へ導くものであり、言いかえれば基準信号源(詳細は後述)と逓倍器3とを電気的につなぐものであり、導電性材料、例えば金、銀、銅、アルミニウムなどで作られる。半導体製造技術を用いれば、nm〜μmレベルの線幅で作成することができる。ただ、実験室的には銅の撚り線又はコアクシャルケーブルを使用することが簡便である。なお、「線」と表現したが、概念的なものであり、有限の大きさを持つ点でもよい。The first signal line 4 receives a reference signal having a frequency f ref (= f / n) and guides it to the multiplier 3. In other words, the reference signal source (details will be described later) and the multiplier 3 are electrically connected. It is made of a conductive material such as gold, silver, copper, or aluminum. If a semiconductor manufacturing technique is used, it can be formed with a line width of the nm to μm level. However, in the laboratory, it is convenient to use a copper stranded wire or a coaxial cable. Although expressed as “line”, it is conceptual and may have a finite size.

出力信号線5は、MR素子2の出力端子と出力2の出力端子とを電気的につなぐものであり、第1信号線と同じように、導電性材料、例えば金、銀、銅、アルミニウムなどで作られる。実験室的には銅の撚り線又はコアクシャルケーブルを使用することが簡便である。この場合も、「線」と表現したが、概念的なものであり、有限の大きさを持つ点でもよい。   The output signal line 5 electrically connects the output terminal of the MR element 2 and the output terminal of the output 2 and, like the first signal line, a conductive material such as gold, silver, copper, aluminum or the like. Made with. In the laboratory, it is convenient to use a copper stranded wire or a coaxial cable. Also in this case, it is expressed as “line”, but it is conceptual and may have a finite size.

結合手段6は、周波数fref(=f/n)の基準信号をMR素子2へ導くものであり、言いかえれば基準信号源(詳細は後述)とMR素子2とを電気的につなぐものであり、第1信号線4と同じように導電性材料、例えば金、銀、銅、アルミニウムなどで作られる。図1には第1信号線4と出力信号線5をつなぐ線で示したが、これも概念的なものであり、場合により有限の大きさを持つ点でもよい。The coupling means 6 guides a reference signal having a frequency f ref (= f / n) to the MR element 2. In other words, the coupling means 6 electrically connects a reference signal source (described later in detail) and the MR element 2. The first signal line 4 is made of a conductive material such as gold, silver, copper, or aluminum. Although FIG. 1 shows a line connecting the first signal line 4 and the output signal line 5, this is also conceptual and may have a finite size depending on the case.

バイアスティー(Bias Tee)7は、一般的には、容量とコイルからなり、交流信号に直流信号(ここではバイアス電圧)を重畳させるために用いられる。基準信号側、出力1及び出力2に直流信号が加わってしまってよい場合にはバイアスティー7を使用せず、MR素子2に直接バイアス電圧を印加してもよい。   The bias tee (Bias Tee) 7 generally includes a capacitor and a coil, and is used to superimpose a DC signal (here, a bias voltage) on an AC signal. If a DC signal may be applied to the reference signal side, output 1 and output 2, the bias tee 7 may not be used and a bias voltage may be applied directly to the MR element 2.

図2は、本発明の他の一実施形態の位相可変型逓倍器の構成を示す図である。図2の構成では、図1の一実施形態の位相可変型逓倍器に較べて、基準信号源12と、結合手段6を構成する分配器9、減衰器10、及び方向性結合器12と、出力信号線5上の増幅器8及びフィルタ14と、さらにMR素子2への磁界印加機構13が追加されている。以下では、これらの追加された手段のみについて説明する。他の図1と同じ構成については既に上述した通りであり、その説明を省略する。   FIG. 2 is a diagram showing the configuration of a phase variable multiplier according to another embodiment of the present invention. 2, the reference signal source 12, the divider 9, the attenuator 10, and the directional coupler 12 constituting the coupling means 6, compared to the phase variable type multiplier of the embodiment of FIG. An amplifier 8 and a filter 14 on the output signal line 5 and a magnetic field applying mechanism 13 to the MR element 2 are further added. Only these added means will be described below. The other configurations that are the same as those in FIG. 1 have already been described above, and a description thereof will be omitted.

基準信号源12は、高周波の周波数frefを有する基準信号を出力する。基準信号の周波数frefは、同期後周波数fの1/n倍(nは2以上の自然数又はその逆数)に等しいものを選択する。nは2〜12又は1/12〜1/2が好ましい。特にnは2が好ましい。基準信号源12としては、例えば、電圧制御発振器(VCO)、フェーズロックドループ(PLL)発振器、水晶(LC)発振器などが使用される。Reference signal source 12 outputs a reference signal having a high frequency of f ref. The frequency f ref of the reference signal is selected to be equal to 1 / n times the post-synchronization frequency f (n is a natural number of 2 or more or its inverse). n is preferably 2 to 12 or 1/12 to 1/2. In particular, n is preferably 2. As the reference signal source 12, for example, a voltage controlled oscillator (VCO), a phase locked loop (PLL) oscillator, a crystal (LC) oscillator, or the like is used.

分配器9は、例えば図4に示す抵抗型3ポート分配器を使用し、基準信号を2つの信号に分配する。単純な結合点に近いが、各portから入った信号を2分割して他のportに出力する。信号の方向性はない。port3→port1という信号とport1→port3という信号は、port2から出てくるとき出力信号の強度は同じになる。分配の他に信号の合成にも使われるため「分配器/合成器」と呼ばれることもある。   The distributor 9 uses, for example, a resistance type three-port distributor shown in FIG. 4, and distributes the reference signal into two signals. Although it is close to a simple coupling point, the signal input from each port is divided into two and output to other ports. There is no signal directionality. The signal of port3 → port1 and the signal of port1 → port3 have the same output signal strength when coming out from port2. Since it is used for signal synthesis in addition to distribution, it is sometimes called a “distributor / synthesizer”.

減衰器10は、例えば図5に示す高周波信号を減衰するデバイスである。信号の方向性はない。port2→port1という信号とport1→port2という信号は、出力信号の強度は同じである。図2の構成では、MR素子2に過大な高周波信号を注入しないため使用している。MR素子2の破壊電圧は一般的に200mV程度から1V程度である。このため、注入同期の入力が上記電圧を超えると素子破壊が起こってしまうため、減衰器を用いてMR素子2への入力を調整する必要がある。   The attenuator 10 is a device that attenuates a high-frequency signal shown in FIG. 5, for example. There is no signal directionality. The signal of port2 → port1 and the signal of port1 → port2 have the same output signal strength. In the configuration of FIG. 2, the MR element 2 is used because an excessive high frequency signal is not injected. The breakdown voltage of the MR element 2 is generally about 200 mV to 1 V. For this reason, if the injection locking input exceeds the above voltage, element destruction occurs. Therefore, it is necessary to adjust the input to the MR element 2 using an attenuator.

方向性結合器12は、単純な結合点と大きく異なる。例えば図6に示すように、port1から入った信号は減衰少なくport3に出力される。port1から入った信号の−14dB程度の信号が(ほんの少し)port2に流れる。port3から入った信号は減衰が少なくport1に出力される。port3から入った信号の−28dB程度(ほとんどゼロ)の信号がport2に流れる。このため信号の方向性が重要になるため方向性結合器と呼ばれる。   The directional coupler 12 is greatly different from a simple coupling point. For example, as shown in FIG. 6, a signal input from port 1 is output to port 3 with little attenuation. A signal of about −14 dB of the signal input from port 1 flows into port 2 (just a little). The signal that enters from port 3 is output to port 1 with little attenuation. A signal of about −28 dB (almost zero) of the signal input from port 3 flows to port 2. For this reason, since the directionality of a signal becomes important, it is called a directional coupler.

増幅器8は、MR素子が(共鳴)出力する高周波信号(基本波=同期前)の信号強度(振幅)は10mV(rms)程度と非常に小さいので、それを増幅するために設けている。なお、rms(root mean square)は実効値を意味する。増幅器8として、トランジスタやそれを利用した回路などが増幅器として使用される。   The amplifier 8 is provided in order to amplify the signal intensity (amplitude) of the high frequency signal (fundamental wave = before synchronization) output from the MR element (resonance) as very low as about 10 mV (rms). Note that rms (root mean square) means an effective value. As the amplifier 8, a transistor or a circuit using the transistor is used as the amplifier.

フィルタ14は、出力1、2その他に不要な信号が入る場合には、適宜フィルタを設けられる。図2の構成では、出力2にMR素子2からの信号(周波数fMR)だけを出力させるために、増幅器8の後段にフィルタ14を挿入している。このフィルタは実際の実デバイスではなく、信号解析処理によって疑似的に挿入したものである。なお、フィルタには、反射型と減衰型があるが、ここでは減衰型が望ましい。The filter 14 is appropriately provided with filters when unnecessary signals are input to the outputs 1 and 2 and others. In the configuration of FIG. 2, a filter 14 is inserted after the amplifier 8 so that the output 2 outputs only the signal (frequency f MR ) from the MR element 2. This filter is not an actual actual device but is artificially inserted by signal analysis processing. The filter includes a reflection type and an attenuation type. Here, the attenuation type is desirable.

MR素子2への磁界印加機構13は、バイアス電圧(直流)の入力によりMR素子2を動作させ、出力周波数fMR(しいては位相差Δφ)を変えたい場合に付加的に設けられる。MR素子2によっては、この磁界により、動作し易くなり、また、発振周波数fMRを変えることもできる。磁界印加機構13は、永久磁石でもよいが、磁界強度を変えることが容易な電磁石が好ましい。電磁石は通常、磁性材料の芯のまわりに、コイルを巻き、通電することによって一時的に磁力を発生させる磁石であるが、ここでは、磁性材料(芯)がなく単に電流が作る磁界を磁界印加機構として利用することもできる。The magnetic field applying mechanism 13 to the MR element 2 is additionally provided when the MR element 2 is operated by inputting a bias voltage (DC) and it is desired to change the output frequency f MR (and therefore the phase difference Δφ). Depending on the magnetic field, the MR element 2 can be easily operated, and the oscillation frequency f MR can be changed. The magnetic field application mechanism 13 may be a permanent magnet, but is preferably an electromagnet that can easily change the magnetic field strength. An electromagnet is usually a magnet that temporarily generates a magnetic force by winding a coil around a magnetic material core and energizing it. Here, however, there is no magnetic material (core) and a magnetic field created simply by an electric current is applied. It can also be used as a mechanism.

図2の本発明の一実施形態の位相可変型逓倍器を下記の各デバイスを用いて実装しその動作を確認した。
逓倍器1:n=2の逓倍器として、変換損指数が約11dB、帯域が1.7GHz〜5.4GHzの、Mini-Circuits社製の広帯域逓倍器ZX90-2-36+を用いた。
MR素子2:自由層はFeB層(厚さ2nm)であり、非磁性層はMgO層(厚さ1nm)であり、固定層はCoFeB (厚さ3nm)/Ru(厚さ0.86nm)/CoFe(厚さ2.5nm)/PtMn(厚さ15nm)からなる多層膜を用いた。
バイアス電圧印加機構3:最小電源分解能100nVの、Keysight Technologies社製のプレジションソースメジャーユニットB2912Aを用いた。
バイアスティー(Bias-Tee)7:挿入損指数が約0.8dB、帯域が45MHz〜26.5GHzのKeysight Technologies社製の広帯域Bias-Tee 11612Aを用いた。
The phase variable multiplier of one embodiment of the present invention shown in FIG. 2 was mounted using the following devices, and the operation was confirmed.
Multiplier 1: As a multiplier with n = 2, a wideband multiplier ZX90-2-36 + manufactured by Mini-Circuits Inc. having a conversion loss index of about 11 dB and a band of 1.7 GHz to 5.4 GHz was used.
MR element 2: the free layer is an FeB layer (thickness 2 nm), the nonmagnetic layer is an MgO layer (thickness 1 nm), and the fixed layer is CoFeB (thickness 3 nm) / Ru (thickness 0.86 nm) / A multilayer film made of CoFe (thickness 2.5 nm) / PtMn (thickness 15 nm) was used.
Bias voltage application mechanism 3: A Precision Source Measure Unit B2912A manufactured by Keysight Technologies with a minimum power source resolution of 100 nV was used.
Bias-Tee 7: A broadband Bias-Tee 11612A manufactured by Keysight Technologies with an insertion loss index of about 0.8 dB and a band of 45 MHz to 26.5 GHz was used.

増幅器8:MR素子2の出力周波数(6.7GHz)近傍での増幅率が約27dB、ノイズ指数が2.4dB、帯域が100MHz〜18GHzのMini-Circuits社製の広帯域増幅器ZVA-183W+を用いた。
分配器9:挿入損指数が約7dB、帯域がDC−18GHzのMini-Circuits社製の広帯域抵抗型分配器ZFRSC-183+を用いた。
減衰器10:挿入損指数が約20dB、帯域がDC−40GHzのMini-Circuits社製の広帯域減衰器BW-K20-2W44++を用いた。
方向性結合器11:Keysight Technologies社製の同軸方向性結合器87301Dを用いた。
基準信号源12:出力パワーが−135dBm〜+21dBm、帯域が250kHz〜40GHzのKeysight Technologies社製のアナログ信号発生器E8257Dを用いた。
フィルタ14:10段のカットオフ周波数8GHzのバターワース・ハイパスフィルタを用いた。
Amplifier 8: A wideband amplifier ZVA-183W + manufactured by Mini-Circuits with an amplification factor of about 27 dB, a noise figure of 2.4 dB, and a band of 100 MHz to 18 GHz in the vicinity of the output frequency (6.7 GHz) of the MR element 2 was used. .
Divider 9: A wide-band resistive divider ZFRSC-183 + manufactured by Mini-Circuits with an insertion loss index of about 7 dB and a band of DC-18 GHz was used.
Attenuator 10: A broadband attenuator BW-K20-2W44 ++ manufactured by Mini-Circuits Inc. having an insertion loss index of about 20 dB and a band of DC-40 GHz was used.
Directional coupler 11: A coaxial directional coupler 87301D manufactured by Keysight Technologies was used.
Reference signal source 12: An analog signal generator E8257D manufactured by Keysight Technologies Inc. having an output power of −135 dBm to +21 dBm and a band of 250 kHz to 40 GHz was used.
Filter 14: A 10-stage Butterworth high-pass filter with a cutoff frequency of 8 GHz was used.

図7に上記の各デバイスを用いた位相可変型逓倍器の実施例での信号の流れを示す。基準信号源12から16dBmの周波数f/2(3.37GHz)の基準信号が出力され、分配器9で2つの10dBmの信号に等分配される。逓倍器1へは分配器9で分配された一方の10dBmの信号が入力される。逓倍器1が動作し、出力1へ0dBmの周波数f(6.74GHz)の高周波信号を出力する。また、分配器9で分配された他方の10dBmの信号は、減衰器10、方向性結合器11、及びBias−tee7を通り、−10dBm程度まで信号強度が減衰した後、MR素子2に注入されて注入同期が起こる。   FIG. 7 shows a signal flow in the embodiment of the phase variable multiplier using each of the above devices. A reference signal having a frequency f / 2 (3.37 GHz) of 16 dBm is output from the reference signal source 12 and is equally distributed to two 10 dBm signals by the distributor 9. One of the 10 dBm signals distributed by the distributor 9 is input to the multiplier 1. The multiplier 1 operates and outputs a high-frequency signal having a frequency f (6.74 GHz) of 0 dBm to the output 1. Further, the other 10 dBm signal distributed by the distributor 9 passes through the attenuator 10, the directional coupler 11, and the Bias-tee 7 and is injected into the MR element 2 after the signal intensity is attenuated to about −10 dBm. Injection locking occurs.

MR素子2は、バイアス電圧印加機構3からのバイアス電圧により約−30dBmの周波数f(6.74GHz)の高周波信号を出力する。MR素子2の高周波信号はBias−tee7、方向性結合器11、増幅器8、ハイパスフィルタ14を通って増幅され、−17dBmの周波数f(6.74GHz)の高周波信号が出力2へ出力される。この時、上記した分配器9で分配された他方の10dBmの信号のうち減衰器10を通って方向性結合器11で分岐した信号が増幅器8を通って増幅され、−11dBmの周波数f/2(3.37GHz)の高周波信号として増幅器8を通って出力2に出力されてしまうのを防ぐために、ハイパスフィルタ14によりその−11dBmの周波数f/2(3.37GHz)の高周波信号を減衰させた。また、MR素子2の信号は、方向性結合器11、減衰器10、分配器9を通り、−56dBmの周波数f(6.74GHz)の高周波信号を逓倍器1に入力するが、逓倍器1を動作させる大きさ(power)に達しないために、信号はここで減衰し出力に寄与することはない。   The MR element 2 outputs a high frequency signal having a frequency f (6.74 GHz) of about −30 dBm by the bias voltage from the bias voltage application mechanism 3. The high frequency signal of the MR element 2 is amplified through the Bias-tee 7, the directional coupler 11, the amplifier 8, and the high-pass filter 14, and a high frequency signal having a frequency f (6.74 GHz) of −17 dBm is output to the output 2. At this time, of the other 10 dBm signal distributed by the distributor 9, the signal branched by the directional coupler 11 through the attenuator 10 is amplified through the amplifier 8, and the frequency f / 2 of -11 dBm is obtained. In order to prevent a high frequency signal (3.37 GHz) from being output to the output 2 through the amplifier 8, the high-pass filter 14 attenuates the high frequency signal having a frequency f / 2 (3.37 GHz) of -11 dBm. . The signal of the MR element 2 passes through the directional coupler 11, the attenuator 10, and the distributor 9, and a high frequency signal of −56 dBm frequency f (6.74 GHz) is input to the multiplier 1. The signal is attenuated here and does not contribute to the output because the power is not reached.

図8は、実施例として用いたMR素子2について、所定のバイアス電圧の範囲(215mVの周辺の200〜230mV)で、出力スペクトル(特に出力周波数fMRの周波数とスペクトル強度)を測定した結果を示す。この時、磁界印加機構13として電磁石を用いてMR素子2に磁界を印加している。磁界の大きさは3kOeであり、膜面に対して仰角67度、固定層磁化に対して120度傾けた方向に印加した。MR素子2は、バイアス電圧200から230mVの範囲で、それぞれ単峰の出力スペクトルを示す。単峰の出力スペクトルの積分出力は概ね変化していない。FIG. 8 shows the results of measuring the output spectrum (especially the frequency and spectrum intensity of the output frequency f MR ) in the predetermined bias voltage range (200 to 230 mV around 215 mV) for the MR element 2 used as an example. Show. At this time, a magnetic field is applied to the MR element 2 using an electromagnet as the magnetic field applying mechanism 13. The magnitude of the magnetic field was 3 kOe, and the magnetic field was applied in a direction inclined at an elevation angle of 67 degrees with respect to the film surface and 120 degrees with respect to the fixed layer magnetization. The MR element 2 exhibits a unimodal output spectrum in the bias voltage range of 200 to 230 mV. The integrated output of the unimodal output spectrum has not changed.

図9は、図8の結果から得られたものであり、所定のバイアス電圧の範囲(215mVの周辺の200〜230mV)での、MR素子2の出力周波数fMR(同期前)の変化を示す。これにより、バイアス電圧200mVから230mVの範囲で、出力周波数fMRは6.72GHzを中心として、概ね単調に変化する(約6.78から 約6.68GHz)ことが示された。FIG. 9 is obtained from the result of FIG. 8, and shows a change in the output frequency f MR (before synchronization) of the MR element 2 in a predetermined bias voltage range (200 to 230 mV around 215 mV). . As a result, it was shown that the output frequency f MR changes substantially monotonically (about 6.78 to about 6.68 GHz) around 6.72 GHz in the bias voltage range of 200 mV to 230 mV.

図10は、図8、図9に示した特性を持つMR素子2を用い、上記した図2の本発明の一実施形態の位相可変型逓倍器の実施例を動作させた結果である。(a)の出力1及び(b)の出力2の出力スペクトルのピーク幅はいずれも6kHzと小さかった。この場合、既に上述したように、基準信号源12からの周波数3.37GHz(f/2)の基準信号をMR素子に注入同期し、出力周波数f=6.74GHzに位相同期させている。なお、比較のために出力1から基準信号を出力させずにMR素子2だけで高周波を出力させたところ(比較例)では、出力2のピーク幅は3MHz程度と大きかった。   FIG. 10 shows the result of operating the example of the phase variable multiplier according to the embodiment of the present invention shown in FIG. 2 using the MR element 2 having the characteristics shown in FIGS. The peak widths of the output spectrum of output 1 of (a) and output 2 of (b) were both as small as 6 kHz. In this case, as already described above, the reference signal having the frequency of 3.37 GHz (f / 2) from the reference signal source 12 is injection-locked to the MR element and phase-locked to the output frequency f = 6.74 GHz. For comparison, when the high frequency was output only by the MR element 2 without outputting the reference signal from the output 1 (comparative example), the peak width of the output 2 was as large as about 3 MHz.

図11は、所定のバイアス電圧の範囲(209mVの周辺)での、逓倍器1からの出力1とMR素子2からの出力2の周波数変化を示す。注入同期によりMR素子2の出力周波数fMR(基本波=同期前)は基準信号と同期するため、バイアス電圧によらず、出力2は基準信号(周波数f/2)の2逓倍信号(周波数f)と同じ周波数(6.74GHz)になった。FIG. 11 shows frequency changes of the output 1 from the multiplier 1 and the output 2 from the MR element 2 in a predetermined bias voltage range (around 209 mV). Since the output frequency f MR (fundamental wave = before synchronization) of the MR element 2 is synchronized with the reference signal by injection locking, the output 2 is a doubled signal (frequency f / 2) of the reference signal (frequency f / 2) regardless of the bias voltage. ) And the same frequency (6.74 GHz).

図12は、所定のバイアス電圧の範囲(209mVの周辺)での、逓倍器1からの出力1(周波数f)とMR素子からの出力2(周波数f)との位相差Δφの変化を示す。出力1、2の位相差Δφは、MR素子2に対するバイアス電圧の変化に対し、おおよそ−π/2から+π/2まで変化した。これにより、バイアス電圧を変化させることで、出力1、2の周波数fは変えずに出力1、2の位相差Δφを変えることができることが確認できた。   FIG. 12 shows changes in the phase difference Δφ between the output 1 (frequency f) from the multiplier 1 and the output 2 (frequency f) from the MR element in a predetermined bias voltage range (around 209 mV). The phase difference Δφ between the outputs 1 and 2 changed from −π / 2 to + π / 2 with respect to the change in the bias voltage applied to the MR element 2. Thus, it was confirmed that the phase difference Δφ between the outputs 1 and 2 can be changed without changing the frequency f between the outputs 1 and 2 by changing the bias voltage.

本発明の実施形態について、図を参照しながら説明をした。しかし、本発明はこれらの実施形態に限られるものではない。さらに、本発明はその趣旨を逸脱しない範囲で当業者の知識に基づき種々なる改良、修正、変形を加えた態様で実施できるものである。   Embodiments of the present invention have been described with reference to the drawings. However, the present invention is not limited to these embodiments. Furthermore, the present invention can be implemented in variously modified, modified, and modified forms based on the knowledge of those skilled in the art without departing from the spirit of the present invention.

本発明の位相可変型逓倍器は、逓倍後に同期のとれた安定な(ピーク幅が狭い)周波数fを持つ高周波を出力(第1の出力=出力1)でき、かつ第1の出力(=出力1)の位相に対し第2の出力(=出力2)の位相を変えることが可能である。この位相可変型逓倍器は、MR素子を用いることで、小型で安価である。従って、本発明の逓倍器は、各種通信機器などに利用可能である。   The phase variable type multiplier of the present invention can output a high frequency (first output = output 1) having a stable frequency (narrow peak width) synchronized after the multiplication (first output = output 1) and the first output (= output). It is possible to change the phase of the second output (= output 2) with respect to the phase of 1). This phase variable type multiplier is small and inexpensive by using an MR element. Therefore, the multiplier of the present invention can be used for various communication devices.

1:逓倍器
2:MR素子
3:バイアス電圧印加機構
4:第1信号線
5:出力信号線
6:結合手段
7:バイアスティー(Bias Tee)
8:増幅器
9:分配器
10:減衰器
11:方向性結合器
12:基準信号源
13:磁界印加機構
14:フィルタ(ハイパスフィルタ)
1: Multiplier 2: MR element 3: Bias voltage application mechanism 4: First signal line 5: Output signal line 6: Coupling means 7: Bias Tee
8: Amplifier 9: Divider 10: Attenuator 11: Directional coupler 12: Reference signal source 13: Magnetic field applying mechanism 14: Filter (high-pass filter)

Claims (7)

基準信号の周波数frefをn倍に逓倍する逓倍器と、
同期後の周波数fに等しいか又は同期可能な同期前周波数fMRを持つ高周波を出力する磁気抵抗素子と、
同期前周波数fMRの周波数を変えるためのバイアス電圧印加機構と、を備え、
基準信号として同期後の周波数fの(1/n)倍(nは2以上の自然数又はその逆数)の周波数(1/n)fを磁気抵抗素子に注入同期することにより、逓倍器から基準信号の周波数frefのn倍の周波数fを持つ第1の高周波出力が出力され、磁気抵抗素子から同期された周波数fを持つ第2の高周波出力が出力され、
バイアス電圧印加機構によって同期前周波数fMRを変えることにより、第1の高周波出力の位相に対して第2の高周波出力の位相を変えることができる、位相可変型逓倍器。
A multiplier for multiplying the frequency f ref of the reference signal by n times;
A magnetoresistive element that outputs a high frequency having a pre-synchronization frequency f MR that is equal to or synchronized with the frequency f after synchronization;
A bias voltage application mechanism for changing the frequency of the pre-synchronization frequency f MR ,
The reference signal from the multiplier is obtained by injection-synchronizing the frequency (1 / n) f of the frequency f after synchronization (1 / n) times (n is a natural number of 2 or more or the inverse thereof) to the magnetoresistive element as a reference signal. A first high-frequency output having a frequency f which is n times the frequency f ref of the first frequency f is output, and a second high-frequency output having a frequency f synchronized with the magnetoresistive element is output.
A phase variable type multiplier capable of changing the phase of the second high-frequency output with respect to the phase of the first high-frequency output by changing the pre-synchronization frequency f MR by the bias voltage application mechanism.
前記磁気抵抗素子に磁界を印加する磁界印加機構をさらに備え、前記磁界を変えることにより前記同期前周波数fMRの周波数を変えることを特徴とする、請求項1に記載の位相可変型逓倍器。Further comprising the magnetoresistive element a magnetic field applying mechanism for applying a magnetic field, characterized by varying the frequency of the synchronizing frequency before f MR by changing the magnetic field, the phase variable multiplier according to claim 1. 前記nが2であることを特徴とする、請求項1に記載の位相可変型逓倍器。   2. The variable phase multiplier according to claim 1, wherein n is two. 前記基準信号を出力する基準信号源と、前記基準信号源からの前記基準信号を前記逓倍器と前記磁気抵抗素子に向けて分配する分配器とをさらに備える、請求項2に記載の位相可変型逓倍器。   The phase variable type according to claim 2, further comprising: a reference signal source that outputs the reference signal; and a distributor that distributes the reference signal from the reference signal source toward the multiplier and the magnetoresistive element. Multiplier. 前記分配器と前記磁気抵抗素子との間に、分配後の前記基準信号を減衰する減衰器と、減衰後の前記基準信号を前記磁気抵抗素子と前記第2の高周波出力の出力段に向けて分岐する方向性結合器とをさらに備える、請求項4に記載の位相可変型逓倍器。   An attenuator that attenuates the reference signal after distribution between the distributor and the magnetoresistive element; and the attenuated reference signal is directed to the output stage of the magnetoresistive element and the second high-frequency output. The phase variable multiplier according to claim 4, further comprising a branching directional coupler. 前記方向性結合器と前記第2の高周波出力の出力段との間に増幅器とフィルタをさらに備え、
前記方向性結合器は、前記磁気抵抗素子が出力する前記第2の高周波出力を前記増幅器に向けて分岐する、請求項5に記載の位相可変型逓倍器。
An amplifier and a filter are further provided between the directional coupler and the output stage of the second high-frequency output;
The phase variable multiplier according to claim 5, wherein the directional coupler branches the second high-frequency output output from the magnetoresistive element toward the amplifier.
前記磁気抵抗素子と前記バイアス電圧印加機構との間にバイアスティーをさらに備える、請求項6に記載の位相可変型逓倍器。   The phase variable multiplier according to claim 6, further comprising a bias tee between the magnetoresistive element and the bias voltage application mechanism.
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JP2009194070A (en) * 2008-02-13 2009-08-27 Toshiba Corp Magnetic oscillator, magnetic head including the magnetic oscillator, and magnetic recording and reproducing apparatus
JP2012105248A (en) * 2010-11-09 2012-05-31 Samsung Electronics Co Ltd Oscillator and method of operating the oscillator
WO2016103688A1 (en) * 2014-12-25 2016-06-30 株式会社デンソー Antenna device and high-frequency transmitter
WO2016175249A1 (en) * 2015-04-30 2016-11-03 国立研究開発法人産業技術総合研究所 High-frequency phase-locked oscillator circuit

Patent Citations (4)

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Publication number Priority date Publication date Assignee Title
JP2009194070A (en) * 2008-02-13 2009-08-27 Toshiba Corp Magnetic oscillator, magnetic head including the magnetic oscillator, and magnetic recording and reproducing apparatus
JP2012105248A (en) * 2010-11-09 2012-05-31 Samsung Electronics Co Ltd Oscillator and method of operating the oscillator
WO2016103688A1 (en) * 2014-12-25 2016-06-30 株式会社デンソー Antenna device and high-frequency transmitter
WO2016175249A1 (en) * 2015-04-30 2016-11-03 国立研究開発法人産業技術総合研究所 High-frequency phase-locked oscillator circuit

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