JPWO2012137949A1 - Nitride semiconductor manufacturing method, nitride semiconductor, and group III-V nitride film forming method - Google Patents

Abstract

  A method for manufacturing a nitride semiconductor includes a nitride that forms a semiconductor layer, and is a method for manufacturing a nitride semiconductor, in which a plasma of a gas containing a group III element generated by a microwave radiated from a slot antenna is generated. And a step of forming a nitride layer containing a group III element.

Description

  The present invention relates to a method for manufacturing a nitride semiconductor, a nitride semiconductor, and a method for forming a group III-V nitride.

  In recent years, development of semiconductor devices using a III-V group compound-based material as an active layer has been actively conducted. Among them, nitride semiconductors using nitrogen as a group V element include, for example, GaN (gallium nitride), AlN (aluminum nitride), InN (indium nitride), etc., which have a relatively large band gap, and are particularly blue light emitting materials. For example, the development of light-emitting materials on the short wavelength side has been actively conducted. Note that nitride semiconductors containing GaN include nitride semiconductors using heterojunctions of different materials such as InGaN (indium gallium nitride) / GaN and AlGaN (aluminum gallium nitride) / GaN.

  In particular, in the manufacture of a nitride semiconductor using GaN as the nitride layer, for example, a sapphire substrate having the same hexagonal crystal system as that of GaN and having a lattice constant close to that of GaN is used. Further, a nitride semiconductor using GaN as a nitride layer is formed by epitaxially growing GaN on a sapphire substrate using a thermal process at a high temperature of 1000 ° C. or higher, for example. In order to promote good epitaxial growth of the GaN layer on the sapphire substrate, a buffer layer is generally formed between the sapphire substrate and the GaN layer.

  Here, the technique about the nitride semiconductor using GaN is disclosed by Unexamined-Japanese-Patent No. 2001-217193 (patent document 1). In Patent Document 1, a sapphire substrate is heated to a predetermined temperature, and TMG (trimethyl gallium) gas and N2-H2 gas, that is, TMG gas and a mixed gas of nitrogen and hydrogen are supplied around the sapphire substrate. Plasma is generated around the substrate to form GaN (gallium nitride). Here, the plasma CVD apparatus disclosed in Patent Document 1 and used for forming GaN includes a waveguide and a cavity that propagates a microwave (frequency: 2.45 GHz) generated using a microwave power source. A microwave supply system, a quartz discharge tube inserted into the cavity, a vacuum pump for adjusting the inside of the quartz discharge tube to a predetermined degree of vacuum, a cylinder filled with TMG gas to be supplied into the quartz discharge tube, and nitrogen And a hydrogen (N2-H2) gas mixture, a flow meter for measuring the flow rate of TMG gas supplied from the cylinder, an electric furnace for heating the sapphire substrate, and a plunger for matching microwaves , QMA (Quadrupole Mass Analyzer) for detecting the state of plasma, and optical fiber And an emission spectroscopic analyzer that measures the energy level of the luminescent species.

JP 2001-217193 A

  The formation of the GaN layer in Patent Document 1 described above is performed by so-called nitriding by remote plasma. When such remote plasma is used to form a GaN layer, there is a problem with the quality and quantity of the nitriding species in the nitriding treatment. Specifically, when plasma is generated using remote plasma, the activity of radical species and ions in the vicinity of the remote plasma source is very high. Therefore, in order to suppress damage to the wafer, it is necessary to increase the distance between the remote plasma source and the wafer. Then, although the damage to the wafer can be suppressed, the deactivation is significant, and the ground state and nitriding species with low activity increase in the vicinity of the wafer. Then, it becomes difficult to sufficiently plasma-nitride the target film in the plasma processing. In addition, the density of the activated nitriding species that substantially contribute to the nitriding process is reduced. As a result, the formation of the GaN layer becomes inefficient, for example, it takes a long time to obtain a desired thickness.

  Conventionally, a group III-V nitride having crystallinity (single crystal) with good characteristics as a light emitting element and a semiconductor device could not be formed at a low temperature.

Here, for example, by using ammonia (NH ₃ ), by adopting a thermal process such as a thermal CVD (Chemical Vapor Deposition) process or a thermal nitridation process at a high temperature of about 700 ° C. or more, specifically about 1100 ° C., It is also conceivable to form a GaN layer by performing nitriding. However, in such a high temperature state, a large amount of nitrogen is desorbed during the nitriding treatment, and a layer having a desired nitrogen amount may not be formed. Further, when forming a nitride layer having a heterojunction of different materials such as InGaN / GaN and AlGaN / GaN, the following problems arise. That is, various constituent materials such as InGaN and GaN each have their own coefficient of thermal expansion. In the case where the constituent materials having different thermal expansion coefficients are laminated, if film formation is performed at a high temperature, there is a possibility that warping or distortion may occur at room temperature due to the difference in thermal expansion coefficient. As a result, the generation of crystal defects may be promoted. Thereby, there is a high possibility that the characteristics required for the semiconductor device will be insufficient.

  An object of the present invention is to provide a nitride semiconductor manufacturing method capable of efficiently manufacturing a nitride semiconductor having good crystallinity as a light emitting element and a semiconductor device.

  Another object of the present invention is to provide a nitride semiconductor having good crystallinity as a light emitting element and a semiconductor device.

  Still another object of the present invention is to provide a method for forming a group III-V nitride having crystallinity with good characteristics as a light emitting element and a semiconductor device.

  The method for manufacturing a nitride semiconductor according to the present invention includes a step of forming a nitride layer containing a group III element by using a plasma of a gas containing a group III element generated by a microwave radiated from a slot antenna. .

  Thus, when forming a nitride layer containing a group III element, a plasma of a gas containing a group III element generated by a microwave radiated from a slot antenna is used to deactivate a highly active nitride species. And a nitride layer can be formed with a high density of nitriding species. In such plasma processing, processing can be performed at a lower temperature than conventional processing. Therefore, when manufacturing a nitride semiconductor, warping and distortion caused by differences in thermal expansion coefficient in joining of dissimilar materials are caused. It can be greatly reduced. Therefore, according to such a method for manufacturing a nitride semiconductor, a nitride layer having good characteristics can be efficiently formed. And a nitride semiconductor with good characteristics can be manufactured efficiently. Here, the nitride layer having good characteristics means a layer having few defects in the grown crystal.

  The nitride semiconductor may include a multiple quantum well, and the multiple quantum well layer may be formed of three or more nitride layers including a group III. Further, the group III element may be configured to be Ga. Further, the multiple quantum well layer may be configured such that three layers of the first GaN, InGaN, and second GaN are formed in this order. Further, on the three layers, a further set of InGaN and further formed GaN may be set as one set, and at least one set may be formed.

  The step of forming the nitride layer is a step of forming the nitride layer by an atomic layer epitaxy (ALE) method or a plasma CVD (Chemical Vapor Deposition) method using plasma generated by microwaves. You may comprise so that it may contain.

By forming the nitride layer by the ALE method, it is possible to greatly reduce the possibility of containing impurities during the formation of the nitride layer and the possibility of many defects occurring in the crystal. In addition, a film having a uniform film thickness and film quality can be formed. Moreover, since the film characteristics are high, it can be suitably used for structures having a high aspect ratio.
In addition, by forming a nitride layer by a plasma CVD method, a nitride layer having excellent characteristics and crystallinity can be formed in a relatively short time, and throughput can be improved.

  Further, the step of forming the nitride layer may be performed at a temperature of 200 ° C. or higher and lower than 700 ° C. Moreover, you may comprise so that temperature may be performed at 400 degrees C or less. The layer thus formed is less likely to be warped or distorted. Also, by forming a nitride layer using plasma generated by microwaves radiated from the slot antenna, a film with very high crystallinity can be formed even when the wafer temperature is 400 ° C. or lower. can do.

  The step of forming the nitride layer may be performed at a pressure of 10 mTorr to 10 Torr. The step of forming the nitride layer may be performed at a pressure of 10 mTorr or more and 500 mTorr or less.

  In a more preferred embodiment, the slot antenna includes a radial line slot antenna (RLSA). According to such a configuration, since the plasma generated by the microwave radiated from the slot antenna is used, the processing can be performed using the plasma having a relatively low electron temperature. Moreover, since radicals are mainly generated, a nitride layer can be formed using abundant radicals. Then, when forming the nitride layer, it is possible to greatly reduce the physical damage due to charging damage or ion irradiation to the underlayer, and to efficiently form a nitride layer with good characteristics.

Further, in the step of forming the nitride layer, in the vicinity of the surface of the substrate to be processed on which the nitride layer is formed, the plasma electron temperature is lower than 1.5 eV and the plasma electron density is 1 × 10 6. Treatment using plasma higher than ¹¹ cm ⁻³ may be used.

  The step of forming the nitride layer includes the step of forming the GaN layer and the step of forming the InGaN layer in the thickness direction of the GaN layer, and the step of forming the GaN layer is radiated from the slot antenna. The step of forming the InGaN layer includes the step of forming by plasma CVD using plasma generated by microwave, and the step of forming the InGaN layer is atomic layer epitaxy using plasma generated by microwave radiated from the slot antenna. You may comprise so that the process formed by may be included.

  In another aspect of the present invention, the nitride semiconductor includes a nitride layer formed using a plasma of a gas containing a group III element generated by microwaves radiated from a slot antenna.

  Since such a nitride semiconductor uses a plasma of a gas containing a group III element generated by microwaves radiated from a slot antenna, it suppresses deactivation of highly active nitride species, and nitriding A nitride layer is formed with a high seed density. In addition, since such plasma processing can be performed at a relatively lower temperature than conventional processing, warpage and distortion due to differences in thermal expansion coefficient are greatly reduced in bonding of dissimilar materials. . Therefore, such a nitride semiconductor has good characteristics.

  In addition, the multiple quantum well layer may be configured so that a nitride layer containing group III is formed as three or more layers. Further, the group III element may be configured to be Ga. Further, the multiple quantum well layer may be configured such that three layers of the first GaN, InGaN, and second GaN are formed in this order. Further, on the three layers, a further set of InGaN and further formed GaN may be set as one set, and at least one set may be formed.

  In still another aspect of the present invention, a method for forming a group III-V nitride includes forming a group III-V nitride having a multiple quantum well layer composed of a nitride containing three layers of a group III element. And forming a first nitride layer containing a group III element, and a second nitride layer containing a group III element different from the first nitride layer on the first nitride layer. Forming a multi-quantum well layer by forming a third nitride element containing the same group III element as the first nitride layer on the second nitride layer, and forming a group III The multiple quantum well layer composed of the first to third nitride layers containing an element is formed by an atomic layer epitaxy (ALE) method at a temperature of 200 ° C. or more and less than 700 ° C. and a pressure of 10 mTorr or more and 10 Torr or less. Plasma CVD (Che (Mical Vapor Deposition) method.

  Further, the group III element may be configured to be Ga. The first nitride layer is the first GaN, the second nitride is the first InGaN layer, and the third nitride layer is the second GaN. Also good. Further, a second nitride layer to be further formed and a first or third nitride layer to be further formed are sequentially formed on the third nitride layer to form one set, and at least one set is formed. You may comprise.

  In still another aspect of the present invention, a method for forming a group III-V nitride includes a step of preparing a substrate having crystallinity, a step of adsorbing a gas containing a group III element on the substrate, A step of exhausting a gas containing a group III element that is not adsorbed; a step of forming a nitride containing a group III element by irradiating a gas molecule containing a group III element with a gas molecule containing a nitrogen atom and nitriding the gas molecule; The step of forming a nitride containing a group III element is performed by atomic layer epitaxy or plasma CVD at a temperature of 200 ° C. to less than 700 ° C. and a pressure of 10 mTorr to 10 Torr.

  As described above, when the plasma generated by the microwave radiated from the slot antenna is used in forming the nitride layer, the deactivation of the highly active nitride species is suppressed, and the density of the nitride species is reduced. A nitride layer can be formed in a high state. Furthermore, since such plasma processing can be performed at a relatively lower temperature than conventional processing, warping and distortion due to differences in thermal expansion coefficient can be greatly reduced in bonding of dissimilar materials. Can do. Therefore, according to such a method for manufacturing a nitride semiconductor, the nitride semiconductor can be efficiently formed with a structure including a nitride layer having high crystallinity at a low temperature and good characteristics as a light emitting element and a semiconductor device. And a nitride semiconductor with good characteristics can be manufactured efficiently.

  In addition, such a nitride semiconductor uses plasma generated by microwaves radiated from the slot antenna when forming the nitride layer, suppresses deactivation of highly active nitride species, and The nitride layer is formed with a high density of nitriding species. In addition, since such plasma processing is performed at a lower temperature than conventional processing, when manufacturing a nitride semiconductor including a multi-quantum well layer, the difference in thermal expansion coefficient in the joining of different materials, etc. Warpage and distortion due to the above are greatly reduced. Therefore, such a nitride semiconductor has high crystallinity at a low temperature and has good characteristics as a light emitting element and a semiconductor device.

It is a schematic sectional drawing which shows the principal part of the plasma processing apparatus used for the manufacturing method of the nitride semiconductor which concerns on one Embodiment of this invention. It is the figure which looked at the slot antenna board contained in the plasma processing apparatus shown in FIG. 1 from the plate | board thickness direction. It is a graph which shows the relationship between the distance from the lower surface of a dielectric material window, and the electron temperature of plasma. It is a graph which shows the relationship between the distance from the lower surface of a dielectric material window, and the electron density of plasma. It is a schematic sectional drawing which shows a part of nitride semiconductor which concerns on one Embodiment of this invention. FIG. 6 is a schematic diagram illustrating an example of a part of an MQW layer in the nitride semiconductor illustrated in FIG. 5. It is the schematic which shows the MQW layer of a seven-layer structure. It is the schematic which shows the MQW layer of nine layers structure. 4 is a flowchart showing a typical manufacturing process in the method for manufacturing a nitride semiconductor according to one embodiment of the present invention. 4 is a flowchart showing a typical manufacturing process in plasma ALE processing in a method for manufacturing a nitride semiconductor according to an embodiment of the present invention. 4 is a chart of X-ray diffraction (hereinafter sometimes simply referred to as XRD (X-Ray Diffraction)) of a GaN crystal formed when the pressure in the processing vessel is 60 mTorr. It is a graph which shows the characteristic of the nitride semiconductor at the time of forming all the layers by plasma CVD process. The nitride semiconductor when all the layers shown in FIG. 12 are formed by plasma CVD processing, and the nitride semiconductor when MQW layers are formed by plasma ALE processing and the other layers are formed by plasma CVD processing. It is a graph which shows the characteristic of a rocking curve. It is a schematic sectional drawing which shows the principal part of a plasma processing apparatus provided with the other structure different from the structure shown in FIG. FIG. 14 shows a state in which purging is performed in the plasma processing apparatus shown in FIG. The plasma processing apparatus shown in FIG. 14 shows a state in which plasma processing is performed.

  Embodiments of the present invention will be described below with reference to the drawings. First, the configuration and operation of a plasma processing apparatus used in a nitride semiconductor manufacturing method according to an embodiment of the present invention will be described.

  FIG. 1 is a schematic cross-sectional view showing a main part of a plasma processing apparatus used in a nitride semiconductor manufacturing method according to an embodiment of the present invention. 2 is a view of the slot antenna plate included in the plasma processing apparatus shown in FIG. 1 as viewed from the lower side, that is, from the direction of arrow II in FIG. In FIG. 1, some of the members are not hatched for easy understanding.

  Referring to FIGS. 1 and 2, a plasma processing apparatus 31 is used for a processing container 32 for performing plasma processing on a substrate W to be processed therein, and for plasma excitation gas or plasma CVD processing in the processing container 32. A gas supply unit 33 that supplies a material gas, a gas for ALE in atomic layer epitaxy (ALE), which will be described later, a disk-shaped support table 34 that supports the substrate W to be processed, and a microwave as a plasma source A plasma generating mechanism 39 that generates plasma in the processing vessel 32 and a control unit (not shown) that controls the operation of the entire plasma processing apparatus 31 are provided. The control unit controls the entire plasma processing apparatus 31 such as a gas flow rate in the gas supply unit 33 and a pressure in the processing container 32.

  The processing container 32 includes a bottom portion 41 located on the lower side of the support base 34 and a side wall 42 extending upward from the outer periphery of the bottom portion 41. The side wall 42 is substantially cylindrical. An exhaust hole 43 for exhaust is provided in the bottom 41 of the processing container 32 so as to penetrate a part thereof. The upper side of the processing container 32 is open, and a lid 44 disposed on the upper side of the processing container 32, a dielectric window 36 described later, and a seal member interposed between the dielectric window 36 and the lid 44. The processing container 32 is configured to be hermetically sealed by an O-ring 45 as a sealing member.

  The gas supply unit 33 includes a first gas supply unit 46 that supplies gas toward the center of the substrate to be processed W, and a second gas supply unit 47 that supplies gas from the peripheral side of the substrate to be processed W. . The gas supply hole 30 for supplying gas in the first gas supply section 46 is more dielectric than the lower surface 48 of the dielectric window 36 which is the center in the radial direction of the dielectric window 36 and faces the support base 34. It is provided at a position retracted inward of the body window 36. The first gas supply unit 46 supplies an inert gas for plasma excitation, a material gas, a film forming gas and the like while adjusting a flow rate and the like by a gas supply system 49 connected to the first gas supply unit 46. The second gas supply unit 47 is provided with a plurality of gas supply holes 50 for supplying a plasma excitation gas, a material gas, a film forming gas and the like in the processing vessel 32 in a part of the upper side of the side wall 42. Is formed. The plurality of gas supply holes 50 are provided at equal intervals in the circumferential direction. The first gas supply unit 46 and the second gas supply unit 47 are supplied from the same gas supply source with the same kind of plasma excitation inert gas, material gas, ALE gas, and the like. In addition, according to a request | requirement and the content of control, another gas can also be supplied from the 1st gas supply part 46 and the 2nd gas supply part 47, and those flow ratios etc. can also be adjusted.

  A high frequency power source 58 for RF (radio frequency) bias is electrically connected to the electrode 61 in the support table 34 via the matching unit 59. The high frequency power supply 58 can output a high frequency of 13.56 MHz, for example, with a predetermined power (bias power). The matching unit 59 accommodates a matching unit for matching between the impedance on the high-frequency power source 58 side and the impedance on the load side such as the electrode 61, plasma, and the processing vessel 32. Includes a blocking capacitor for generating a self-bias.

  The support base 34 can support the substrate W to be processed thereon by an electrostatic chuck (not shown). The support table 34 includes a heater (not shown) for heating and the like, and can be set to a desired temperature by a temperature adjustment mechanism 29 provided in the support table 34. The support base 34 is supported by an insulating cylindrical support 51 that extends vertically upward from the lower side of the bottom 41. The exhaust hole 43 described above is provided so as to penetrate a part of the bottom 41 of the processing container 32 along the outer periphery of the cylindrical support part 51. An exhaust device (not shown) is connected to the lower side of the annular exhaust hole 43 via an exhaust pipe (not shown). The exhaust device has a vacuum pump such as a turbo molecular pump. The inside of the processing container 32 can be depressurized to a predetermined pressure by the exhaust device.

  The plasma generation mechanism 39 is provided above and outside the processing vessel 32, and is disposed at a position facing the microwave generator 35 for generating microwaves for plasma excitation and the support base 34. The microwave generator A dielectric window 36 for introducing the microwaves generated by 35 into the processing vessel 32 and a plurality of slots 40 (see FIG. 2) are provided, and are arranged above the dielectric window 36 to transmit the microwaves. A slot antenna plate 37 that radiates to the dielectric window 36 and a dielectric member 38 that is disposed above the slot antenna plate 37 and that propagates a microwave introduced by a coaxial waveguide 56 to be described later in the radial direction. .

  A microwave generator 35 having a matching mechanism 53 is connected to an upper portion of a coaxial waveguide 56 for introducing a microwave through a waveguide 55 and a mode converter 54. For example, a TE mode microwave generated by the microwave generator 35 passes through the waveguide 55, is converted to a TEM mode by the mode converter 54, and propagates through the coaxial waveguide 56. For example, 2.45 GHz is selected as the frequency of the microwave generated by the microwave generator 35.

  The dielectric window 36 has a substantially disk shape and is made of a dielectric. A part of the lower surface 48 of the dielectric window 36 is provided with an annular recess 57 that is recessed in a tapered shape for facilitating generation of a standing wave by the introduced microwave. Due to the concave portion 57, microwave plasma can be efficiently generated on the lower side of the dielectric window 36. Specific materials for the dielectric window 36 include quartz and alumina.

  The slot antenna plate 37 has a thin plate shape and a disk shape. As for the plurality of slot-like slots 40, as shown in FIG. 2, a pair of slots 40 is provided so as to form an angle of 90 degrees. The pair of slots 40 are provided at a predetermined interval in the circumferential direction. Also in the radial direction, a plurality of pairs of slots 40 are provided at predetermined intervals.

  The microwave generated by the microwave generator 35 is propagated to the dielectric member 38 through the coaxial waveguide 56. The microwave has a circulation path 60 that circulates a refrigerant and the like inside the microwave, and the inside of the dielectric member 38 sandwiched between the cooling jacket 52 and the slot antenna plate 37 for adjusting the temperature of the dielectric member 38 and the like is radial. It spreads radially outward and is radiated to the dielectric window 36 from a plurality of slots 40 provided in the slot antenna plate 37. The microwave transmitted through the dielectric window 36 generates an electric field immediately below the dielectric window 36 and generates plasma in the processing chamber 32. That is, microwave plasma to be processed in the plasma processing apparatus 31 is radiated from a radial line slot antenna (RLSA) including the cooling jacket 52, the slot antenna plate 37, and the dielectric member 38 having the above-described configuration. Is generated in the processing container 32 by the microwave.

  FIG. 3 is a graph showing the relationship between the distance from the lower surface 48 of the dielectric window 36 in the processing chamber 32 and the plasma electron temperature when plasma is generated in the plasma processing apparatus 31. FIG. 4 is a graph showing the relationship between the distance from the lower surface 48 of the dielectric window 36 in the processing chamber 32 and the electron density of the plasma when plasma is generated in the plasma processing apparatus 31.

Referring to FIGS. 3 and 4, the region immediately below dielectric window 36, specifically, region 26 up to about 10 mm indicated by a one-dot chain line in FIG. 3 is called a so-called plasma generation region. In this region 26, the electron temperature is high and the electron density is higher than 1 × 10 ¹² cm ⁻³ . The plasma processing apparatus 31 uses a slot antenna plate 37 to radiate microwaves into the processing container 32. According to such a configuration, the microwave is reflected by the high-density plasma generated in the processing container 32 and cannot propagate into the plasma. Such plasma excited by microwaves is called surface wave plasma. On the other hand, a region 27 exceeding 10 mm indicated by a two-dot chain line is called a plasma diffusion region. In this region 27, the electron temperature is about 1.0 to 1.3 eV, lower than at least 1.5 eV, and the electron density is higher than about 1 × 10 ¹² cm ⁻³ , and at least higher than 1 × 10 ¹¹ cm ⁻³ . Plasma processing for the substrate W to be described later is performed in the plasma diffusion region. That is, in the plasma processing, microwave plasma having a plasma electron temperature lower than 1.5 eV and a plasma electron density higher than 1 × 10 ¹¹ cm ⁻³ is used in the vicinity of the surface of the substrate W to be processed. desirable. In this case, the distance between the lower surface 48 of the dielectric window 36 and the support base 34 is set to about 100 mm. Further, if the electron density of the plasma is about 1 × 10 ¹⁰ cm ^−3, it can be processed at a sufficient processing speed, and the distance between the lower surface 48 of the dielectric window 36 and the support base 34 is 50 mm or more and 300 mm or less. If it is.

  Next, the structure of the nitride semiconductor according to one embodiment of the present invention will be described. FIG. 5 is a schematic cross-sectional view showing a part of the nitride semiconductor according to one embodiment of the present invention. In FIG. 5 and FIG. 6 to be described later, some of the members are not hatched for easy understanding. From the viewpoint of easy understanding, the vertical direction in FIG. 5 and FIG. 6 described later is the vertical direction that is the thickness direction of the nitride semiconductor according to one embodiment of the present invention.

  Referring to FIG. 5, nitride semiconductor 11 according to an embodiment of the present invention is used as, for example, a light emitting element. A nitride semiconductor 11 according to an embodiment of the present invention is provided on a sapphire substrate 12 serving as a base, a sapphire substrate 12, a buffer layer 13 made of GaN, and provided on the buffer layer 13. An n-GaN layer 14 composed of n-type GaN, an MQW (Multiple Quantum Well) layer 15 provided on the n-GaN layer 14, and an MQW layer 15 provided on the p-type. A p-AlGaN layer 16 made of AlGaN, and a p-GaN layer 17 provided on the p-AlGaN layer 16 and made of p-type GaN. That is, the nitride semiconductor 11 according to an embodiment of the present invention includes a nitride constituting the semiconductor layer and includes a multiple quantum well layer.

  The MQW layer 15 formed on the n-GaN layer 14 is formed not to cover the entire n-GaN layer 14 but to expose a part thereof. Then, an n-electrode 18 serving as an n-type electrode is provided on the exposed portion. On the other hand, a p-electrode 19 serving as a p-type electrode is provided on the p-GaN layer 17. A so-called step is provided between the portion where the n-electrode 18 is formed and the portion where the p-electrode is formed so that the portion where the n-electrode 18 is formed is relatively low. It becomes composition.

  Each of the n-GaN layer 14 and the p-GaN layer 17, that is, the length in the vertical direction is about 200 nm and is relatively thick. On the other hand, the MQW layer 15 and the p-AlGaN layer 16 are very thin. The MQW layer 15 is preferably 1 to 20 nm. The thickness of the p-AlGaN layer 16 is about 10 Å (angstrom), which is about 5 atomic layers.

  Here, a specific configuration of the MQW layer 15 will be described. FIG. 6 is a schematic diagram showing an example of a part of the MQW layer 15 in the nitride semiconductor shown in FIG. Referring to FIGS. 5 and 6, MQW layer 15 is formed on n-GaN layer 14, first i-GaN layer 21 a serving as the lowest layer of MQW layer 15, and first i-GaN layer 15 a. The i-InGaN layer 22a formed on the −GaN layer 21a and the second i-GaN layer 21b formed on the i-InGaN layer 22a and serving as the uppermost layer of the MQW layer 15 are configured. ing. In this case, the MQW layer 15 includes a total of three layers including two i-GaN layers 21a and 21b and one i-InGaN layer 22a provided between the two i-GaN layers 21a and 21b. ing. The thickness of each layer is about 10 mm (angstrom). In this embodiment, the MQW layer 15 has a three-layer structure. However, depending on the required characteristics, i-GaN layers and i-InGaN layers are alternately formed to form an arbitrary stacked structure, that is, Alternatively, a five-layer MQW layer or a seven-layer MQW layer may be used. Further, nine or ten odd layers or more may be formed. That is, on the three layers, the second InGaN layer and the third GaN layer may be sequentially formed to form a set, and at least one set may be formed on at least the three layers.

  FIG. 7 is a schematic view showing the MQW layer 23 formed as seven layers. Referring to FIG. 7, the seven MQW layers 23 are a first i-GaN layer 21a which is the lowest layer, and a first i-InGaN layer formed on the first i-GaN layer 21a. 22a, a third i-GaN layer 21c formed on the second i-InGaN layer 22b, and a third i-InGaN layer 22b formed on the third i-GaN layer 21c. , And a fourth i-GaN layer 21d formed on the third i-InGaN layer 22b. In this case, two sets are formed on the three layers.

  FIG. 8 is a schematic view showing the MQW layer 24 formed with nine layers. Referring to FIG. 8, the ten-layer MQW layer 24 includes a first i-GaN layer 21a serving as a lowermost layer and a first i-InGaN formed on the first i-GaN layer 21a. The third i-GaN layer 21c formed on the layer 22a, the second i-InGaN layer 22b, and the third i-InGaN layer 22b formed on the third i-GaN layer 21c. A fourth i-GaN layer 21d formed on the third i-InGaN layer 22b, a fourth i-InGaN layer 22d formed on the fourth i-GaN layer 21d, The fifth i-GaN layer 21e is formed on the fourth i-InGaN layer 22d. In this case, three sets are formed on the three layers.

  Next, a method for manufacturing a nitride semiconductor manufactured using the plasma processing apparatus 31 will be described. FIG. 9 is a flowchart showing typical steps in the method for manufacturing a nitride semiconductor according to one embodiment of the present invention.

  5 to 9, a buffer layer 13 is formed on a sapphire substrate 12 serving as a base (FIG. 9A). Next, the n-GaN layer 14 is formed on the formed buffer layer 13 (FIG. 9B).

  Here, the n-GaN layer 14 is formed by plasma CVD using the plasma processing apparatus 31 shown in FIGS. 1 and 2 described above. Specifically, the n-GaN layer 14 that is a nitride layer is formed by microwave plasma CVD processing using the plasma processing apparatus 31 including RLSA.

  A plasma CVD process using the plasma processing apparatus 31 will be described. Here, the plasma CVD process includes a plasma VPE (Vapor Phase Epitaxy) process. 1 and 2 again, first, the sapphire substrate 12 as the substrate W to be processed is adsorbed and supported by the electrostatic chuck on the support base 34 disposed in the processing container 32. Next, an inert gas such as Ar gas is supplied from the gas supply unit 33 as a plasma excitation gas. Here, the pressure in the processing vessel 32 is controlled so that the pressure is appropriate for the plasma processing. The pressure in the processing vessel 32 is preferably 10 mTorr or more, and preferably 20 mTorr or more and 10 Torr or less in consideration of productivity. Furthermore, 10 mTorr to 200 mTorr is good, and 40 to 100 mTorr is good. Moreover, about the temperature of the to-be-processed substrate W supported on the support stand 34 using the temperature adjustment mechanism 29 provided in the support stand 34, 200-700 degreeC is preferable and 300-600 degreeC is further. Here, it is preferably 400 ° C. In this state, microwaves are introduced into the processing container 32 to generate microwave plasma.

Next, a material gas for performing plasma CVD processing is supplied. The material gas is supplied using the gas supply unit 33. In this case, the material gas is supplied so as to be mixed with the inert gas for plasma excitation in the processing vessel 32. Specifically, as a film forming gas as a material gas, a gas containing a group III-V element is used. For example, a gas containing Ga (gallium) such as TMG (Trimethyl Gallium) or a gas containing N (nitrogen) such as N ₂ or NH ₃ (ammonia) is used. Further, impurities can be introduced by simultaneously introducing a gas containing Si (silicon) such as SiH ₄ (silane) or SiH ₂ Cl ₂ (dichlorosilane). At this time, Si (silicon) is a dopant that makes the layer to be formed n-type. Thus, the microwave plasma CVD process is performed to form the n-GaN layer 14. By doing so, a GaN layer having good crystallinity at a low temperature and good characteristics as a light emitting element and a semiconductor device can be formed in a relatively short time. In this process, the process may be performed without supplying a predetermined bias. Further, the material gas may be supplied at the timing of supplying the plasma excitation gas.

  N-GaN may be formed by a thermal CVD method (epitaxy) at 800 ° C. or higher, preferably 1000 ° C. or higher, from which a good crystallinity is obtained from the viewpoint of crystallinity.

  Next, the MQW layer 15 is formed on the formed n-GaN layer 14 (FIG. 9C). Specifically, the MQW layer 15 is formed by sequentially forming a thin film-like first i-GaN layer 21, i-InGaN layer 22, and second i-GaN layer 23 from the lower layer side. Here, “i−” indicates “intrinsic” and means that no impurities are mixed.

  Here, in forming each of the first i-GaN layer 21, i-InGaN layer 22, and second i-GaN layer 23 constituting the MQW layer 15, the above-described FIGS. 1 and 2 are used. It is performed at a low temperature by a plasma ALE process using the plasma processing apparatus shown. Specifically, the MQW layer 15 is formed by ALE processing using plasma generated by microwaves radiated from the RLSA using the plasma processing apparatus 31 including RLSA.

  Here, the plasma ALE process using the plasma processing apparatus 31 when forming the first i-GaN layer 21 will be described. FIG. 10 is a flowchart showing a typical process when performing the plasma ALE process in the MQW layer forming process shown in FIG. Referring also to FIG. 10, the ALE gas is supplied onto the substrate W to be processed supported on the support table 34, and molecules including atoms constituting the crystal to be epitaxially grown are adsorbed on the surface of the substrate W to be processed. (FIG. 10G). Here, the supply of the ALE gas is performed by supplying the film forming gas from the plasma processing gas supply unit 33. As the ALE gas, for example, a gas containing Ga such as TMG is selected. In this case, the atoms are self-stopped (self-limited) by the chemical adsorption of one atomic layer, and no further chemical adsorption occurs.

Thereafter, in order to remove the excessively supplied ALE gas, as the first exhaust process, the inside of the processing vessel 32 is exhausted and a purge gas such as an inert gas such as Ar gas or N ₂ gas is supplied. The so-called purge is performed (FIG. 10H). Moreover, only exhaust may be sufficient. That is, the gas containing the layer physically adsorbed on the chemical adsorption layer and the surplus TMG that has not been adsorbed is discharged to the outside of the processing vessel 32. The processing container 32 is exhausted using the exhaust hole 43 and an exhaust device.

After evacuation, the adsorbed molecules are treated using plasma generated by microwaves (FIG. 10I). In this step, microwaves are supplied into the processing chamber 32 using the plasma generation mechanism 39, ammonia (NH ₃ ) gas or nitrogen (N ₂ ) gas is supplied, plasma is generated, and atoms on the substrate W to be processed are generated. Nitriding treatment by plasma is performed on the adsorption layer for one layer. Thereby, a GaN layer is formed.

After the plasma processing is completed, the processing chamber 32 is exhausted as a second exhausting process (FIG. 10J). That is, ammonia gas remaining in the processing container 32 is removed. At this time, an inert gas may be supplied and purged. By so doing, NH ₃ gas and the like can be removed quickly.

  The series of steps (G) to (J) shown in FIG. 10 is set as one cycle and is repeated until a desired thickness is obtained. The thickness of the layer formed by one cycle, that is, a series of steps (G) to (J) is about 2 angstroms (Å). In this way, the layer constituting the first i-GaN layer 21 is formed by epitaxial growth. According to such a plasma ALE process, it is possible to greatly reduce the possibility of inclusion of impurities as the composition of the film forming gas during the formation of the nitride layer and the occurrence of defects in the crystal. Therefore, an i-GaN layer having good crystallinity can be formed at a low temperature.

  Next, after the first i-GaN layer 21 having a desired thickness is formed, the i-InGaN layer 22 having a desired thickness and good crystallinity at low temperatures and the second i are similarly formed by plasma ALE treatment. -The GaN layer 23 is formed sequentially. In this manner, the MQW layer 15 is formed, for example, 1 to 20 nm. Therefore, an MQW layer with good crystallinity can be formed at a low temperature.

Next, the p-AlGaN layer 16 is formed on the formed MQW layer 15 (FIG. 9D). The formation of the p-AlGaN layer 16 is performed by plasma ALE processing using the plasma processing apparatus shown in FIGS. 1 and 2 described above, similarly to the formation of the i-GaN layer 21 in the MQW layer 15 described above. As the gas for ALE, for example, a gas containing Ga such as TMG and a gas containing Al (aluminum) such as TMAl (Trimethyl Aluminum) are selected. Here, for a dopant in which the layer to be formed is p-type, for example, a gas containing Mg (magnesium) such as Cp ₂ Mg (bis-cyclopentadienyl magnesium) is used. In this case, the timing for supplying the gas containing Mg may be supplied in the plasma processing step, that is, in the step of FIG. If the gas used for the dopant is a gas that can be processed by ALD (Atomic Layer Deposition), it may be supplied in the atomic layer adsorption step, that is, in the step of FIG. 10G described above.

  Further, the AlGaN layer may be formed by a thermal CVD method lower than the MQW layer from the viewpoint of crystallinity.

Next, a p-GaN layer 17 is formed on the formed p-AlGaN layer 16. (FIG. 9E). The p-GaN layer 17 is formed by a plasma CVD process using the plasma processing apparatus shown in FIGS. 1 and 2 as in the case of the n-GaN layer 14 described above. Specifically, as a film forming gas as a material gas, a gas containing Ga such as TMG, a gas containing N such as NH ₃ , or a gas containing Mg such as Cp ₂ Mg is used at the same time. Introduce. Further, Mg (magnesium) is a dopant that makes the layer to be formed p-type. In this way, the p-GaN layer 17 is formed by performing plasma CVD processing using microwave plasma at a low temperature.

  Moreover, p-GaN may be formed by a thermal CVD method lower than the MQW layer from the viewpoint of crystallinity.

  Thereafter, an n-electrode 18 and a p-electrode 19 are formed (FIG. 9F). In this way, the nitride semiconductor 11 according to one embodiment of the present invention is manufactured.

  According to such a method of manufacturing a nitride semiconductor, since the plasma generated by the microwave radiated from the RLSA is used when forming the nitride layer, the plasma generation region where high-density plasma exists If the distance from the substrate to the diffusion region where the substrate to be processed is 50 to 300 mm, the deactivation of the nitriding species is suppressed, and the nitride layer can be formed with a high density of nitriding species. Furthermore, with respect to the plasma generated by the microwaves emitted from the RLSA, the selection range of the nitriding species can be widened. In addition, since such plasma processing can be performed at a low temperature, warpage and distortion due to differences in thermal expansion coefficient can be greatly reduced in bonding of different materials. Therefore, according to such a method for manufacturing a nitride semiconductor, a nitride layer having good crystallinity at a low temperature and good characteristics as a light emitting element and a semiconductor device can be efficiently formed. A semiconductor device can be efficiently manufactured.

  In this case, since the plasma generated by the microwave radiated from the RLSA is used, the generated plasma can be processed with a low electron temperature of 1.5 eV or less. Further, since radicals are mainly generated, the nitride layer can be formed using abundant radicals. Then, when forming the nitride layer, it is possible to greatly reduce physical damage due to charging damage or ion irradiation to the underlayer. Therefore, a nitride semiconductor having good crystallinity at low temperature and good characteristics as a light emitting element and a semiconductor device can be efficiently manufactured.

  In this case, the n-GaN layer forming step (FIG. 9B) and the p-GaN layer forming step (FIG. 9E), which form a thick layer, are performed by plasma CVD processing, so that a thin layer is formed. Since the MQW layer forming step (FIG. 9C) and the p-AlGaN layer forming step (FIG. 9D), which are to be formed, are performed by plasma ALE treatment, thermal influence on the underlying MQW layer is performed. From this point of view, it is possible to efficiently manufacture a nitride semiconductor which is performed at a low temperature and has excellent crystallinity and excellent characteristics as a light emitting element and a semiconductor device.

  In this case, all layers can be formed at a low temperature of 200 ° C. or higher and lower than 700 ° C., preferably 600 ° C. or lower, and further 400 ° C. or lower. The layer thus formed is less likely to be warped or distorted, has very high crystallinity, and has good characteristics. Therefore, the semiconductor manufactured in this way has good crystallinity at a low temperature and good characteristics as a semiconductor.

  In the nitride semiconductor manufacturing method described above, the pressure is preferably 10 mTorr or more and 10 Torr or less, and may be performed at 10 mTorr or more and 500 mTorr or less. In this way, the layer can be formed efficiently at low temperatures with good crystallinity.

  In addition, a nitride semiconductor according to an embodiment of the present invention includes a GaN layer formed using plasma generated by microwaves emitted from RLSA.

  Such a nitride semiconductor uses plasma generated by microwaves radiated from RLSA when forming a GaN layer, suppresses deactivation of highly active nitride species, and has a high density of nitride species. In the state, a GaN layer is formed. Further, in such plasma processing, processing is performed at a low temperature of 200 ° C. to 700 ° C. as compared with the conventional processing. Therefore, when manufacturing a nitride semiconductor device including a multiple quantum well layer, bonding of different materials is performed. The warpage and distortion resulting from the difference in thermal expansion coefficient are greatly reduced. Therefore, a GaN layer having good crystallinity and good characteristics can be formed at a low temperature, and the characteristics as a semiconductor device are good.

  In this case, since plasma generated by microwaves radiated from RLSA is used, processing is performed with plasma having a relatively low electron temperature. Then, when the GaN layer is formed, the physical damage due to charging damage or ion irradiation to the underlayer is greatly reduced. Therefore, such a nitride semiconductor forms a GaN layer with few crystal defects.

Next, the evaluation of the characteristics of the GaN layer provided in the semiconductor device thus formed will be described. FIG. 11 is an XRD chart of a GaN crystal constituting the n-GaN layer 14 of the nitride semiconductor manufactured by the nitride semiconductor manufacturing method according to the embodiment of the present invention described above. In FIG. 11, the horizontal axis represents 2θ (degree), and the vertical axis represents log (CPS), which indicates the logarithm of CPS (intensity). Peak at the position indicated by the arrow A ₁ in FIG. 11 shows a peak of a crystal of sapphire (Al 2 _{O 3)} as a substrate. FIG. 11 shows the case where the n-GaN layer is formed with the pressure in the processing container set at 150 mTorr.

Referring to FIG. 11, the peak at the position indicated by the arrow _{A 2} is a peak indicating the (002) plane of the GaN crystal. The peak at the position indicated by the arrow _{A 3} is a peak indicating the (004) plane of the GaN crystal. As described above, in the nitride semiconductor manufactured by the above-described manufacturing method, the GaN crystal constituting the nitride semiconductor hardly shows a peak indicating another surface of the crystal lattice. It can be understood that this is because the crystallinity of the GaN crystal as a single crystal is good, and it is formed by excellent epitaxial growth at a low temperature.

  In the above embodiment, the n-GaN layer and the p-GaN layer are formed at a low temperature by plasma CVD, and the MQW layer, specifically, the i-GaN layer and the i-InGaN layer, and the p-type layer are formed. -The AlGaN layer is formed at a low temperature by the plasma ALE process. However, the present invention is not limited to this, and all the layers may be formed at a low temperature by the plasma CVD process. By doing so, the throughput can be significantly improved. Further, all the layers may be formed at a low temperature by plasma ALE treatment. By doing so, a nitride semiconductor having better film quality and superior characteristics can be manufactured. In addition, a film having a uniform film thickness and film quality can be formed. Such plasma ALE treatment can be suitably used for a structure having a high aspect ratio because of its high film properties.

Here, a case where all the layers are formed by plasma CVD processing will be described. FIG. 12 is a graph showing the characteristics of a nitride semiconductor when all layers are formed at a low temperature by a plasma CVD process. FIG. 12 shows PL (Photo Luminescence) characteristics, where the vertical axis represents PL intensity (au) and the horizontal axis represents wavelength (nm). In FIG. 12, the part indicated by the arrow C ₁ indicates a part called BE (Band Edge), and this value only needs to be high. Also, portions indicated by a region _{C 2} in FIG. 12, an area called BL (Blue Luminescence), for this region, it is preferable that the value is low. Furthermore, portions indicated by a region _{C 3} in Fig. 12, an area called YL (Yellow Luminescence), better value for BE / YL is high.

Here, as processing conditions for forming the MQW layer, the temperature of the support 34 is 600 ° C., and the gas in the atomic adsorption process is 3.4 sccm of TMG gas using H ₂ gas flowing as a carrier at 15 sccm, plasma As a plasma processing gas in the processing step, H ₂ gas is 50 sccm, NH ₃ gas is 100 sccm, microwave power is 4.5 kW, the pressure in the processing vessel 32 is 60 mTorr, and the processing time is 1200 seconds.

  As PL measurement conditions, a PL measurement apparatus was used, the spectroscope was SPEX1702, the grating was 1200, the excitation light source was a He-Cd laser (325 nm), the detector was a photomultiplier R1387, the measurement temperature was 12K, the measurement wavelength Was 350 to 700 nm (1 nm step), 0.5 mm when the slit width was 350 to 400 nm, and 1 mm when the slit width was 400 to 700 nm.

  Referring to FIG. 12, BE is very high and shows a sharp value. Further, BE / YL> 100, and light emission in BL is relatively small. Such a nitride semiconductor has high purity and good crystallinity. That is, it can be understood that the nitride semiconductor has excellent characteristics.

  Next, a case where the MQW layer is formed by plasma ALE processing (400 ° C.) and the other layers are formed by plasma CVD processing will be described. FIG. 13 shows a nitride semiconductor and MQW layer formed by plasma ALE processing when all the layers shown in FIG. 12 are formed by plasma CVD processing (600 ° C.), and the other layers are formed by plasma CVD processing. It is a graph which shows the characteristic of the rocking curve with the nitride semiconductor at the time of doing. In FIG. 13, the vertical axis indicates the half-value width (degree). The left two bar graphs in FIG. 13 show the case where the ALE process (400 ° C.) is performed, and the right two bar graphs show the case where the CVD process (600 ° C.) is performed. Among the bar graphs showing the respective processes, the left bar graph shows the (002) half width tilt distribution, and the right bar graph shows the (110) half width twist distribution. Specifically, the half width (tilt distribution) in the plasma ALE process is 0.075, the half width (twist distribution) is 1.663, and the half width (tilt distribution) in the plasma CVD process. ) Is 0.087, and the full width at half maximum (twist distribution) is 1.466.

Here, the conditions of the plasma ALE process will be described. The temperature of the support 34 is 400 ° C., the pressure in the processing vessel 32 in the atom adsorption process is 3 Torr, and the atom adsorption process is TMG using H ₂ gas flowing as a carrier at 25 sccm. The gas is 5.6 sccm and the time is 15 seconds. In the plasma processing step, the pressure in the processing chamber 32 is 5 Torr, the H ₂ gas is 200 sccm, the NH ₃ gas is 200 sccm, the microwave power is 4.5 kW, and the time is 10 seconds.

  Referring to FIG. 13, the nitride semiconductor in which the MQW layer is formed by plasma ALE treatment is compared with the nitride semiconductor in which all the layers shown in FIG. 12 are formed by plasma CVD treatment. Distribution) and half-value width (twist distribution). That is, it can be understood that the nitride semiconductor in which the MQW layer is formed by plasma ALE processing and the other layers are formed by plasma CVD processing has high purity, good crystallinity, and excellent characteristics.

  Further, in the above embodiment, when performing the plasma ALE process, a cover member that covers the support base on which the substrate is supported is disposed, and an atomic adsorption process to the substrate is performed in the cover member. Also good. By doing so, the amount of adsorbed gas can be reduced and the time can be shortened, and a nitride semiconductor with good characteristics can be manufactured more efficiently.

In addition, by using the plasma processing apparatus 31 including the above-described RLSA, the range of selection of the nitriding species can be made relatively wide. To explain this, in a conventional remote plasma CVD apparatus or the like, the types of nitriding, that is, the types of radicals that contribute to nitriding such as N radicals, NH radicals, and NH ₂ radicals are limited. That is, it is difficult to perform nitriding using the intended nitriding species among a number of nitriding species. On the other hand, the plasma processing apparatus 31 provided with RLSA has a feature that nitriding species can be easily controlled by changing process conditions. For example, the supply amount of ammonia (NH ₃ ) gas is supplied so that the supply amount from the second gas supply unit 47 is larger than the supply amount from the first gas supply unit 46. In other words, a large amount of ammonia (NH ₃ ) gas is supplied to a relatively low electron temperature region. In this way, excessive dissociation of ammonia (NH ₃ ) gas can be suppressed, so that NH ₂ radical-rich plasma can be obtained. In this way, a nitriding species suitable for the film to be formed can be supplied. Therefore, a nitride film having a good film quality can be formed by using the plasma processing apparatus 31 including RLSA.

  In the above embodiment, the film formation of the GaN film and the InGaN film has been described. However, the present invention is not limited to this, and it can be used for forming a III-V group semiconductor. In particular, the group III element may be Ga (gallium), In (indium), Al (aluminum), and combinations thereof. In addition to N (nitrogen), P (phosphorus) or As (arsenic) can be used as the group V element.

  In the above-described embodiment, the nitride semiconductor is manufactured using the plasma processing apparatus shown in FIG. 1. However, the present invention is not limited to this, and the nitride semiconductor is manufactured using a plasma processing apparatus having another configuration. May be manufactured.

  FIG. 14 is a schematic cross-sectional view showing the main part of the plasma processing apparatus in this case. FIG. 14 corresponds to the cross section shown in FIG.

  Referring to FIG. 14, a plasma processing apparatus 65 used in the method for manufacturing a nitride semiconductor includes a processing container 32 that performs plasma processing on a substrate W to be processed therein, a gas for plasma excitation in the processing container 32, and the like. A gas supply unit 33 for supplying a material gas used for plasma CVD processing, an ALE gas in atomic layer epitaxy (ALE), which will be described later, and a disk-like support table 34 for supporting the substrate W to be processed; A plasma generation mechanism 39 that generates plasma in the processing container 32 using a microwave as a plasma source and a control unit (not shown) that controls the operation of the entire plasma processing apparatus 65 are provided. The control unit controls the entire plasma processing apparatus 65 such as the gas flow rate in the gas supply unit 33 and the pressure in the processing container 32. In addition, about the structure equivalent to the plasma processing apparatus 31, the same code | symbol is attached | subjected and the description is abbreviate | omitted. The plasma processing apparatus 65 also includes a slot antenna plate 37 shown in FIG.

  Next, a configuration different from the plasma processing apparatus 31 shown in FIG. 1 will be described. The gas supply unit 33 includes a first gas supply unit 46 that supplies gas toward the center of the substrate W to be processed, a second gas supply unit 62 that supplies gas from the peripheral side of the substrate W to be processed, and a processing A third gas supply part 64 provided in a vertical position between the dielectric window 36 and the support base 34 by a support part (not shown) extending from the inner wall surface of the side wall 42 in the container 32. Including. The configuration of the first gas supply unit 46 is the same as that shown in FIG. The second gas supply unit 62 is formed by providing a gas supply hole 63 in the lid portion 44 instead of providing a gas supply hole in the side wall 42. Similarly to the second gas supply unit shown in FIG. 1 described above, the second gas supply unit 62 is also different from the processing vessel 32 in the same manner as the second gas supply unit shown in FIG. Supply in. The third gas supply unit 64 is an annular member and has a diameter slightly larger than that of the support base 34. Gas supply holes (not shown) are provided in the annular member at substantially equal intervals, and gas can be supplied toward the substrate W to be processed.

  The support base 34 is not provided with a high frequency power source for RF bias and a matching unit, and no electrode is provided in the support base 34.

Next, a description will be given of steps in performing the plasma ALE process shown in FIG. 10 using the plasma processing apparatus having the configuration shown in FIG. Referring also to FIG. 10, ALE gas is supplied onto the substrate W to be processed supported on the support table 34, and molecules including atoms constituting crystals to be epitaxially grown are adsorbed on the surface of the substrate W to be processed. (FIG. 10G). Here, the supply of the ALE gas, carried out in the gas supply unit, only from the first gas supply unit 46, toward the target substrate W shown by the arrow F ₁ in FIG. 14. Thereafter, in order to remove the excessively supplied ALE gas, as a first exhaust process, exhaust in the processing container 32, so-called purge is performed. FIG. 15 shows a state in which purging is performed in the plasma processing apparatus shown in FIG. Referring to FIG. 15, the purge gas is supplied by the second gas supply unit 62 toward the support base 34 as indicated by an arrow F < _b > ₂ in FIG. 15. Then, purging is performed by replacing the gas in the processing container 32 with the purge gas (FIG. 10H). In this case, for example, argon (Ar) gas is used as the purge gas. Next, the adsorbed molecules are processed using plasma generated by microwaves (FIG. 10I). FIG. 16 shows a state in which plasma processing is performed in the plasma processing apparatus shown in FIG. Referring to FIG. 16, in this case, plasma is generated by supplying a microwave into the processing vessel 32 using the plasma generating mechanism 39, supplying ammonia (NH ₃ ) gas or nitrogen (N ₂ ) gas, Nitriding treatment with plasma is performed on the adsorption layer for one atomic layer on the processing substrate W. Here, the supply of gas is performed towards the target substrate W shown by the arrow F ₃ from the first gas supply unit 46 and the third gas supply unit 64. Thereafter, the processing chamber 32 is evacuated again as a second evacuation step (FIG. 10J). In this case, as shown in FIG. 15, argon gas is again supplied from the second gas supply unit 63 into the processing container 32 to perform purging.

  In this way, using the plasma processing apparatus 65, the steps (G)-(J) shown in FIG. 10 are made one cycle as a series of flows, and the cycle is repeated until a desired thickness is obtained, thereby forming an ALE layer.

  Of course, when it is desired to apply a bias in the processing of the substrate W to be processed in the plasma processing apparatus 65, as in the plasma processing apparatus 31 shown in FIG. It is good also as a structure provided with these.

  In the above embodiment, the light emitting element has been described as an example of the nitride semiconductor. However, the present invention is not limited to this, and the light emitting element can also be used.

In the above embodiment, the processing is performed at a pressure in the processing container 32 of 20 mTorr or more and 10 Torr or less. However, the present invention is not limited to this, and changes can be made as appropriate. However, if it is used in an ultra-vacuum region of about 10 ⁻¹⁰ Torr as in a molecular beam epitaxy apparatus, productivity is not preferable.

  In the above embodiment, the sapphire substrate is used as the base substrate. However, the present invention is not limited to this, and any material may be used as long as it has crystallinity capable of epitaxy growth. For example, AlN (aluminum nitride), GaN, SiC (silicon carbide), ZnO (zinc oxide), or Si (111 orientation) may be used.

In the above embodiment, the plasma treatment includes a treatment using microwave plasma in which the plasma electron temperature is lower than 1.5 eV and the plasma electron density is higher than 1 × 10 ¹⁰ cm ^−3. However, the present invention is not limited to this. For example, the present invention is also applied to a region where the electron density of plasma is lower than 1 × 10 ¹⁰ cm ⁻³ .

  In the above embodiment, the plasma processing is performed by the microwave by RLSA using the slot antenna plate. However, the present invention is not limited to this, and the microwave plasma processing including the slot antenna having the comb-shaped antenna portion is performed. An apparatus may be used.

  As mentioned above, although embodiment of this invention was described with reference to drawings, this invention is not limited to the thing of embodiment shown in figure. Various modifications and variations can be made to the illustrated embodiment within the same range or equivalent range as the present invention.

  11 Nitride semiconductor, 12 Sapphire substrate, 13 Buffer layer, 14 n-GaN layer, 15, 23, 24 MQW layer, 16 p-AlGaN layer, 17 p-GaN layer, 18 n-electrode, 19 p-electrode, 21a , 21b, 21c, 21d, 21e i-GaN layer, 22a, 22b, 22c, 22d i-InGaN layer, 26, 27 region, 29 temperature adjustment mechanism, 31, 65 plasma processing apparatus, 32 processing vessel, 33, 46, 47, 62, 64 Gas supply unit, 34 Support base, 35 Microwave generator, 36 Dielectric window, 37 Slot antenna plate, 38 Dielectric member, 39 Plasma generation mechanism, 40 slot, 41 Bottom, 42 Side wall, 43 Exhaust Hole, 44 Lid, 45 O-ring, 48 Lower surface, 49 Gas supply system, 30, 50, 63 Gas supply hole, 51 Tubular Support section, 52 cooling jacket, 53 matching mechanism, 54 mode converter, 55 waveguide, 56 coaxial waveguide, 57 recess, 58 high frequency power supply, 59 matching unit, 60 circulation path, 61 electrode.

Claims (21)

A method of manufacturing a nitride semiconductor,
A method for manufacturing a nitride semiconductor, comprising: forming a nitride layer containing a group III element using plasma of a gas containing a group III element generated by a microwave radiated from a slot antenna. The nitride semiconductor includes a multiple quantum well layer,
2. The method for manufacturing a nitride semiconductor according to claim 1, wherein the multiple quantum well layer is formed of three or more nitride layers including the group III. 3. The method for producing a nitride semiconductor according to claim 2, wherein the group III element is Ga. 3. The method for manufacturing a nitride semiconductor according to claim 2, wherein the multiple quantum well layer is formed of three layers of a first GaN layer, an InGaN layer, and a second GaN layer in that order. 5. The method for manufacturing a nitride semiconductor according to claim 4, wherein at least one or more sets of InGaN and GaN that are further formed are formed on the three layers. The step of forming the nitride layer uses a plasma generated by microwaves radiated from a slot antenna, and nitride by an atomic layer epitaxy (ALE) method or a plasma CVD (Chemical Vapor Deposition) method. The method for manufacturing a nitride semiconductor according to claim 1, comprising a step of forming a layer. 2. The method for manufacturing a nitride semiconductor according to claim 1, wherein the step of forming the nitride layer is performed at a temperature of 200 ° C. or higher and lower than 700 ° C. 3. The method for manufacturing a nitride semiconductor according to claim 7, wherein the temperature is 400 ° C. or lower. 2. The method of manufacturing a nitride semiconductor according to claim 1, wherein the step of forming the nitride layer is performed at a pressure of 10 mTorr to 10 Torr. The method for manufacturing a nitride semiconductor according to claim 9, wherein the step of forming the nitride layer is performed at a pressure of 10 mTorr or more and 500 mTorr or less. The step of forming the nitride layer includes a step of forming a GaN layer, and a step of forming an InGaN layer in the thickness direction of the GaN layer,
The step of forming the GaN layer includes a step of forming by the plasma CVD using plasma generated by microwaves radiated from a slot antenna,
The method of manufacturing a nitride semiconductor according to claim 6, wherein the step of forming the InGaN layer includes a step of forming by atomic layer epitaxy using plasma generated by microwaves radiated from a slot antenna. A nitride semiconductor,
A nitride semiconductor comprising a nitride layer formed using a plasma of a gas containing a group III element generated by a microwave radiated from a slot antenna. The nitride semiconductor includes a multiple quantum well layer,
The nitride semiconductor according to claim 12, wherein the multiple quantum well layer is formed of three or more nitride layers including the group III. The nitride semiconductor according to claim 12, wherein the group III element is Ga. The nitride semiconductor according to claim 12, wherein the multiple quantum well layer is formed of three layers of a first GaN, an InGaN, and a second GaN in order. The nitride semiconductor according to claim 15, wherein at least one or more sets of InGaN and GaN further formed are formed on the three layers. A method of forming a group III-V nitride composed of a nitride containing a three-layer group III element,
Forming a first nitride layer containing a group III element;
Forming a second nitride layer containing a Group III element different from the first nitride layer on the first nitride layer;
Forming a third nitride element containing the same group III element as the second nitride layer on the second nitride layer to form the multiple quantum well layer,
The multiple quantum well layer composed of the first to third nitride layers containing the group III element has an atomic layer epitaxy (ALE) at a temperature of 200 ° C. to less than 700 ° C. and a pressure of 10 mTorr to 10 Torr. A method for forming a group III-V nitride formed by an epitaxy method or a plasma CVD (chemical vapor deposition) method. The method for forming a group III-V nitride film according to claim 17, wherein the group III element is Ga. The first nitride layer is first GaN, the second nitride layer is first InGaN, and the third nitride layer is second GaN. A method for forming a group III-V nitride film according to claim 18. On the third nitride layer, the second nitride layer to be further formed and the first or third nitride layer to be further formed are sequentially formed into one set, and at least one set is The method for forming a group III-V nitride film according to claim 19, which is formed. A method for forming a group III-V nitride film,
Preparing a substrate having crystallinity;
Adsorbing a gas containing a group III element on the substrate;
Exhausting a gas containing a group III element not adsorbed on the substrate;
Forming a nitride containing a group III element by irradiating a gas molecule containing a nitrogen atom to a gas molecule containing the group III element and nitriding it,
The step of forming the nitride containing the group III element includes forming a group III-V nitride formed by an atomic layer epitaxy method or a plasma CVD method at a temperature of 200 ° C. to less than 700 ° C. and a pressure of 10 mTorr to 10 Torr. Film forming method.

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