JPWO2012111140A1 - Optical receiver, nonlinear equalization circuit, and digital signal processing circuit - Google Patents

Abstract

The optical receiver is provided with at least a digital signal processing integrated circuit. The digital signal processing integrated circuit includes at least a nonlinear equalization circuit that applies nonlinear equalization digital signal processing to four digital signals. Further, the non-linear equalization circuit is composed of N-stage (N ≧ 1) digital signal processing circuits, and among the N-stage digital signal processing circuits, the m-th stage digital signal processing circuit is an input complex digital signal sequence. A first linear distortion addition unit that adds linear distortion to dx [m, i] and a waveform distortion added to the complex digital signal given the complex phase rotation. A first linear distortion removing unit for removing waveform distortion in the unit.

Description

  The present invention relates to an optical receiver of an optical transmission system using a digital coherent system and a non-linear equalization circuit including N (N ≧ 1) stages of digital signal processing circuits.

  For high-capacity optical transmission such as 40 Gbit / s and 100 Gbit / s, overcoming the optical signal-to-noise power limit and high-density wavelength multiplexing are problems. As a technique for overcoming the optical signal-to-noise power limit, binary phase-shift keying (BPSK) or quaternary PSK (QPSK) is used in contrast to conventional on-off keying (OOK). Quaternary Phase-Shift Keying) is known. For high-density wavelength multiplexing, a method of doubling the number of transmission bits per symbol by polarization multiplexing that assigns independent signals to two orthogonal polarization components, QPSK, 16-value orthogonal amplitude, etc. A method of increasing the signal multiplicity and increasing the number of transmission bits per symbol is known, such as modulation (16QAM: 16 Quadrature Amplitude Modulation). QPSK and 16QAM are transmitted by assigning signals to the same phase axis (I axis: In-Phase axis) and quadrature phase axis (Q axis: Quadrature-Phase axis) in the optical transmitter on the transmission side of the optical transmission system. To do.

  Conventionally, a direct detection method such as a square detection method or a delay detection method has been used as a detection method of an optical signal. In these methods, an optical signal can be detected without having a local oscillation light source in the optical receiver, and the optical receiver can be mounted simply and at low cost. On the other hand, a digital coherent system that receives digital signal processing in combination with a synchronous detection system having a local oscillation light source in an optical receiver has attracted attention (for example, see Non-Patent Document 1).

  In this digital coherent method, linear photoelectric conversion by synchronous detection and fixed, semi-fixed, and adaptive linear equalization by digital signal processing enable stable polarization multiplexed signal separation and waveform in optical receivers. Distortion compensation is possible. For this reason, it is possible to realize excellent equalization characteristics and excellent noise tolerance against linear waveform distortion caused by chromatic dispersion and polarization mode dispersion (PMD) generated in the optical transmission line.

  FIG. 9 is a diagram illustrating a configuration example of a multi-relay optical transmission line and a concept of a sequential calculation method for forward propagation. As shown in FIG. 9, when transmitting with high optical power through an optical fiber 92 in which an optical amplifier 91 is inserted, the fiber nonlinear optical effect causes a significant deterioration in transmission quality. Propagation in an optical fiber is described by a non-linear Schrodinger equation, and a split-step Fourier method (SSFM) is used as a sequential calculation method. Usually, in SSFM, an optical transmission line is divided into short sections (sections that are sufficiently shorter than one relay section of a multi-relay system), linear effects such as transmission loss and chromatic dispersion (CD), and nonlinear phase that is self-phase modulation. Sequential calculation that alternately incorporates non-linear effects such as rotation (NL) is performed (see FIG. 9).

  As a method for equalizing the transmission quality deterioration due to the fiber nonlinear optical effect, for example, the digital back propagation method shown in Non-Patent Document 2 has been studied. FIG. 10 is a diagram illustrating the concept of the digital back propagation method. As shown in FIG. 10, this digital back-propagation method is a method of obtaining an optical waveform without distortion at the transmission end by performing propagation calculation in the direction opposite to the transmission direction by SSFM. In SSFM in the digital back-propagation method, signal processing is normally performed at most at several sections / relays to 10 sections / relays in consideration of a load on signal processing. At this time, since it is difficult to remove nonlinear interference components from other wavelength division multiplexed channels, the waveform distortion due to nonlinear phase rotation, which is self-phase modulation, which is usually a nonlinear effect in the channel, is equalized. (See FIG. 10).

Optical Internetworking Forum, "100G Ultra Long Haul DWDM Framework Document", http://www.oiforum.com/public/documents/OIF-FD-100G-DWDM-01.0.pdf, June 2009. T. Hoshida, "A question of diminishing returns?", ECOC (European Conference on Optical Communication) 2010, Workshop 11, 2010.

  However, according to the above prior art (Non-Patent Document 2), since the SSFM is solved in the direction opposite to the transmission direction, the circuit scale increases in proportion to the number of relays.

  The present invention has been made to solve the above-described problems, and is capable of equalizing waveform distortion caused by the fiber nonlinear optical effect with a circuit scale and power consumption smaller than those of the digital back propagation method. An object of the present invention is to obtain an optical receiver and a non-linear equalization circuit capable of improving the quality.

  An optical receiver according to the present invention includes a local oscillation light source that generates an optical signal that oscillates at the same center wavelength as a received optical signal, and a polarization that mixes the received optical signal and an optical signal output from the local oscillation light source. Wave diversity optical 90 degree hybrid circuit, four balanced photon detectors that detect four pairs of optical signals output from the optical 90 degree hybrid circuit, and 4 output from the four photon detectors Four analog-digital converters for analog-digital conversion of two electrical signals and a digital signal processing integrated circuit connected to the four analog-digital converters are provided.

  The digital signal processing integrated circuit of the optical receiver according to the present invention includes a chromatic dispersion compensation circuit that compensates for chromatic dispersion of an optical transmission line for four digital signals, and a non-linear function for the four digital signals. A non-linear equalization circuit that applies optimized digital signal processing, an adaptive equalization circuit that compensates for polarization mode dispersion of a transmission line and separates polarization multiplexed signals for four digital signals, and four digital signals On the other hand, a carrier frequency offset compensation circuit that compensates for a center frequency difference between the received optical signal and the optical signal output from the local oscillation light source, and the received optical signal and the local for four digital signals. And at least a carrier phase offset compensation circuit that compensates for an optical phase difference with an optical signal output from the oscillation light source.

Furthermore, the non-linear equalization circuit of the digital signal processing integrated circuit of the optical receiver according to the present invention is composed of N stages (N ≧ 1) of digital signal processing circuits. The digital signal processing circuit at the stage adds the first linear distortion that adds the linear distortion of the transfer function Hpre, x [m] (f) to the input first complex digital signal sequence dx [m, i]. A second linear distortion adding unit that adds a linear distortion of the transfer function Hpre, y [m] (f) to the input second complex digital signal sequence dy [m, i], and a linear distortion. A first power calculator that calculates power Px [m, i], which is the square of the absolute value of the added first complex digital signal sequence, and the second complex digital signal to which linear distortion is added Power Py [m, i, which is the square of the absolute value of the series And a weighted average power Pavg, xx [m, i] = αxx [−a] Px [m, i−a] + αxx [−a + 1] of the power Px [m, i] Px [m, i−a + 1] +... + Αxx [0] Px [m, i] +... + Αxx [b] Px [m, i + b] and the power Py [M, i] weighted average power Pavg, xy [m, i] = αxy [−a] Py [m, i−a] + αxy [−a + 1] Py [m, i−a + 1] +... + Αxy [ 0] Py [m, i] +... + Αxy [b] Py [m, i + b] and a weighted average power Pavg, yx [m of the power Px [m, i]. , I] = αyx [−a] Px [m, i−a] + αyx [−a + 1] Px [m, i−a + 1] + ... + Αyx [0] Px [m, i] +... + Αyx [b] Px [m, i + b] and a weighted average power of the power Py [m, i] Pavg, yy [m, i] = αyy [−a] Py [m, i−a] + αyy [−a + 1] Py [m, i−a + 1] +... + Αyy [0] Py [m, i] + ... + αyy [b] Py [m, i + b] for calculating the fourth weighted average unit, and the weighted average power Pavg, xx [m, i] is multiplied by the first efficiency γxx to obtain the phase rotation amount φxx. [M, i] = γxx [m, i] Pavg, xx [m, i] for generating a first phase rotation amount generator, and the weighted average power Pavg, xy [m, i] with a second efficiency. Multiplying γxy, phase rotation amount φxy [m, i] = γxy [m, i] Pavg, xy [m, i] A second phase rotation amount generation unit to generate, and the weighted average power Pavg, yx [m, i] is multiplied by a third efficiency γyx to obtain a phase rotation amount φyx [m, i] = γyx [m, i]. A third phase rotation amount generating unit for generating Pavg, yx [m, i], and multiplying the weighted average power Pavg, yy [m, i] by a fourth efficiency γyy to obtain a phase rotation amount φyy [m, i] = γyy [m, i] Pavg, yy [m, i] for generating a fourth phase rotation amount generator, and adding the phase rotation amounts φxx [m, i] and φxy [m, i] A first addition unit for calculating complex phase rotation amount φx [m, i] = φxx [m, i] + φxy [m, i], and the phase rotation amounts φyx [m, i] and φyy [m, i] is added to calculate a complex phase rotation amount φy [m, i] = φyx [m, i] + φyy [m, i] An adder, a first complex phase rotation signal generation unit that converts the complex phase rotation amount φx [m, i] into a complex signal exp (−jφx [m, i]), and the complex phase rotation amount φy [ m, i] is converted to a complex signal exp (-jφy [m, i]), and the complex signal is added to the first complex digital signal sequence to which linear distortion is added. A first complex phase rotation unit that gives a complex phase rotation by multiplying exp (−jφx [m, i]), and the complex signal exp (− jφy [m, i]) is multiplied by a second complex phase rotator that gives a complex phase rotation, and the complex digital signal is given the complex phase rotation by the first complex phase rotator. Waveform distortion transfer function Hpre, x [m] (f Inverse function Hpre, by adding x [m] ^-1 (f) or the complex conjugate function ^{Hpre, x [m] * (} f) the transfer function Hpost, x [m] waveform distortion with a (f) of, The first linear distortion removing unit for removing waveform distortion in the first linear distortion adding unit, and the linear waveform distortion with respect to the complex digital signal given the complex phase rotation by the second complex phase rotating unit. The transfer function Hpre, y [m] (f) of the inverse function Hpre, y [m] ⁻¹ (f) or the complex conjugate function Hpre, y [m] ^* (f) a second linear distortion removing unit that removes the waveform distortion in the second linear distortion adding unit by adding the waveform distortion included in f).

  The optical receiver according to the present invention can equalize waveform distortion caused by the fiber nonlinear optical effect with a circuit scale and power consumption smaller than those of the digital back propagation method, and can improve transmission quality.

It is a block diagram which shows the structure of the optical receiver which concerns on Example 1 of this invention. It is a block diagram which shows the structure of the digital signal processing integrated circuit of the optical receiver which concerns on Example 1 of this invention. 1 is a block diagram showing a configuration of a nonlinear equalizer circuit according to Embodiment 1 of the present invention. FIG. 1 is a block diagram showing a configuration of a digital signal processing circuit according to Embodiment 1 of the present invention. It is a figure which shows the relationship between the chromatic dispersion value of the digital signal processing circuit which concerns on Example 1 of this invention, and the integrated nonlinear phase rotation amount, and its simplification. It is a figure which shows the relationship between the chromatic dispersion value of the digital signal processing circuit which concerns on Example 1 of this invention, and the integrated nonlinear phase rotation amount, and its simplification. It is a figure which shows the relationship between the chromatic dispersion value of the digital signal processing circuit which concerns on Example 1 of this invention, and the integrated nonlinear phase rotation amount, and its simplification. It is a figure which shows the concept of the nonlinear equalization of the nonlinear equalization circuit based on Example 1 of this invention. It is a block diagram which shows the structure which simulated the function of the digital signal processing integrated circuit of the optical receiver which concerns on Example 1 of this invention. It is a figure which shows the equalization stage number dependence of the nonlinear equalization circuit based on Example 1 of this invention. It is a figure which shows the concept of the structural example of a multi-relay optical transmission line, and the sequential calculation method of a forward propagation. It is a figure which shows the concept of a digital back propagation system.

  Embodiment 1 of the present invention will be described below.

  An optical receiver, a nonlinear equalization circuit, and a digital signal processing circuit according to Embodiment 1 of the present invention will be described with reference to FIGS. 1 is a block diagram showing a configuration of an optical receiver according to Embodiment 1 of the present invention. In addition, in each figure, the same code | symbol shows the same or equivalent part.

  In FIG. 1, an optical receiver includes a local oscillation light source 100, a polarization diversity optical 90-degree hybrid circuit 200, four balanced photon detectors 300A, 300B, 300C, and 300D, and four analog-to-digital conversions. A device (ADC) 400A, 400B, 400C, 400D and a digital signal processing integrated circuit 500 are provided.

  FIG. 2 is a block diagram showing the configuration of the digital signal processing integrated circuit of the optical receiver according to Embodiment 1 of the present invention.

  In FIG. 2, a digital signal processing integrated circuit 500 includes a preprocessing circuit 502, a chromatic dispersion compensation circuit 503, a nonlinear equalization circuit 504, a timing extraction circuit 505, an adaptive equalization circuit 506, and a carrier frequency offset compensation circuit. 507, a carrier phase offset compensation circuit 508, and an identification circuit 509 are provided.

  FIG. 3 is a block diagram showing the configuration of the nonlinear equalization circuit according to Embodiment 1 of the present invention.

  In FIG. 3, a non-linear equalization circuit 504 is composed of N stages (N ≧ 1) of digital signal processing circuits, and includes a first stage digital signal processing circuit 11, a second stage digital signal processing circuit 12, and m. An (m <N) -th stage digital signal processing circuit 1m and an N-th stage digital signal processing circuit 1N are provided.

  FIG. 4 is a block diagram showing the configuration of the digital signal processing circuit according to Embodiment 1 of the present invention. FIG. 4 shows one stage (m-th stage) of N stages of digital signal processing circuits constituting the nonlinear equalization circuit 504.

  In FIG. 4, the digital signal processing circuit 1m includes two chromatic dispersion addition units 1A and 1B, two power calculation units 2A and 2B, four weighted averaging units 3A, 3B, 3C, and 3D, and four efficiency multiplications. 4A, 4B, 4C, 4D, two adders 5A, 5B, two complex phase rotation signal generation units 6A, 6B, two complex phase rotation units 7A, 7B, and two chromatic dispersion removal units 8A and 8B are provided.

  The chromatic dispersion adding units 1A and 1B and the chromatic dispersion removing units 8A and 8B can be realized by a finite-length impulse response filter in the time domain or the frequency domain.

  When N ≧ 2, the m-th stage chromatic dispersion removal unit 8A (referred to as chromatic dispersion addition amount px) and the m + 1-th stage chromatic dispersion addition unit 1A (referred to as chromatic dispersion addition amount qx) are 2 Instead of being divided into two functional blocks, a single chromatic dispersion addition unit having a chromatic dispersion addition amount px + qx may be used. Similarly, the m-th stage chromatic dispersion removal unit 8B (referred to as chromatic dispersion addition amount py) and the m + 1-th stage chromatic dispersion addition unit 1B (referred to as chromatic dispersion addition amount qy) are intentionally divided into two functional blocks. Alternatively, a single chromatic dispersion addition unit having a chromatic dispersion addition amount py + qy may be used. That is, among the N-stage (N ≧ 2) digital signal processing circuits, the m (m <N) -th stage digital signal processing circuit has the transfer functions Hpost, z [m] (f) and Hpre, z [m + 1]. The two linear filters (zε {x, y}) represented by (f) may be realized as a single linear filter Hjoint, z [m: m + 1] (f).

  Next, operations of the optical receiver, the nonlinear equalization circuit, and the digital signal processing circuit according to the first embodiment will be described with reference to the drawings.

  In FIG. 1, a local oscillation light source 100 of an optical receiver oscillates at a center wavelength approximately coincident with the center wavelength of an optical signal (received optical signal) input from an optical transmission line (not shown), and has a single wavelength CW (Continuous Wave) optical signal is generated, and this CW optical signal is output to the polarization diversity optical 90-degree hybrid circuit 200.

  The optical 90-degree hybrid circuit 200 mixes a received optical signal input from an optical transmission line (not shown) and a CW optical signal input from the local oscillation light source 100, and outputs an optical signal in which eight kinds of interference are generated. To do.

  That is, the optical 90-degree hybrid circuit 200 includes two orthogonal polarization modes (X / Y) of the received optical signal and a phase difference (0 degree / 180 degree / 90 degree) between the received optical signal and the CW optical signal. / 270 degrees), an X polarization (0 degree) interference light signal and an X polarization (180 degrees) interference light signal are output to the balanced photon detector 300A.

  Similarly, the optical 90-degree hybrid circuit 200 outputs an X-polarized (90 degrees) interference optical signal and an X-polarized (270 degrees) interference optical signal to the balanced photon detector 300B, and outputs a Y-polarized light. The wave (0 degree) interference light signal and the Y polarization (180 degree) interference light signal are output to the balanced photon detector 300C, and the Y polarization (90 degree) interference light signal and the Y polarization The interference light signal of the wave (270 degrees) is output to the balanced photon detector 300D.

  The photon detector 300A square-detects the X-polarized (0 degree) interference optical signal and the X-polarized (180 degree) interference optical signal input from the optical 90-degree hybrid circuit 200, respectively, and converts them into electrical signals. Then, the difference between each electric signal is output to the analog-to-digital converter 400A.

  Similarly, the photon detector 300B square-detects the X-polarized (90 degrees) interference optical signal and the X-polarized (270 degrees) interference optical signal input from the optical 90-degree hybrid circuit 200, respectively. It converts into a signal and outputs the difference of each electric signal to the analog-digital converter 400B. The photon detector 300C square-detects the Y-polarization (0 degree) interference optical signal and the Y-polarization (180 degree) interference optical signal input from the optical 90-degree hybrid circuit 200, respectively, and performs an electrical signal detection. And the difference between the electric signals is output to the analog-to-digital converter 400C. Further, the photon detector 300D square-detects the Y-polarization (90 degrees) interference optical signal and the Y-polarization (270 degrees) interference optical signal input from the optical 90-degree hybrid circuit 200, respectively, and performs electrical detection. And the difference between the electric signals is output to the analog-to-digital converter 400D.

  The analog-to-digital converter 400A samples the electrical signal input from the photon detector 300A and outputs a digital signal XI that has been discrete-timed and quantized to the digital signal processing integrated circuit 500.

  Similarly, the analog-to-digital converter 400B samples the electrical signal input from the photon detector 300B and outputs a digital signal XQ that has been discrete-timed and quantized to the digital signal processing integrated circuit 500. Further, the analog-to-digital converter 400C samples the electrical signal input from the photon detector 300C, and outputs the digital signal YI that has been discrete time and quantized to the digital signal processing integrated circuit 500. Further, the analog-to-digital converter 400D samples the electrical signal input from the photon detector 300D, and outputs the digital signal YQ that has been discrete time and quantized to the digital signal processing integrated circuit 500.

  In FIG. 2, the pre-processing circuit 502 of the digital signal processing integrated circuit 500 includes a digital signal XI input from the analog-digital converter 400A, a digital signal XQ input from the analog-digital converter 400B, and an input from the analog-digital converter 400C. Pre-processing such as amplitude normalization for suppressing amplitude variations of the four digital signals and deskew for delay difference correction with respect to the digital signal YI and the digital signal YQ input from the analog-digital converter 400D And outputs the four processed digital signals to the chromatic dispersion compensation circuit 503.

  The chromatic dispersion compensation circuit 503 roughly performs chromatic dispersion generated in the transmission path by performing linear waveform equalization by time domain equalization or frequency domain equalization on the four digital signals input from the preprocessing circuit 502. Four digital signals after 100% compensation and chromatic dispersion compensation are output to the nonlinear equalization circuit 504.

  The non-linear equalization circuit 504 applies non-linear equalization digital signal processing, which will be described later, to the four digital signals (considered as two pairs of complex signals) input from the chromatic dispersion compensation circuit 503, so that the non-linear equalization 4 Two digital signals (considered as two pairs of complex signals) are output to the timing extraction circuit 505.

  The timing extraction circuit 505 adaptively extracts the identification timing from the four digital signals input from the nonlinear equalization circuit 504, and performs feedback control on the sampling timing of the analog-to-digital converters 400A to 400D. Four digital data having a sampling rate of twice the sampling ratio are output to the adaptive equalization circuit 506.

  The adaptive equalization circuit 506 adaptively performs polarization multiplexing / demultiplexing on the four digital signals input from the timing extraction circuit 505 using an algorithm such as an envelope stabilization standard, and further, a transmission line The four digital signals compensated for PMD (polarization mode dispersion) and the like are output to the carrier frequency offset compensation circuit 507.

  The carrier frequency offset compensation circuit 507 compensates for the center frequency difference between the CW optical signal output from the local oscillation light source 100 and the received optical signal in the four digital signals input from the adaptive equalization circuit 506, and after compensation. The four digital signals are output to the carrier phase offset compensation circuit 508.

  The carrier phase offset compensation circuit 508 is a complex that uses the four digital signals input from the carrier frequency offset compensation circuit 507 as signal points for the X polarization component and the Y polarization component. On the plane, adaptively perform phase offset compensation so that the signal points converge to four points of 45 degrees, 135 degrees, -45 degrees, and -135 degrees, and output the digital signal after the phase offset compensation to the identification circuit 509. To do.

  The identification circuit 509 performs binary identification on the four digital signals input from the carrier phase offset compensation circuit 508, and outputs the four binary signals after identification to the outside (not shown).

  In FIG. 3, the digital signal processing circuit 11 in the first stage of the non-linear equalization circuit 504 composed of N stages (N ≧ 1) of the digital signal processing circuit includes a complex digital signal dx [0] from the chromatic dispersion compensation circuit 503. = Exi [0] + jExq [0] and dy [0] = Eyi [0] + jEyq [0] are input, and after performing one-stage nonlinear equalization, the equalized complex digital signal d′ x [0] = E′xi [0] + jE′xq [0] and d′ y [0] = E′yi [0] + jE′yq [0] are output to the second-stage digital signal processing circuit 12. .

  The second-stage digital signal processing circuit 12 receives the complex digital signal dx [1] (= d′ x [0]) and dy [1] (= d′ y [0] from the first-stage digital signal processing circuit 11. ]) Is input, and after performing one-stage nonlinear equalization, the equalized complex digital signal d′ x [1] = E′xi [1] + jE′xq [1] and d′ y [ 1] = E′yi [1] + jE′yq [1] is output to the third-stage digital signal processing circuit (not shown).

  The m (m <N) stage digital signal processing circuit 1m receives a complex digital signal dx [m−1] (= d′ x [m−2] from an m−1 stage digital signal processing circuit (not shown). )) And dy [m−1] (= d′ y [m−2]) are input, and after performing nonlinear equalization for one stage, the equalized complex digital signal d′ x [m −1] = E′xi [m−1] + jE′xq [m−1] and d′ y [m−1] = E′yi [m−1] + jE′yq [m−1] in m + 1 stages. Output to a digital signal processing circuit (not shown).

  The N-th stage digital signal processing circuit 1N receives a complex digital signal dx [N-1] (= d'x [N-2]) from the N-1th stage digital signal processing circuit (not shown), and dy. After [N−1] (= d′ y [N−2]) is input and nonlinear equalization for one stage is performed, the equalized complex digital signal d′ x [N−1] = E ′ xi [N−1] + jE′xq [N−1] and d′ y [N−1] = E′yi [N−1] + jE′yq [N−1] are output to the timing extraction circuit 505.

  In FIG. 4, the chromatic dispersion adding unit 1A adds chromatic dispersion to the complex digital signal sequence dx [m, i] = Exi [m] + jExq [m] input from the previous stage, and the complex phase rotation unit 7A And output to the power calculator 2A. Similarly, the chromatic dispersion adding unit 1B adds chromatic dispersion to the complex digital signal sequence dy [m, i] = Eyi [m] + jEyq [m] input from the previous stage, and the complex phase rotation unit 7B. It outputs to the electric power calculation part 2B. For example, the chromatic dispersion amount of the chromatic dispersion adding units 1A and 1B is set to −600 ps / nm. That is, the first linear distortion adding unit (wavelength dispersion adding unit 1A) performs linear waveform distortion of the transfer function Hpre, x [m] (f) on the input complex digital signal sequence dx [m, i]. Append. Similarly, the second linear distortion adding unit (wavelength dispersion adding unit 1B) performs linear waveform distortion of the transfer function Hpre, y [m] (f) with respect to the input complex digital signal sequence dy [m, i]. Is added.

  The power calculation unit 2A calculates the square of the absolute value of the complex digital signal sequence after wavelength dispersion addition input from the wavelength dispersion addition unit 1A, that is, the power Px [m, i], and the weighted average unit 3A and the weighted average Output to part 3C. Similarly, the power calculation unit 2B calculates the square of the absolute value of the complex digital signal sequence after wavelength dispersion addition input from the wavelength dispersion addition unit 1B, that is, the power Py [m, i], and the weighted average unit 3B. To the weighted average unit 3D.

  The weighted average unit 3A, for the power Px [m, i], the weighted average power Pavg, xx [m, i] = αxx [−a] Px [m, i−a] + αxx [−a + 1] Px [m, i−a + 1] +... + αxx [0] Px [m, i] +... + αxx [b] Px [m, i + b] is calculated, and Pavg, xx [m, i] is input to the efficiency multiplier 4A. Output. αxx [−a], αxx [−a + 1], and αxx [b] correspond to weights.

  The weighted average unit 3B, for the power Py [m, i], the weighted average power Pavg, xy [m, i] = αxy [−a] Py [m, i−a] + αxy [−a + 1] Py [m, i−a + 1] +... + αxy [0] Py [m, i] +... + αxy [b] Py [m, i + b] is calculated, and Pavg, xy [m, i] is calculated in the efficiency multiplier 4B. Output. αxy [−a], αxy [−a + 1], and αxy [b] correspond to weights.

  The weighted average unit 3C, for the power Px [m, i], the weighted average power Pavg, yx [m, i] = αyx [−a] Px [m, i−a] + αyx [−a + 1] Px [m, i−a + 1] +... + αyx [0] Px [m, i] +... + αyx [b] Px [m, i + b] is calculated, and Pavg, yx [m, i] is input to the efficiency multiplier 4C. Output. αyx [−a], αyx [−a + 1], and αyx [b] correspond to weights.

  The weighted average unit 3D, for the power Py [m, i], the weighted average power Pavg, yy [m, i] = αyy [−a] Py [m, i−a] + αyy [−a + 1] Py [m, i−a + 1] +... + αyy [0] Py [m, i] +... + αyy [b] Py [m, i + b] is calculated, and Pavg, yy [m, i] is input to the efficiency multiplier 4D. Output. αyy [−a], αyy [−a + 1], and αyy [b] correspond to weights.

  The average interval −a to b is, for example, a = b = 4, and the weights are, for example, αxx [−a] = αxx [−a + 1] =... = Αxx [b] = 1/9, αxy [−a]. = Αxy [−a + 1] =... = Αxy [b] = 1/9, αyx [−a] = αyx [−a + 1] =... = Αyx [b] = 1/9, αyy [−a] = Αyy [−a + 1] =... = Αyy [b] = 1/9.

  The efficiency multiplier 4A multiplies the weighted average power Pavg, xx [m, i] input from the weighted average unit 3A by the nonlinear phase rotation efficiency γxx [m], and the multiplication result φxx [m, i] = γxx [m ] Pavg, xx [m, i] is output to the adder 5A.

  The efficiency multiplier 4B multiplies the weighted average power Pavg, xy [m, i] input from the weighted average unit 3B by the nonlinear phase rotation efficiency γxy [m], and the multiplication result φxy [m, i] = γxy [m ] Pavg, xy [m, i] is output to the adder 5A.

  The efficiency multiplier 4C multiplies the weighted average power Pavg, yx [m, i] input from the weighted average unit 3C by the nonlinear phase rotation efficiency γyx [m], and the multiplication result φyx [m, i] = γyx [m ] Pavg, yx [m, i] is output to the adder 5B.

  The efficiency multiplier 4D multiplies the weighted average power Pavg, yy [m, i] input from the weighted average unit 3D by the nonlinear phase rotation efficiency γyy [m], and the multiplication result φyy [m, i] = γyy [m. ] Pavg, yy [m, i] is output to the adder 5B.

  That is, the first phase rotation amount generation unit (efficiency multiplication unit 4A) multiplies the weighted average power Pavg, xx [m, i] by the first efficiency γxx to obtain the phase rotation amount φxx [m, i] = γxx. [M, i] Pavg, xx [m, i] is generated. Further, the second phase rotation amount generation unit (efficiency multiplication unit 4B) multiplies the weighted average power Pavg, xy [m, i] by the second efficiency γxy to obtain the phase rotation amount φxy [m, i] = γxy. [M, i] Pavg, xy [m, i] is generated. Further, the third phase rotation amount generation unit (efficiency multiplication unit 4C) multiplies the weighted average power Pavg, yx [m, i] by the third efficiency γyx to obtain the phase rotation amount φyx [m, i] = γyx. [M, i] Pavg, yx [m, i] is generated. Further, the fourth phase rotation amount generation unit (efficiency multiplication unit 4D) multiplies the weighted average power Pavg, yy [m, i] by the fourth efficiency γyy to obtain a phase rotation amount φyy [m, i] = γyy. [M, i] Pavg, yy [m, i] is generated.

  The adding unit 5A adds the nonlinear phase rotation amount φxx [m, i] input from the weighted average unit 4A and the nonlinear phase rotation amount φxy [m, i] input from the weighted average unit 4B. The result φx [m, i] = φxx [m, i] + φxy [m, i] is output to the complex phase rotation signal generation unit 6A. Similarly, the adding unit 5B adds the nonlinear phase rotation amount φyx [m, i] input from the weighted average unit 4C and the nonlinear phase rotation amount φyy [m, i] input from the weighted average unit 4D. Then, the addition result φy [m, i] = φyx [m, i] + φyy [m, i] is output to the complex phase rotation signal generation unit 6B.

  The complex phase rotation signal generation unit 6A converts φx [m, i] input from the addition unit 5A into a complex signal exp (−jφx [m, i]) and outputs the complex signal to the complex phase rotation unit 7A. Similarly, the complex phase rotation signal generation unit 6B converts φy [m, i] input from the addition unit 5B into a complex signal exp (−jφy [m, i]) and outputs it to the complex phase rotation unit 7. To do.

  The complex phase rotation unit 7A includes a complex digital signal sequence added with the chromatic dispersion input from the chromatic dispersion addition unit 1A and a complex signal exp (−jφx [m, i) input from the complex phase rotation signal generation unit 6A. ]), The inverse operation of the nonlinear phase rotation of the transmission line is performed, and the calculated signal is output to the chromatic dispersion removing unit 8A. Similarly, the complex phase rotation unit 7B includes the complex digital signal sequence to which the chromatic dispersion is input input from the chromatic dispersion addition unit 1B and the complex signal exp (−jφy [ m, i]) is multiplied by the inverse operation of the non-linear phase rotation of the transmission line, and the calculated complex digital signal is output to the chromatic dispersion removing unit 8B.

  The chromatic dispersion removing unit 8A gives the chromatic dispersion of opposite polarity to the complex digital signal input from the complex phase rotating unit 7A so as to remove the chromatic dispersion added by the chromatic dispersion adding unit 1A, and the complex signal after adding the chromatic dispersion is added. The digital signal d′ x “m” = E′xi [m] + jE′xq [m] is output to the next stage. Similarly, the chromatic dispersion removal unit 8B gives chromatic dispersion of opposite polarity to the complex digital signal input from the complex phase rotation unit 7B so as to remove the chromatic dispersion added by the chromatic dispersion addition unit 1B, and adds chromatic dispersion. The subsequent complex digital signal d′ y “m” = E′yi [m] + jE′yq [m] is output to the next stage.

That is, the first linear distortion removing unit (wavelength dispersion removing unit 8A) has a linear waveform distortion transfer function Hpre, x [m] with respect to the complex digital signal given the complex phase rotation by the complex phase rotating unit 7A. Waveform distortion having the inverse function Hpre, x [m] ⁻¹ (f) of (f) or the complex conjugate function Hpre, x [m] ^* (f) as the transfer function Hpost, x [m] (f) is added. Thus, the waveform distortion in the first linear distortion adding unit is removed. Similarly, the second linear distortion removal unit (wavelength dispersion removal unit 8B) has a linear waveform distortion transfer function Hpre, y [m] with respect to the complex digital signal given the complex phase rotation by the complex phase rotation unit 7B. ] Add waveform distortion having inverse function Hpre, y [m] ⁻¹ (f) or complex conjugate function Hpre, y [m] ^* (f) as transfer function Hpost, y [m] (f) By doing so, the waveform distortion in the second linear distortion adding section is removed.

  For example, when chromatic dispersion of −600 ps / nm is added by the chromatic dispersion adding unit 1A and the chromatic dispersion adding unit 1B, the chromatic dispersion removing unit 8A and the chromatic dispersion removing unit 8B add chromatic dispersion of +600 ps / nm. .

  5A, 5B and 5C are diagrams showing the relationship between the chromatic dispersion value of the digital signal processing circuit according to the first embodiment of the present invention and the accumulated nonlinear phase rotation amount and simplification thereof. FIG. 6 is a diagram showing the concept of nonlinear equalization of the nonlinear equalizer circuit according to Embodiment 1 of the present invention.

  In the digital signal processing circuit according to the first embodiment of the present invention, the integrated value (∫φNL [i] of the nonlinear phase rotation amount given under a specific intersymbol interference condition (for example, the specific chromatic dispersion value CD [i]). ]) Respectively. Most accurately, as shown in FIG. 5A, the relationship between the chromatic dispersion value (horizontal axis: CD Value) and the integrated nonlinear phase rotation amount (vertical axis: ∫φNL) is obtained. In practice, discretization is possible as shown in FIG. 5B, and most simply, it can be represented by a single chromatic dispersion value as shown in FIG. 5C. Of course, if the degree of discretization of the chromatic dispersion value increases, the equalization ability decreases.

  Based on the above concept, it is possible to easily perform non-linear equalization by the block configuration of the digital signal processing circuit constituting the non-linear equalization circuit shown in FIG. In order to create a specific intersymbol interference condition, first, a chromatic dispersion value CDa is added to broaden a pulse, a nonlinear phase rotation (nonlinear phase rotation amount: φNLa) is given, and a chromatic dispersion value −CDa is added in advance. Return the pulse spread to. Non-linear equalization is realized by providing a single stage and providing a plurality of stages of similar digital signal processing circuits. According to this method, it is not necessary to divide one relay section into a plurality of sections and reversely propagate all relay sections by SSFM (split step Fourier method) unlike the digital back propagation method. Although it is impossible to faithfully reproduce the non-linear transmission process and the equalization ability may be slightly inferior, the digital signal processing circuit may be greatly simplified.

  Here, the function of the digital signal processing integrated circuit 500 of the optical receiver is simulated by a computer, and the dependence of the nonlinear equalization circuit 504 on the number of equalization stages will be described with reference to FIGS.

  FIG. 7 is a block diagram showing a configuration simulating the function of the digital signal processing integrated circuit of the optical receiver according to the first embodiment of the present invention. FIG. 8 is a diagram showing the equalization stage number dependency of the nonlinear equalization circuit according to the first embodiment of the present invention.

  FIG. 7 shows a functional block configuration of the entire digital signal processing integrated circuit 500 used for off-line analysis. Rate conversion unit 501, preprocessing unit 502A, chromatic dispersion compensation unit 503A, nonlinear equalization unit 504A, timing extraction unit 505A, adaptive equalization unit 506A, carrier frequency offset compensation unit 507A, carrier phase offset A compensation unit 508A, an identification unit 509A, and a Q value calculation unit 510 are provided. Hereinafter, the operation of each unit will be described.

  The rate converter 501 converts the sampling rate of four digital signals input from outside (not shown) (data acquired by a digital sampling oscilloscope) to a speed synchronized with the bit rate of 43 Gb / s, and converts the four digital signals after the rate conversion. The digital signal was output to the preprocessing unit 502A.

  The pre-processing unit 502A performs pre-processing such as amplitude normalization for suppressing amplitude variations of the four digital signals and deskew for delay difference correction, and the four digital signals after processing are processed into the chromatic dispersion compensation unit 503A. Output to.

  The chromatic dispersion compensation unit 503A compensates chromatic dispersion generated in the transmission path for the four digital signals input from the preprocessing unit 502A, and outputs the four digital signals after chromatic dispersion compensation to the nonlinear equalization unit 504A. did.

  The nonlinear equalization unit 504A performs nonlinear equalization digital signal processing corresponding to the processing of the nonlinear equalization circuit 504 on the four digital signals (considered as two pairs of complex signals) input from the chromatic dispersion compensation unit 503A. The four digital signals after application of nonlinear equalization (considered as two pairs of complex signals) were output to the timing extraction unit 505A.

  The timing extraction unit 505A adaptively extracts identification timings from the four digital signals input from the nonlinear equalization unit 504A and adaptively equalizes four digital data having a sampling rate of twice the oversampling ratio. Output to 506A.

  The adaptive equalization unit 506A adaptively performs polarization multiplexing / demultiplexing on the four digital signals input from the timing extraction unit 505A by using an algorithm such as an envelope constant standard, and further, a transmission line The four digital signals compensated for PMD and the like are output to the carrier frequency offset compensation unit 507A.

  The carrier frequency offset compensation unit 507A compensates for the center frequency difference between the continuous optical signal output from the local oscillation light source 100 and the received optical signal in the four digital signals input from the adaptive equalization unit 506A. Four digital signals were output to the carrier phase offset compensation unit 508A.

  The carrier phase offset compensator 508A has a complex signal centered on the I axis and the Q axis for the X polarization component and the Y polarization component for the four digital signals input from the carrier frequency offset compensation unit 507A. In the plane, phase offset compensation is adaptively performed so that the signal points substantially converge to four points of 45 degrees, 135 degrees, -45 degrees, and -135 degrees, and the digital signal after the phase offset compensation is output to the identification unit 509A. did.

  The identification unit 509A performs binary identification on the four digital signals input from the carrier phase offset compensation unit 508A, and outputs the four binary signals after identification to the Q value calculation unit 510.

  The Q value calculation unit 510 calculates the code error rate of the four binary signals input from the identification unit 509A, and calculates a Q value that is an index of transmission performance in optical communication.

  FIG. 8 shows the result of plotting an example of the improvement amount of the Q value, which is an index indicating the transmission performance of optical communication, with respect to the number of equalization stages, that is, the number of stages N of the digital signal processing circuit. In the case where the modulation method is polarization multiplexed QPSK, the bit rate is 43 Gb / s, and 5000 km transmission is performed by the cyclic transmission test, the continuous optical signal and the received optical signal output from the local oscillation light source 100 in the optical receiver are After mixing, detection was performed by four balanced photon detectors 300A-D. Next, each signal of the X polarization I axis, the X polarization Q axis, the Y polarization I axis, and the Y polarization Q axis is analog-to-digital converted by the four analog-to-digital converters 400A-D, and the digital sampling oscilloscope is used. 4 serial data were accumulated at a sampling rate of 40 Gsample / s. The equalization ability was confirmed by off-line analysis on a computer. In the horizontal axis of FIG. 8, the number of stages N = 0 is a case where non-linear equalization is not performed, and the Q value improvement amount increases as the number of stages N is increased to 1, 2,.

  The chromatic dispersion amount to be added or removed in each case where the number of stages N is set to the same value for the X polarization and the Y polarization. The chromatic dispersion value added by the chromatic dispersion removal units 8A and 8B is -X with respect to the chromatic dispersion value X added by the chromatic dispersion addition units 1A and 1B.

  In the case of N = 1, the chromatic dispersion amount was set to −600 ps / nm. In the case of N = 2, the amount of chromatic dispersion in the first and second stages was set to −700 ps / nm and −500 ps / nm. In the case of N = 3, the chromatic dispersion amounts in the first, second, and third stages were −800 ps / nm, −600 ps / nm, and −400 ps / nm.

  In the case of N = 4, the chromatic dispersion amounts of the first, second, third, and fourth stages were −900 ps / nm, −700 ps / nm, −500 ps / nm, and −300 ps / nm. When N = 5, the chromatic dispersion amounts of the first, second, third, fourth, and fifth stages are −1000 ps / nm, −800 ps / nm, −600 ps / nm, −400 ps / nm, −200 ps / nm. When N = 6, the chromatic dispersion amounts of the first stage, the second stage, the third stage, the fourth stage, the fifth stage, and the sixth stage are −1100 ps / nm, −900 ps / nm, −700 ps / nm, − 500 ps / nm, −300 ps / nm, and −100 ps / nm. These setting methods are not optimal and are examples.

  The efficiency in each case was set as follows. Efficiency γxx [m] = γyy [m] = const / N and γxy [m] = γyx [0] = 0 (const: constant). These setting methods are not optimal and are examples.

  With the above settings, as shown in FIG. 8, when N = 5, a Q value improvement amount of 1.5 dB was obtained.

  1A, 1B Chromatic dispersion adder, 2A, 2B Power calculator, 3A, 3B, 3C, 3D Weighted average unit, 4A, 4B, 4C, 4D Efficiency multiplier, 5A, 5B Adder, 6A, 6B For complex phase rotation Signal generation unit, 7A, 7B complex phase rotation unit, 8A, 8B wavelength dispersion removal unit, 11, 12, 1m, 1N digital signal processing circuit, 100 local oscillation light source, 200 optical 90 degree hybrid circuit, 300A, 300B, 300C, 300D photon detector, 400A, 400B, 400C, 400D analog to digital converter, 500 digital signal processing integrated circuit, 502 preprocessing circuit, 503 chromatic dispersion compensation circuit, 504 nonlinear equalization circuit, 505 timing extraction circuit, 506 adaptive equalization Circuit, 507 carrier frequency offset compensation circuit, 508 carrier phase offset Compensation circuit, 509 identification circuit.

Claims (5)

A local oscillation light source that generates an optical signal that oscillates at the same center wavelength as the received optical signal;
A polarization diversity optical 90-degree hybrid circuit that mixes the received optical signal and the optical signal output from the local oscillation light source;
Four balanced photon detectors for detecting four pairs of optical signals output from the optical 90-degree hybrid circuit;
Four analog-to-digital converters for analog-to-digital conversion of the four electrical signals output from the four photon detectors;
An optical receiver comprising a digital signal processing integrated circuit connected to the four analog-digital converters,
The digital signal processing integrated circuit includes:
A chromatic dispersion compensation circuit for compensating chromatic dispersion of an optical transmission line for four digital signals;
A non-linear equalization circuit that applies non-linear equalization digital signal processing to four digital signals;
An adaptive equalization circuit that compensates the polarization mode dispersion of the transmission path and separates the polarization multiplexed signal for four digital signals;
A carrier frequency offset compensation circuit for compensating a center frequency difference between the received optical signal and the optical signal output from the local oscillation light source for four digital signals;
A carrier phase offset compensation circuit that compensates for an optical phase difference between the received optical signal and an optical signal output from the local oscillation light source with respect to four digital signals;
The nonlinear equalization circuit is:
It is composed of N stages (N ≧ 1) of digital signal processing circuits,
Among the N-stage digital signal processing circuits, the m-th stage digital signal processing circuit is:
A first linear distortion addition unit for adding linear distortion of a transfer function Hpre, x [m] (f) to an input first complex digital signal sequence dx [m, i];
A second linear distortion addition unit for adding linear distortion of the transfer function Hpre, y [m] (f) to the input second complex digital signal sequence dy [m, i];
A first power calculator that calculates power Px [m, i], which is the square of the absolute value of the first complex digital signal sequence to which linear distortion has been added;
A second power calculator that calculates power Py [m, i], which is the square of the absolute value of the second complex digital signal sequence to which linear distortion has been added;
Weighted average power Pavg, xx [m, i] = αxx [−a] Px [m, i−a] + αxx [−a + 1] Px [m, i−a + 1] +. A first weighted average unit that calculates + αxx [0] Px [m, i] +... + Αxx [b] Px [m, i + b];
Weighted average power Pavg, xy [m, i] = αxy [−a] Py [m, i−a] + αxy [−a + 1] Py [m, i−a + 1] +. A second weighted average unit for calculating + αxy [0] Py [m, i] +... + Αxy [b] Py [m, i + b];
Weighted average power Pavg, yx [m, i] = αyx [−a] Px [m, i−a] + αyx [−a + 1] Px [m, i−a + 1] +. A third weighted average unit for calculating + αyx [0] Px [m, i] +... + Αyx [b] Px [m, i + b];
Weighted average power of the power Py [m, i] Pavg, yy [m, i] = αyy [−a] Py [m, i−a] + αyy [−a + 1] Py [m, i−a + 1] + A fourth weighted average unit that calculates + αyy [0] Py [m, i] +... + Αyy [b] Py [m, i + b];
The weighted average power Pavg, xx [m, i] is multiplied by a first efficiency γxx to generate a phase rotation amount φxx [m, i] = γxx [m, i] Pavg, xx [m, i]. 1 phase rotation amount generation unit;
The weighted average power Pavg, xy [m, i] is multiplied by a second efficiency γxy to generate a phase rotation amount φxy [m, i] = γxy [m, i] Pavg, xy [m, i]. Two phase rotation amount generation units;
The weighted average power Pavg, yx [m, i] is multiplied by a third efficiency γyx to generate a phase rotation amount φyx [m, i] = γyx [m, i] Pavg, yx [m, i]. 3 phase rotation amount generator,
The weighted average power Pavg, yy [m, i] is multiplied by a fourth efficiency γyy to generate a phase rotation amount φyy [m, i] = γyy [m, i] Pavg, yy [m, i]. 4 phase rotation amount generation unit;
The phase rotation amount φxx [m, i] and φxy [m, i] are added to calculate the complex phase rotation amount φx [m, i] = φxx [m, i] + φxy [m, i] The addition part of
The phase rotation amount φyx [m, i] and φyy [m, i] are added to calculate a complex phase rotation amount φy [m, i] = φyx [m, i] + φyy [m, i] The addition part of
A first complex phase rotation signal generation unit that converts the complex phase rotation amount φx [m, i] into a complex signal exp (−jφx [m, i]);
A second complex phase rotation signal generation unit that converts the complex phase rotation amount φy [m, i] into a complex signal exp (−jφy [m, i]);
A first complex phase rotation unit that provides a complex phase rotation by multiplying the first complex digital signal sequence to which linear distortion has been added by the complex signal exp (−jφx [m, i]);
A second complex phase rotation unit that provides a complex phase rotation by multiplying the second complex digital signal sequence to which linear distortion has been added by the complex signal exp (−jφy [m, i]);
The inverse function Hpre, x [m] ^{−1 of the} linear waveform distortion transfer function Hpre, x [m] (f) with respect to the complex digital signal given the complex phase rotation by the first complex phase rotation unit. (F) or a waveform distortion in the first linear distortion adding unit by adding a waveform distortion having a complex conjugate function Hpre, x [m] ^* (f) as a transfer function Hpost, x [m] (f) A first linear distortion removing unit for removing
The inverse function Hpre, y [m] ^{−1 of the} linear waveform distortion transfer function Hpre, y [m] (f) with respect to the complex digital signal given the complex phase rotation by the second complex phase rotation unit. (F) or a waveform distortion in the second linear distortion adding unit by adding a waveform distortion having a complex conjugate function Hpre, y [m] ^* (f) as a transfer function Hpost, y [m] (f) A second linear distortion removing unit for removing
Optical receiver. The nonlinear equalization circuit is:
It is composed of N stages (N ≧ 2) of digital signal processing circuits,
Among the N stages of digital signal processing circuits, the m (m <N) stage digital signal processing circuit is:
Two linear filters (z∈ {x, y}) represented by the transfer functions Hpost, z [m] (f) and Hpre, z [m + 1] (f) are converted into a single linear filter Hjoint, z [m : M + 1] (f). The optical receiver according to claim 1. A non-linear equalization circuit composed of N stages (N ≧ 1) of digital signal processing circuits,
Among the N-stage digital signal processing circuits, the m-th stage digital signal processing circuit is:
A first linear distortion addition unit for adding linear distortion of a transfer function Hpre, x [m] (f) to an input first complex digital signal sequence dx [m, i];
A second linear distortion addition unit for adding linear distortion of the transfer function Hpre, y [m] (f) to the input second complex digital signal sequence dy [m, i];
A first power calculator that calculates power Px [m, i], which is the square of the absolute value of the first complex digital signal sequence to which linear distortion has been added;
A second power calculator that calculates power Py [m, i], which is the square of the absolute value of the second complex digital signal sequence to which linear distortion has been added;
Weighted average power Pavg, xx [m, i] = αxx [−a] Px [m, i−a] + αxx [−a + 1] Px [m, i−a + 1] +. A first weighted average unit that calculates + αxx [0] Px [m, i] +... + Αxx [b] Px [m, i + b];
Weighted average power Pavg, xy [m, i] = αxy [−a] Py [m, i−a] + αxy [−a + 1] Py [m, i−a + 1] +. A second weighted average unit for calculating + αxy [0] Py [m, i] +... + Αxy [b] Py [m, i + b];
Weighted average power Pavg, yx [m, i] = αyx [−a] Px [m, i−a] + αyx [−a + 1] Px [m, i−a + 1] +. A third weighted average unit for calculating + αyx [0] Px [m, i] +... + Αyx [b] Px [m, i + b];
Weighted average power of the power Py [m, i] Pavg, yy [m, i] = αyy [−a] Py [m, i−a] + αyy [−a + 1] Py [m, i−a + 1] + A fourth weighted average unit that calculates + αyy [0] Py [m, i] +... + Αyy [b] Py [m, i + b];
The weighted average power Pavg, xx [m, i] is multiplied by a first efficiency γxx to generate a phase rotation amount φxx [m, i] = γxx [m, i] Pavg, xx [m, i]. 1 phase rotation amount generation unit;
The weighted average power Pavg, xy [m, i] is multiplied by a second efficiency γxy to generate a phase rotation amount φxy [m, i] = γxy [m, i] Pavg, xy [m, i]. Two phase rotation amount generation units;
The weighted average power Pavg, yx [m, i] is multiplied by a third efficiency γyx to generate a phase rotation amount φyx [m, i] = γyx [m, i] Pavg, yx [m, i]. 3 phase rotation amount generator,
The weighted average power Pavg, yy [m, i] is multiplied by a fourth efficiency γyy to generate a phase rotation amount φyy [m, i] = γyy [m, i] Pavg, yy [m, i]. 4 phase rotation amount generation unit;
The phase rotation amount φxx [m, i] and φxy [m, i] are added to calculate the complex phase rotation amount φx [m, i] = φxx [m, i] + φxy [m, i] The addition part of
The phase rotation amount φyx [m, i] and φyy [m, i] are added to calculate a complex phase rotation amount φy [m, i] = φyx [m, i] + φyy [m, i] The addition part of
A first complex phase rotation signal generation unit that converts the complex phase rotation amount φx [m, i] into a complex signal exp (−jφx [m, i]);
A second complex phase rotation signal generation unit that converts the complex phase rotation amount φy [m, i] into a complex signal exp (−jφy [m, i]);
A first complex phase rotation unit that provides a complex phase rotation by multiplying the first complex digital signal sequence to which linear distortion has been added by the complex signal exp (−jφx [m, i]);
A second complex phase rotation unit that provides a complex phase rotation by multiplying the second complex digital signal sequence to which linear distortion has been added by the complex signal exp (−jφy [m, i]);
The inverse function Hpre, x [m] ^{−1 of the} linear waveform distortion transfer function Hpre, x [m] (f) with respect to the complex digital signal given the complex phase rotation by the first complex phase rotation unit. (F) or a waveform distortion in the first linear distortion adding unit by adding a waveform distortion having a complex conjugate function Hpre, x [m] ^* (f) as a transfer function Hpost, x [m] (f) A first linear distortion removing unit for removing
The inverse function Hpre, y [m] ^{−1 of the} linear waveform distortion transfer function Hpre, y [m] (f) with respect to the complex digital signal given the complex phase rotation by the second complex phase rotation unit. (F) or a waveform distortion in the second linear distortion adding unit by adding a waveform distortion having a complex conjugate function Hpre, y [m] ^* (f) as a transfer function Hpost, y [m] (f) A second linear distortion removing unit for removing
Nonlinear equalization circuit. A non-linear equalization circuit composed of N stages (N ≧ 2) of digital signal processing circuits,
Among the N stages of digital signal processing circuits, the m (m <N) stage digital signal processing circuit is:
Two linear filters (zε {x, y}) represented by the transfer functions Hpost, z [m] (f) and Hpre, z [m + 1] (f) are converted into a single linear filter Hjoint, z [m : M + 1] (f). The nonlinear equalizer circuit according to claim 3. A first linear distortion addition unit for adding linear distortion of a transfer function Hpre, x [m] (f) to an input first complex digital signal sequence dx [m, i];
A second linear distortion addition unit for adding linear distortion of the transfer function Hpre, y [m] (f) to the input second complex digital signal sequence dy [m, i];
A first power calculator that calculates power Px [m, i], which is the square of the absolute value of the first complex digital signal sequence to which linear distortion has been added;
A second power calculator that calculates power Py [m, i], which is the square of the absolute value of the second complex digital signal sequence to which linear distortion has been added;
Weighted average power Pavg, xx [m, i] = αxx [−a] Px [m, i−a] + αxx [−a + 1] Px [m, i−a + 1] +. A first weighted average unit that calculates + αxx [0] Px [m, i] +... + Αxx [b] Px [m, i + b];
Weighted average power Pavg, xy [m, i] = αxy [−a] Py [m, i−a] + αxy [−a + 1] Py [m, i−a + 1] +. A second weighted average unit for calculating + αxy [0] Py [m, i] +... + Αxy [b] Py [m, i + b];
Weighted average power Pavg, yx [m, i] = αyx [−a] Px [m, i−a] + αyx [−a + 1] Px [m, i−a + 1] +. A third weighted average unit for calculating + αyx [0] Px [m, i] +... + Αyx [b] Px [m, i + b];
Weighted average power of the power Py [m, i] Pavg, yy [m, i] = αyy [−a] Py [m, i−a] + αyy [−a + 1] Py [m, i−a + 1] + A fourth weighted average unit that calculates + αyy [0] Py [m, i] +... + Αyy [b] Py [m, i + b];
The weighted average power Pavg, xx [m, i] is multiplied by a first efficiency γxx to generate a phase rotation amount φxx [m, i] = γxx [m, i] Pavg, xx [m, i]. 1 phase rotation amount generation unit;
The weighted average power Pavg, xy [m, i] is multiplied by a second efficiency γxy to generate a phase rotation amount φxy [m, i] = γxy [m, i] Pavg, xy [m, i]. Two phase rotation amount generation units;
The weighted average power Pavg, yx [m, i] is multiplied by a third efficiency γyx to generate a phase rotation amount φyx [m, i] = γyx [m, i] Pavg, yx [m, i]. 3 phase rotation amount generator,
The weighted average power Pavg, yy [m, i] is multiplied by a fourth efficiency γyy to generate a phase rotation amount φyy [m, i] = γyy [m, i] Pavg, yy [m, i]. 4 phase rotation amount generation unit;
The phase rotation amount φxx [m, i] and φxy [m, i] are added to calculate the complex phase rotation amount φx [m, i] = φxx [m, i] + φxy [m, i] The addition part of
The phase rotation amount φyx [m, i] and φyy [m, i] are added to calculate a complex phase rotation amount φy [m, i] = φyx [m, i] + φyy [m, i] The addition part of
A first complex phase rotation signal generation unit that converts the complex phase rotation amount φx [m, i] into a complex signal exp (−jφx [m, i]);
A second complex phase rotation signal generation unit that converts the complex phase rotation amount φy [m, i] into a complex signal exp (−jφy [m, i]);
A first complex phase rotation unit that provides a complex phase rotation by multiplying the first complex digital signal sequence to which linear distortion has been added by the complex signal exp (−jφx [m, i]);
A second complex phase rotation unit that provides a complex phase rotation by multiplying the second complex digital signal sequence to which linear distortion has been added by the complex signal exp (−jφy [m, i]);
The inverse function Hpre, x [m] ^{−1 of the} linear waveform distortion transfer function Hpre, x [m] (f) with respect to the complex digital signal given the complex phase rotation by the first complex phase rotation unit. (F) or a waveform distortion in the first linear distortion adding unit by adding a waveform distortion having a complex conjugate function Hpre, x [m] ^* (f) as a transfer function Hpost, x [m] (f) A first linear distortion removing unit for removing
The inverse function Hpre, y [m] ^{−1 of the} linear waveform distortion transfer function Hpre, y [m] (f) with respect to the complex digital signal given the complex phase rotation by the second complex phase rotation unit. (F) or a waveform distortion in the second linear distortion adding unit by adding a waveform distortion having a complex conjugate function Hpre, y [m] ^* (f) as a transfer function Hpost, y [m] (f) A digital signal processing circuit comprising: a second linear distortion removing unit that removes.

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