JPWO2011162236A1 - Substrate, substrate manufacturing method, and light emitting device - Google Patents

Abstract

Provided are a substrate capable of forming a light-emitting element that is less expensive than a light-emitting element formed of a sapphire substrate, a method for manufacturing the substrate, and a light-emitting element using the substrate. The board | substrate (10) of this invention is a board | substrate (10) for light emitting elements (30) which consists of spinel. It is preferable that the composition of the sintered body of spinel constituting the substrate (10) is MgO.nAl2O3 (1.05 ≦ n ≦ 1.30) and the content of Si element is 20 ppm or less.

Description

  The present invention relates to a substrate, a method for manufacturing the substrate, and a light emitting element, and more specifically to a substrate for a light emitting element, a method for manufacturing the same, and a light emitting element using the substrate.

  A light emitting element such as a light emitting diode (LED) usually has a configuration in which a stacked structure of semiconductor layers including a light emitting region is formed on one main surface of a substrate by, for example, epitaxial growth. For example, a substrate made of sapphire may be used as the substrate.

  A light-emitting element using a sapphire substrate is superior in characteristics such as luminance, contrast, and conductivity of emitted light as compared to a light-emitting element using a substrate made of silicon carbide, for example. For this reason, a light emitting element using a sapphire substrate is generally widely known. A light emitting element using a sapphire substrate is disclosed in, for example, Japanese Patent Application Laid-Open No. 2005-79171 (Patent Document 1).

Japanese Patent Laid-Open No. 2005-79171

  However, sapphire is expensive as an industrial product. For this reason, the light emitting element which consists of a sapphire substrate has the problem that cost becomes high. As light emitting elements become widespread, it is considered indispensable to reduce the cost of light emitting elements in order to make the light emitting elements applicable to a wider range of uses.

  The present invention has been made in view of the above problems. The object is to provide a substrate capable of forming a light-emitting element that is less expensive than a light-emitting element made of a sapphire substrate, and a method for manufacturing the same. Another object is to provide a light emitting element using the substrate.

  The board | substrate which concerns on this invention is a board | substrate for light emitting elements which consists of a spinel. As a result of diligent research, the inventors of the present invention may be able to use spinel, which is mainly used in the field of optical elements, instead of sapphire, as a substrate used for light-emitting elements such as the above-described light-emitting diodes. I found out. Physical property values such as the strength of spinel are close to physical property values such as the strength of sapphire. It has been found that a substrate for a light-emitting element formed using spinel can withstand practical use as well as a substrate for a light-emitting element made of sapphire. For example, a light-emitting element substrate made of spinel is not equivalent to a light-emitting element substrate made of sapphire, but exhibits a level of strength (Young's modulus) that is practically acceptable. In addition, the spinel has a thermal conductivity level that causes no problem in practice because it dissipates heat generated by the light emitting region in the light emitting element.

  Conventionally, however, it is common knowledge to use a single crystal such as sapphire as a substrate for a light-emitting element, and it has not been considered among those skilled in the art that a spinel of a polycrystalline body is a candidate for a substrate material. It was. As a result of conducting research without being bound by the common sense of those skilled in the art, the inventor has found that spinel can be used as a substrate for a light emitting element. If a substrate for a light emitting element is formed using spinel instead of sapphire, the production cost of the substrate can be reduced.

The spinel substrate is a composite oxide having a spinel crystal structure with a composition of MgO.nAl ₂ O ₃ (1.05 ≦ n ≦ 1.30), and the content of Si element is 20 ppm or less. A certain sintered body is preferable. The sintered body preferably has a linear transmittance of 80% or more with a light beam having a thickness of 1 mm and a wavelength of 350 nm to 450 nm. In this way, it is possible to obtain a good light transmittance of the substrate made of the spinel that is a polycrystalline body.

  The spinel substrate has a main surface, and when a plurality of square regions of 5 mm in length and 5 mm in width are set for the main surface, the outer surface of the main surface is within a range of 3 mm from the plurality of regions. PLTV (Percent LTV) indicating the ratio of the evaluation target areas where the LTV (Local Thickness Variation) is 1.0 μm or less is 90% or more for a plurality of evaluation target areas excluding the entering area. preferable. If the PLTV is at least 90%, even a spinel substrate that is a polycrystalline body can directly bond a semiconductor layer constituting a light emitting element to the main surface of the substrate without using an adhesive material. Therefore, by using this substrate, a light-emitting element with excellent characteristics can be obtained.

The substrate manufacturing method according to the present invention is for a light-emitting element made of spinel having a composition of MgO.nAl ₂ O ₃ (1.05 ≦ n ≦ 1.30) and a Si element content of 20 ppm or less. This is a method for manufacturing the substrate. A step of forming a compact from a spinel powder having a Si element content of 50 ppm or less and a purity of 99.5% by mass or more, and sintering the compact at 1500 ° C. or more and 1800 ° C. or less in a vacuum. , A first sintering step for forming a sintered body having a density of 95% or higher, and a second sintering step for pressure-sintering the sintered body at 1600 ° C. or higher and 1900 ° C. or lower.

By the above method, a substrate as a spinel sintered body having a composition of MgO.nAl ₂ O ₃ (1.05 ≦ n ≦ 1.30) and a Si element content of 20 ppm can be formed. . The said board | substrate is equipped with intensity | strength and light transmittance required as a board | substrate for light emitting elements. For this reason, even if it uses the said board | substrate instead of a sapphire board | substrate, it can provide the light emitting element which does not have a problem practically as above-mentioned.

The first sintering step is performed at a pressure of 50 Pa or less, and the shortest thickness from the center of the sintered body to the outside of the sintered body is D (mm), and the temperature reaches from 1000 ° C. to the maximum temperature. When the heating time of t is t minutes,
D = a × t ^1/2
0.1 ≦ a ≦ 3
It is preferable to have the following relationship.

  If the temperature of the first sintering step is raised under the above conditions, the content of Si element can be reduced to 20 ppm or less after the sintering step is finished, and as a result, a high light transmittance spinel. A sintered body can be obtained. Therefore, a high light transmittance can be obtained in a spinel substrate used for a light-emitting element.

  The method for manufacturing the substrate further includes a step of slicing the sintered body and a step of polishing the surface of the substrate obtained by the slicing step using a chemical mechanical polishing method after the second sintering step. You may have. In the polishing step, the substrate may be polished in a state where the substrate is sandwiched between the polishing pad disposed on the surface plate and the polishing head disposed to face the polishing pad. Furthermore, it is preferable that a soft layer having a lower hardness than the polishing head is disposed between the polishing head and the substrate. In this case, the flatness of the substrate can be improved. As a result, a substrate capable of bonding a semiconductor layer to the main surface can be obtained.

  A light-emitting element according to the present invention includes the above-described spinel substrate and a semiconductor layer that is disposed on one main surface of the substrate and includes a light-emitting layer. As described above, when a spinel substrate is used, a light-emitting element having a function equivalent to that of a light-emitting element using a sapphire substrate can be provided at a lower cost. The substrate and the semiconductor layer may be bonded. As a bonding method, the substrate and the semiconductor layer may be bonded using a transparent adhesive material, or the substrate and the semiconductor layer may be bonded directly using a surface activation method or the like. In this manner, a light-emitting element having excellent characteristics can be obtained by bonding a semiconductor layer having favorable crystallinity to a substrate.

  ADVANTAGE OF THE INVENTION According to this invention, the light emitting element which has a function equivalent to the light emitting element using the board | substrates made from sapphire can be provided more cheaply. Further, the transmission characteristics of the substrate can be ensured.

It is a general-view figure which shows the aspect of the board | substrate which concerns on this Embodiment. It is a schematic sectional drawing which shows the aspect of LED using the board | substrate of FIG. It is a flowchart for demonstrating the manufacturing method of the board | substrate which concerns on this Embodiment. It is a flowchart for demonstrating the process included in the process (S30) in FIG. It is a flowchart for demonstrating the process process in the manufacturing method of Embodiment 2 of the board | substrate by this invention. It is a schematic diagram for demonstrating the CMP process shown in FIG. It is a schematic sectional drawing which shows Embodiment 3 of the light emitting element by this invention. 8 is a flowchart for explaining a method of manufacturing the light emitting device shown in FIG. It is a schematic diagram for demonstrating the bonding process shown in FIG. It is a schematic diagram for demonstrating the bonding process shown in FIG. It is a schematic sectional drawing which shows Embodiment 4 of the light emitting element by this invention. It is a schematic diagram for demonstrating the bonding process shown in FIG. It is a schematic diagram for demonstrating the bonding process shown in FIG. Sample No. It is the schematic diagram which showed the state of the unevenness | corrugation in the main surface of 1 board | substrate in three dimensions. Sample No. It is a schematic diagram for demonstrating PLTV in the main surface of 1 board | substrate. Sample No. It is a photograph which shows the external appearance of the joining board | substrate using 1 board | substrate. Sample No. It is the schematic diagram which showed the uneven | corrugated state in the main surface of 2 board | substrates in three dimensions. Sample No. It is a schematic diagram for demonstrating PLTV in the main surface of 2 board | substrates. Sample No. It is a photograph which shows the external appearance of the joining board | substrate using 2 board | substrates. Sample No. It is the schematic diagram which showed the uneven | corrugated state in the main surface of 3 board | substrates in three dimensions. Sample No. It is a schematic diagram for demonstrating PLTV in the main surface of 3 board | substrates. Sample No. 3 is a photograph showing an appearance of a bonded substrate using the substrate 3. Sample No. It is the schematic diagram which showed the uneven | corrugated state in the main surface of the board | substrate of 4 in three dimensions. Sample No. It is a schematic diagram for demonstrating PLTV in the main surface of 4 board | substrates. Sample No. 4 is a photograph showing an appearance of a bonded substrate using the substrate No. 4;

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following drawings, the same or corresponding parts are denoted by the same reference numerals, and description thereof will not be repeated.

(Embodiment 1)
As shown in FIG. 1, the substrate 10 of the present embodiment is a wafer made of spinel, for example, having a main surface 10a having a diameter of 4 inches. An example of the composition of the spinel constituting the substrate 10 is MgO.nAl ₂ O ₃ .

  The substrate 10 is used for a light emitting element 30 such as an LED having the configuration shown in FIG. 2 includes, for example, a buffer layer 1, an n-type GaN (gallium nitride) layer 2, an n-type AlGaN (aluminum gallium nitride) layer 3, a multiple quantum well 4, and a p-type AlGaN on a main surface 10a of a substrate 10. In this configuration, the semiconductor layer including the layer 5 and the p-type GaN layer 6 is stacked in this order.

  The buffer layer 1 is arranged to suppress the lattice mismatch between the lattice constant of the spinel constituting the substrate 10 and the compound semiconductor lattice constant constituting the compound semiconductor thin film such as the n-type GaN layer 2. The thin film is preferably composed of, for example, InGaN (indium nitride / gallium compound).

The multiple quantum well 4 is a light emitting region (light emitting layer) of the LED. For example, a plurality of ultrathin layers of In _0.2 Ga _0.8 N and ultra thin films of Al _0.2 Ga _0.8 N are alternately arranged. A laminated structure is preferred.

  The buffer layer 1 and the semiconductor layer composed of the n-type GaN layer 2, the n-type AlGaN layer 3, the multiple quantum well 4, the p-type AlGaN layer 5, and the p-type GaN layer 6 are preferably formed in this order, for example, by epitaxial growth. .

  And after all the laminated structures of the semiconductor layers are formed, a part thereof, specifically, a part of the n-type GaN layer 2, and an n-type AlGaN layer 3, a multiple quantum well 4, a p-type AlGaN layer 5, The p-type GaN layer 6 is removed by etching. In this way, a part of the main surface of the n-type GaN layer 2 and the main surface of the p-type GaN layer 6 are exposed.

  Thereafter, the n-type electrode 7 and the p-type electrode 8 are formed on the partially exposed main surfaces of the n-type GaN layer 2 and the p-type GaN layer 6 using a metal material that makes ohmic contact with the main surfaces. .

  The light emitting element 30 shown in FIG. 2 is formed by the above procedure. When the light emitting element 30 conducts between the n-type electrode 7 and the p-type electrode 8, recombination of holes and electrons occurs in the multiple quantum well 4, which is a light emitting layer, and a light emission phenomenon occurs.

  The light can be emitted (transmitted) from the back side of the substrate 10 (the main surface below the substrate 10 in FIG. 2). This is because the spinel constituting the substrate 10 can transmit the light emitted from the light emitting element 30.

  When light passes through the substrate 10, the light emitting element 30 including the substrate 10 generates heat. For this reason, considerable stress is applied to the substrate 10 and other semiconductor layers. That is, when the light emitting element 30 operates, the substrate 10 generates heat, and the heat is transmitted to the substrate 10. That is, at this time, thermal stress is generated in the substrate 10. For this reason, the substrate 10 preferably has a corresponding strength.

  In general, a structure has high strength when the Young's modulus is high, and low strength when the Young's modulus is low. Therefore, the substrate 10 preferably has a Young's modulus of 150 GPa or more and 350 GPa or less in order to have strength that can withstand use under the above-described conditions. When the Young's modulus of the substrate 10 is 150 GPa or more, the substrate 10 has a strength that can withstand use under the above conditions. In general, the structure has a high hardness when the Young's modulus is high, and the hardness is low when the Young's modulus is low. For this reason, for example, when the Young's modulus of the substrate 10 exceeds 350 GPa, the hardness of the substrate 10 becomes excessively high, so that the possibility of causing chipping increases. Further, since the hardness of the substrate 10 becomes excessively high, processing becomes difficult. Therefore, the Young's modulus of the substrate 10 is preferably within the above range from the viewpoint of having appropriate strength and suppressing problems such as chipping, and the most preferable range is 180 GPa or more and 300 GPa or less. It can be said.

  Although the intensity | strength of the board | substrate 10 of the said light emitting element 30 is not equivalent to the board | substrate for LED which consists of sapphire, even if it uses instead of sapphire as a board | substrate for the light emitting element 30, it is a intensity | strength of a level which is practically satisfactory. Therefore, even if the spinel substrate 10 is used for the light emitting element 30 instead of the sapphire substrate, a function equivalent to that of the LED substrate made of the sapphire substrate can be secured. Therefore, by using the spinel substrate 10, the light emitting element 30 such as an LED can be formed at a lower cost than when a sapphire substrate is used.

Next, the spinel sintered body constituting the substrate 10 has a composition of MgO.nAl ₂ O ₃ (1.05 ≦ n ≦ 1.30) and a Si element content of 20 ppm or less. . This spinel sintered body has a linear transmittance of visible light having a wavelength of 350 nm or more and 450 nm or less at a thickness of 1 mm, preferably 80% or more, more preferably 82% or more, and particularly preferably 84% or more. Yes, the linear transmittance is sufficiently high. In addition, high light transmittance can be stably obtained, and variation is small. Further, even with a thick material, a stable and high transmittance for visible light can be obtained.

The spinel sintered body is a composite oxide having a spinel crystal structure with a composition of MgO.nAl ₂ O ₃ (1.05 ≦ n ≦ 1.30), and includes MgO and Al ₂ O ₃ as components. Since the spinel sintered body has a cubic crystal form, light scattering at the crystal grain boundary hardly occurs, and good light transmission is obtained when sintered at high density. By setting 1.05 ≦ n ≦ 1.30, it is possible to reduce the component amount of MgO, to reduce the variation and distortion of the microscopic crystal lattice, and to improve translucency. From this viewpoint, 1.06 ≦ n ≦ 1.125 is preferable.

  In general, as a factor for reducing the light transmittance of the spinel sintered body, metal impurities are mixed. Examples of the metal impurities include Si, Ti, Na, K, Ca, Fe, and C. These metal impurities are derived from the raw material powder and mixed in the sintered body. Among these metal impurities, when the content of the Si element is 20 ppm or less, high light transmittance can be stably obtained. From this viewpoint, the content of Si element is more preferably 10 ppm or less, and particularly preferably 5 ppm or less. By controlling the content of the Si element in this way, uniform light transmission can be obtained even in a spinel sintered body having a thickness of 10 mm or more. The Si element reacts with the spinel powder during sintering to generate a liquid phase. This liquid phase has the effect of accelerating the sinterability of the spinel powder, but if this liquid phase remains at the grain boundary, it becomes a different phase and reduces the light transmittance.

Due to the inclusion of impurities including metal impurities other than Si element, such as Na, K, Ca or Fe, the light transmittance, variation and manufacturing stability of the spinel sintered body are adversely affected. For this reason, the purity of MgO.nAl ₂ O ₃ in the spinel powder is 99.5% by mass or more, preferably 99.9% by mass or more, and more preferably 99.99% by mass or more.

Next, the manufacturing method of the board | substrate 10 of this invention is demonstrated.
With reference to FIG. 3, the manufacturing method of the board | substrate 10 which is a spinel sintered compact of this invention is a high purity spinel powder preparation process (S10), a formation process (S20), a sintering process (S30), and a process process ( S40).

In the high purity spinel powder process (S10), for example, the Si element content is 50 ppm or less, the average particle size is 0.1 μm or more and 0.3 μm or less, the purity is 99.5 mass% or more, and the composition is MgO · nAl. _A spinel powder that is ₂ O ₃ (1.05 ≦ n ≦ 1.30) is prepared.

  Here, the particle size of the powder particles is obtained by integrating the volume of the powder from the small particle size side toward the large particle size side when measured using a particle size distribution measurement method by a laser diffraction / scattering method. It means the value of the diameter of the powder cross section at the location where the cumulative volume is 50%. Specifically, the particle size distribution measuring method described above is a method of measuring the diameter of the powder particles by analyzing the scattering intensity distribution of the scattered light of the laser light irradiated onto the powder particles. The average value of the particle diameters of the plurality of powder particles contained in the prepared spinel powder is the average particle diameter described above.

In the molding step (S20), a molded body is formed from the spinel powder prepared in step (S10). Specifically, this is formed by press molding or CIP (Cold Isostatic Pressing). More specifically, for example, it is preferable that the powder of MgO · nAl ₂ O ₃ prepared in step (S10) is first preformed by press molding and then CIP is performed to obtain a compact. However, only one of press molding and CIP may be performed here, or both CIP may be performed after press molding, for example.

  Here, in press molding, for example, a pressure of 10 MPa to 300 MPa, particularly 20 MPa is preferably used, and in CIP, for example, a pressure of 160 MPa to 250 MPa, particularly 180 MPa to 230 MPa is preferably used.

  Next, the sintering step (S30) shown in FIG. 3 is performed. Specifically, it is preferable that the sintering step (S30) has two steps of a first sintering step (S31) and a second sintering step (S32) with reference to FIG.

  In the first sintering step (S31), the compact is sintered at 1500 ° C. or higher and 1800 ° C. or lower in vacuum to form a sintered body having a density of 95% or higher. By sintering in a vacuum atmosphere, the liquid phase generated from the Si element as an impurity can be evaporated and removed in vacuum. From this viewpoint, the degree of vacuum is preferably 50 Pa or less, and more preferably 20 Pa or less.

The conditions of the first sintering step vary depending on the amount of Si element and the thickness of the sintered body, but the shortest thickness from the center of the sintered body to the outside of the sintered body is D (mm), When the temperature rise time from 1000 ° C. to the maximum temperature is t minutes,
D = a × t ^1/2
0.1 ≦ a ≦ 3
It is preferable to have the following relationship.

  When the Si element content in the spinel powder is 50 ppm or less by raising the temperature within such a range, the Si element content is reduced to 20 ppm or less after the end of the first sintering step. Therefore, a spinel sintered body having a high light transmittance can be obtained. In view of further reducing the Si element content in the sintered body and increasing the light transmittance of the spinel sintered body, the Si element content in the spinel powder is preferably 30 ppm or less. When the Si element content in the spinel powder is 50 ppm or more, the Si element content in the sintered body is reduced by further increasing the temperature raising time in the vacuum atmosphere in the first sintering step. It is possible to do.

Further, the temperature in the first sintering step is preferably 1500 ° C. or higher in terms of obtaining a high-density sintered body having a density of 95% or higher. The density of the sintered body is more preferably 95% or more in terms of increasing the light transmittance of the sintered body. In the present specification, the density refers to a relative density calculated by the Archimedes method. On the other hand, the sintering temperature is preferably 1800 ° C. or lower in terms of suppressing evaporation of MgO in vacuum, preventing precipitation of Al ₂ O ₃ as the second phase during cooling, and maintaining high light transmittance. 1700 degrees C or less is more preferable, and 1650 degrees C or less is further more preferable.

After completion of the first sintering step, the sintered body is subjected to pressure firing at 1600 ° C. or higher and 1900 ° C. or lower by HIP (Hot Isostatic Pressing) or the like in the second sintering step (S32). Conclude. When HIP is performed at a temperature of 1600 ° C. or more and 1900 ° C. or less and a pressure of about 100 MPa, removal of vacancies is promoted by composition deformation and a diffusion mechanism, so that the density can be further increased and the light transmittance is further improved. The gas used for the HIP is preferably an inert gas such as Ar gas or N ₂ gas, O ₂ gas, or a mixed gas thereof. If O ₂ gas is mixed, a decrease in translucency due to deoxygenation can be prevented. it can.

  As shown in FIG. 3, a processing step (S40) is performed on the sintered body sintered as described above. Specifically, first, the sintered body is cut (cut) by MWS (Multi Wire Saw) or the like so as to have a desired thickness (of the substrate 10) (step of slicing the sintered body). Thereby, the foundation | substrate of the board | substrate 10 which has desired thickness is completed. Here, the desired thickness is preferably determined in consideration of the thickness of the substrate 10 to be finally formed, the polishing margin of the main surface 10a of the substrate 10 in a later step, and the like.

  Next, the underlying main surface of the substrate 10 is polished. Specifically, this is a step of polishing the main surface 10a of the substrate 10 finally formed as described above so that the average roughness Ra becomes a desired value. In particular, as described above, the substrate 10 as the substrate for the light emitting element is preferably polished so that the main surface 10a has the desired Ra described above.

  When the main surface 10a of the substrate 10 is polished to achieve excellent flatness, it is preferable to sequentially perform three stages of polishing, rough polishing, normal polishing, and polishing using diamond abrasive grains. Specifically, in the rough polishing that is the first stage and the normal polishing that is the second stage, the main surface 10a is mirror-finished using a polishing machine. Here, the count of abrasive grains used for polishing differs between rough polishing and normal polishing. Specifically, it is preferable to use a GC grindstone whose abrasive grain number is # 800 to # 2000 for rough polishing, and a diamond grindstone whose grain size is 3 to 5 μm for normal polishing.

  Next, the polishing as the finishing process, which is the third stage, is preferably performed using diamond abrasive grains as described above. Diamond abrasive grains are very high in hardness, and the average grain diameter of the abrasive grains is as small as about 0.5 μm to 1.0 μm, so that they are suitable for use as abrasive grains for high-precision mirror finishing. For example, polishing is performed for 10 minutes using the abrasive grains. In this way, it is possible to realize the main surface 10a having high flatness in which the average roughness Ra of the main surface 10a described above is 0.01 nm or more and 3.0 nm or less.

(Embodiment 2)
With reference to FIG. 5, the manufacturing method of Embodiment 2 of the board | substrate 10 by this invention is demonstrated. The manufacturing method of the substrate 10 is basically the same as the high-purity spinel powder preparation step (S10) to the processing step (S40) shown in FIG. 3, but the content of the polishing step in the processing step (S40) is one. The department is different. Specifically, a polishing process as shown in FIG. 5 is performed on the base of the substrate 10 obtained by cutting the sintered body. Here, four stages of polishing are performed. Specifically, it is preferable to sequentially perform the rough polishing step (s41), the intermediate finish polishing step (S42), the finish polishing step (S43), and the CMP step (S44).

  Referring to FIG. 5, in the rough polishing step (S41) which is the first stage, the main surface (front surface and back surface) of the substrate is polished using a polishing machine (for example, a double-side polishing apparatus). As the abrasive, a GC grindstone whose count is, for example, # 800 to # 2000 is used. The polishing amount is, for example, not less than 50 μm and not more than 200 μm.

  Next, an intermediate finish polishing step (S42) is performed. In the step (S42), the main surface (front surface and back surface) of the substrate is polished using, for example, a single-side polishing apparatus. As an abrasive | polishing agent, the diamond abrasive grain whose particle size of an abrasive grain is 3 micrometers or more and 5 micrometers or less can be used, for example. The polishing amount can be, for example, 10 μm or more and 30 μm or less.

  Next, a finish polishing step (S43) is performed. In this step (S43), the main surface (front surface and back surface) of the substrate is polished using, for example, a single-side polishing apparatus. As an abrasive | polishing agent, the diamond abrasive grain whose particle size of an abrasive grain is 0.5 micrometer or more and 1 micrometer or less can be used, for example. The polishing amount can be, for example, 3 μm or more and 10 μm or less. Here, the diamond abrasive grains are very high in hardness, and the average grain diameter of the abrasive grains is very small as described above, so that they are suitable for use as high-precision mirror-finishing abrasive grains.

  Next, a CMP step (S44) is performed. In this step (S44), for example, one of the main surfaces of the substrate is polished using a CMP apparatus. As a slurry used for polishing, a slurry having a mechanical polishing action stronger than a normal slurry for sapphire (a chemical polishing action is suppressed) is used. The polishing time can be, for example, 10 minutes to 45 minutes, more preferably 15 minutes to 40 minutes.

  In the above-described CMP step (S44), a CMP apparatus 40 as shown in FIG. 6 is used. Referring to FIG. 6, the CMP apparatus includes a surface plate 42 having a circular planar shape, a polishing pad 43 disposed on the surface plate 42, and a polishing head 45 disposed to face the polishing pad 43. The substrate 10 is polished in a state where the substrate 10 is sandwiched between them. A soft layer 44 having a lower hardness than the polishing head 45 is disposed between the polishing head 45 and the substrate 10. The substrate 10 is pressed against the polishing pad 43 by the polishing head 45 through the soft layer 44. The surface plate 42 is supported by a column 41 connected to the central portion thereof. Further, the polishing head 45 is also supported by a rotating column 46 connected to the central portion of the polishing head 45. Further, the slurry 48 is supplied from the slurry supply unit 47 to the polishing pad 43. By using the CMP apparatus having such a configuration, the flatness of the substrate 10 can be improved. Specifically, when a plurality of quadrangular regions of 5 mm in length and 5 mm in width are set on the main surface 10a of the substrate 10, a region that falls within a range of 3 mm from the outer periphery of the main surface 10a is selected from the plurality of regions. With respect to the plurality of evaluation target areas that are excluded portions, it is possible to obtain the substrate 10 in which the PLTV indicating the ratio of the evaluation target areas whose LTV is 1.0 μm or less is 90% or more. A semiconductor layer can be easily bonded onto the main surface 10a of the substrate 10 as described above.

(Embodiment 3)
With reference to FIG. 7, Embodiment 3 of the light-emitting device according to the present invention will be described.

Referring to FIG. 7, the light emitting element is a light emitting diode, and is formed on substrate 10, p-type ohmic contact epitaxial layer 16 bonded to main surface 10 a of substrate 10, and p-type ohmic contact epitaxial layer 16. P-type cladding layer 18, active layer 20 formed on p-type cladding layer 18, n-type cladding layer 22 formed on active layer 20, n-type electrode 7 and p-type electrode 8. . The n-type electrode 7 is formed on the n-type cladding layer 22. As the p-type cladding layer 18, for example, p-type (Al _x Ga _1-x ) _0.5 In _0.5 P may be formed. As the active layer 20, for example, _(Al x Ga _1-x) may be formed _0.5 In _0.5 P. Further, as the n-type cladding layer 22, for example, n-type (Al _x Ga _1-x ) _0.5 In _0.5 P may be formed. Here, suitable thicknesses of the n-type cladding layer 22, the active layer 20, and the p-type cladding layer 18 are about 0.5 μm to 3.0 μm, 0.5 μm to 2.0 μm, 0.5 μm to 3 μm, respectively. 0.0 μm or less.

  The n-type cladding layer 22, the active layer 20, and the p-type cladding layer 18 are partially removed to form an opening. The upper surface of the p-type ohmic contact epitaxial layer 16 is exposed at the bottom of the opening. A p-type electrode 8 is formed in contact with the p-type ohmic contact epitaxial layer 16 at the bottom of the opening. An n-type electrode 7 is formed so as to be in contact with the surface of the n-type cladding layer 22.

  As the material of the p-type ohmic contact epitaxial layer 16, AlGaAs, AlGaInP, or AlAsP can be used, and the energy gap of the material is larger than the energy gap of the active layer 20, and the light emitted from the active layer 20 is not absorbed (or Any material having a sufficiently low light absorption rate may be used.

Further, the Al composition of the active layer 20 is approximately 0 ≦ x ≦ 0.45, the Al composition of the n-type cladding layer 22 is approximately 0.5 ≦ x ≦ 1, and the Al composition of the p-type cladding layer 18 is approximately 0.5 ≦ x. x <= 1 may be sufficient. If x = 0, the composition of the active layer 20 is Ga _0.5 In _0.5 P, and the wavelength λ of the light emitted from the light emitting element is 635 nm.

Note that the ratio of the composition of the compound such as (Al _x Ga _1-x ) _0.5 In _0.5 P described above is a suitable example, and any material and ratio of the III-V semiconductor material can be used in the present invention. Can be applied to. Furthermore, the active layer 20 of the present invention can employ any configuration such as an SH structure, a DH structure, a multidimensional quantum well (MQW) structure, or a quantum well heterostructure (QWH).

Next, a method for manufacturing the light-emitting element shown in FIG. 7 will be described with reference to FIGS.
First, as shown in FIG. 8, a component preparation step (S100) is performed. In this component preparation step (S100), the spinel substrate 10 according to the present invention is prepared using the manufacturing method described in the second embodiment. In addition, an epitaxial structure is prepared in which a semiconductor layer including an active layer 20 to be a semiconductor layer of a light emitting element is formed on an n-type GaAs substrate. As shown in FIG. 9, the epitaxial structure includes an n-type GaAs substrate 26, an etching stop layer 24 formed on the n-type GaAs substrate 26, and an n-type cladding layer formed on the etching stop layer 24. 22, an active layer 20 formed on the n-type cladding layer 22, a p-type cladding layer 18 formed on the active layer 20, and a p-type ohmic contact epitaxial layer 16 formed on the p-type cladding layer 18. It consists of and. Each layer described above is formed by using an epitaxial growth method.

  As the material of the etching stop layer 24, any III-V compound semiconductor material may be used, and the lattice constant may or may not be compatible with the GaAs substrate 26. The etching rate of the material constituting the etching stop layer 24 is preferably much smaller than the etching rate of the GaAs substrate 26. For example, InGaP or AlGaAs is preferable as the material of the etching stop layer 24.

  Next, a bonding step (S110) is performed. Specifically, as shown in FIG. 9, the surface of the epitaxial structure is activated by irradiating the surface of the p-type ohmic contact epitaxial layer 16 which is a surface bonded to the substrate 10 with an ion beam 50. Instead of the ion beam 50, plasma or the like may be brought into contact with the surface.

  Thereafter, as shown in FIG. 10, main surface 10a of substrate 10 is brought into contact with the surface of p-type ohmic contact epitaxial layer 16 of the epitaxial structure. At this time, stress may be applied so that the main surface 10 a of the substrate 10 is pressed against the surface of the p-type ohmic contact epitaxial layer 16. Here, since the substrate 10 according to the present invention exhibits excellent flatness with respect to the main surface 10a, the above-described bonding (normal temperature bonding) can be reliably performed.

  As described above, the surface of the p-type ohmic contact epitaxial layer 16 is directly bonded to the main surface 10a of the substrate 10. For example, the surface of the p-type ohmic contact epitaxial layer 16 is connected to the main surface 10a of the substrate 10 through a transparent adhesive layer. You may adhere | attach on the surface 10a. As the material of the transmissive adhesive layer, any adhesive material such as spin-on glass (SOG), polyimide, or silicone can be used.

Next, a post-processing step (S120) is performed. Specifically, the impermeable n-type GaAs substrate is removed with an etching solution such as 5H ₃ PO ₄ : 3H ₂ O ₂ : 3H ₂ O or 1NH ₄ OH: 35H ₂ O ₂ . Here, the etching stop layer 24 made of, for example, InGaP or AlGaAs may still absorb light emitted from the active layer. Therefore, it is necessary to remove the etching stop layer 24 and leave only the portion of the n-type cladding layer 22 that contacts the n-type electrode 7. The etching stop layer 24 can be removed by any method such as dry etching.

  Further, by applying a dry etching method such as RIE, for example, the n-type cladding layer 22, the active layer 20, and the p-type cladding layer 18 are partially removed to expose a part of the upper surface of the p-type ohmic contact epitaxial layer 16. Let Thereafter, the p-type electrode 8 is formed on the p-type ohmic contact epitaxial layer 16. The n-type electrode 7 is formed on the n-type cladding layer 22. In this manner, a light emitting device having an LED structure in which the p-type and n-type ohmic contact metal layers (p-type electrode 8 and n-type electrode 7) are formed on the same side as shown in FIG. 7 can be formed. .

(Embodiment 4)
With reference to FIG. 11, Embodiment 4 of the light emitting element by this invention is demonstrated.

  Referring to FIG. 11, the light emitting element is an AlGaAs red LED (emission wavelength: 650 nm), and includes substrate 10, p-type cladding layer 54 bonded to main surface 10 a of substrate 10, and p-type cladding layer 54. An active layer 53 formed on the active layer 53, an n-type cladding layer 52 formed on the active layer 53, and an n-type electrode 7 and a p-type electrode 8. The n-type electrode 7 is formed on the n-type cladding layer 52. As the p-type cladding layer 54, for example, a p-type AlGaAs layer having an Al composition of about 70 to 80% and a thickness of 0.5 μm or more and 2 μm or less can be used. Further, as the n-type cladding layer 52, for example, an n-type AlGaAs layer having an Al composition of about 70 to 80% and a thickness of 0.5 μm or more and 2 μm or less can be used.

  An opening is formed by removing part of the n-type cladding layer 52 and the active layer 53. The upper surface of the p-type cladding layer 54 is exposed at the bottom of the opening. A p-type electrode 8 is formed in contact with the p-type cladding layer 54 at the bottom of the opening.

  Next, a method for manufacturing the light-emitting element shown in FIG. 11 will be described with reference to FIGS.

  The manufacturing method of the light emitting element shown in FIG. 11 is basically the same as the manufacturing method of the light emitting element shown in FIG. That is, first, the component material preparation step (S100) is performed. In this component preparation step (S100), the spinel substrate 10 according to the present invention is prepared using the manufacturing method described in the second embodiment. In addition, an epitaxial structure is prepared in which a semiconductor layer including an active layer 53 to be a semiconductor layer of a light emitting element is formed on an n-type GaAs substrate. As shown in FIG. 12, the epitaxial structure includes an n-type GaAs substrate 26, an n-type cladding layer 52 formed on the n-type GaAs substrate 26, and an active layer formed on the n-type cladding layer 52. 53 and a p-type cladding layer 54 formed on the active layer 53. Each layer described above is formed by using an epitaxial growth method.

  Next, a bonding step (S110) is performed. Specifically, as shown in FIG. 12, the surface of the epitaxial structure is activated by irradiating the surface of a p-type cladding layer 54 that is a surface to be bonded to the substrate 10 with an ion beam 50. Instead of the ion beam 50, plasma or the like may be brought into contact with the surface.

  Thereafter, as shown in FIG. 13, the main surface 10a of the substrate 10 is brought into contact with the surface of the p-type cladding layer 54 of the epitaxial structure. At this time, stress may be applied so that the main surface 10 a of the substrate 10 is pressed against the surface of the p-type cladding layer 54. Here, since the board | substrate 10 by this invention shows the outstanding flatness regarding the main surface 10a, it can perform the above joining reliably.

  As described above, the surface of the p-type cladding layer 54 is directly bonded to the main surface 10a of the substrate 10. For example, the surface of the p-type cladding layer 54 is bonded to the main surface 10a of the substrate 10 through a transmissive adhesive layer. May be. As the material of the permeable adhesive layer, any adhesive material such as spin-on glass (SOG), polyimide, or silicone can be used as described in Embodiment 3.

Next, a post-processing step (S120) is performed. Specifically, the impermeable n-type GaAs substrate is removed with an etching solution such as NH ₄ OH: H ₂ O ₂ = 1.7: 1. Further, for example, a dry etching method such as RIE is applied, and the n-type cladding layer 52 and the active layer 53 are partially removed to expose a part of the upper surface of the p-type cladding layer 54. Thereafter, the p-type electrode 8 is formed on the p-type cladding layer 54. Further, the n-type electrode 7 is formed on the n-type cladding layer 52. In this way, a light-emitting element having an LED structure in which p-type and n-type ohmic contact metal layers (p-type electrode 8 and n-type electrode 7) are formed on the same side as shown in FIG. 11 can be formed. .

(Experimental example 1)
In order to confirm the effect of the present invention, the following experiment was conducted.

(sample)
Four spinel substrates having a diameter of 4 inches and a thickness of 0.25 mm were prepared.

  As for the polishing step, the four-step polishing described in the second embodiment of the present invention was performed. The rough polishing step (S41), the intermediate finish polishing step (S42), and the final polishing step (S43) are the same processing conditions for all four sheets.

  Of the four substrates, sample No. 1 and sample no. For No. 2, the CMP step was performed in the CMP step (S44) with the soft layer added to the surface plate side of the CMP apparatus. Of the four samples, sample no. 3 and sample no. For No. 4, a soft layer was added to the polishing head side of the CMP apparatus in the CMP process.

(Experiment contents)
The surface accuracy of the substrate (holding substrate) prepared as described above was evaluated. In addition, a wafer made of a material different from spinel was actually bonded to the main surface of the holding substrate made of spinel at room temperature, and the bonded state was visually evaluated. The wafer (bonding wafer) was made of a material that transmits light in order to facilitate the evaluation of the bonded state. Specifically, LiTaO ₃ was used here as a light transmissive material constituting the bonding wafer.

Surface accuracy evaluation:
PLTV was measured on the main surface of the holding substrate using a flatness measuring / analyzing apparatus. The following numerical values were used as PLTV. That is, a plurality of rectangular regions of 5 mm in length and 5 mm in width are set on the main surface of the holding substrate, and a plurality of regions excluding a region that falls within a range of 3 mm from the outer periphery of the main surface among the plurality of regions. The evaluation target area (site) was assumed. For the evaluation target region, the ratio of the evaluation target region having an LTV (Local Thickness Variation) of 1.0 μm or less was defined as PLTV. The site can be set parallel to the orientation flat. LTV can be expressed as the difference between the maximum value and the minimum value at one site height with respect to the back surface of the holding substrate.

  In the data analysis, if the center point of the set rectangular area (site) of 5 mm x 5 mm is included in the range of 3 mm from the outer periphery of the main surface, it is excluded from the evaluation target and the center If the point is inside the range of 3 mm from the outer periphery of the main surface, it is handled as an evaluation object.

  Further, the warpage of each holding substrate was measured using a flatness measuring / analyzing apparatus. Here, the height from the reference surface when only the center point of the back surface of the holding substrate was fixed was measured, and the maximum value of the height was taken as the warp value.

Evaluation of bonding state:
After evaluating the surface accuracy, a light-transmitting bonding wafer having a diameter of 4 inches and a thickness of 0.5 mm was bonded to the main surface of each substrate at room temperature. Specifically, the surface of the bonding wafer is activated by irradiating the surface of the bonding wafer with argon ions, and then the main surface of the holding substrate made of spinel is pressed against the surface of the bonding wafer at room temperature. Joined. And about the holding | maintenance board | substrate after joining, the part of the favorable joining state and the part which the joining defect generate | occur | produced were confirmed visually. Specifically, since a void is formed between the surface of the bonding wafer and the holding substrate made of spinel in the portion where the bonding failure has occurred, the portion is more whitish than the portion in a good bonding state. The discolored part was confirmed visually.

(result)
The measurement results are shown in FIGS. 14 to 16 show sample Nos. 1 to 19, and FIGS. 2 is a result of Sample No. 3 is a result of Sample No. 4 is the result. FIG. 14, FIG. 17, FIG. 20, and FIG. 23 are schematic views each showing a three-dimensional state of unevenness on the main surface of the holding substrate. 15, FIG. 18, FIG. 21, and FIG. 24, each of a plurality of 5 mm square regions set on the main surface of the holding substrate displays a region in which LTV is 1.0 μm or less in white, while LTV The area where the value exceeds 1.0 μm is displayed in black. 16, FIG. 19, FIG. 22, and FIG. 25 show the appearance of the substrate after bonding (bonding substrate).

  Sample No. 14, with reference to FIGS. 14 to 16, PLTV excluding the range of 3 mm from the outer periphery of the holding substrate was 72%, and the warp was 78 μm. Further, as can be seen from FIG. 16 showing the state where the bonding wafer is bonded, the ratio of the portion showing a good bonded state on the main surface of the holding substrate was 80%.

  Sample No. 17 to 19, the PLTV excluding the range of 3 mm from the outer periphery of the holding substrate was 66%, and the warp was 66 μm. Further, as can be seen from FIG. 19 showing the state where the bonding wafer is bonded, the ratio of the portion showing a good bonded state on the main surface of the holding substrate was 70%.

  Sample No. 20 to 22, PLTV excluding the range of 3 mm from the outer periphery of the holding substrate was 92% and the warpage was 91 μm. Further, as can be seen from FIG. 22 showing the state where the bonding wafer is bonded, the ratio of the portion showing a good bonded state on the main surface of the holding substrate was 98%.

  Sample No. 23, with reference to FIGS. 23 to 25, PLTV excluding the range of 3 mm from the outer periphery of the holding substrate was 95%, and the warp was 96 μm. Further, as can be seen from FIG. 25 showing the state where the bonding wafer is bonded, the ratio of the portion showing a good bonded state on the main surface of the holding substrate was 98%.

(Experimental example 2)
Sample No. mentioned above. About 1-4, after joining the wafer for joining, the said joining board | substrate was diced, and the joining force between the holding | maintenance board | substrate which consists of a spinel, and the joining wafer was investigated about the sample obtained by dicing.

(sample)
Sample No. formed in Experimental Example 1 above. Bonded substrates using 1-4 holding substrates were prepared.

(Experiment contents)
The prepared four bonded substrates were diced so as to cut out a plurality of 10 mm × 10 mm square samples. Ten 10 mm × 10 mm square samples are taken out from each bonding substrate, and both surfaces are bonded to a jig, and a holding substrate made of spinel and a bonding wafer are pulled in a 180 ° direction by a tensile tester. The tensile strength was measured after peeling.

(result)
Sample No. 1 and sample no. The sample using the holding substrate 2 had an average tensile strength of 5 MPa. On the other hand, sample No. 3 and sample no. The sample using the holding substrate No. 4 had an average tensile strength of 12 MPa. Thus, it can be seen that the bonding force (tensile strength) between the bonded substrates becomes sufficiently large especially when the PLTV is 90% or more.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is shown not by the above-described embodiment but by the scope of claims, and is intended to include all modifications within the meaning and scope equivalent to the scope of claims.

  INDUSTRIAL APPLICABILITY The present invention is particularly excellent as a technique for manufacturing a light emitting element that can be practically substituted for a light emitting element having a sapphire substrate at a lower cost.

  1 buffer layer, 2 n-type GaN layer, 3 n-type AlGaN layer, 4 multiple quantum well, 5 p-type AlGaN layer, 6 p-type GaN layer, 7 n-type electrode, 8 p-type electrode, 10 substrate, 10a main surface, 16 p-type ohmic contact epitaxial layer, 18, 54 p-type cladding layer, 20, 53 active layer, 22, 52 n-type cladding layer, 24 etching stop layer, 26 n-type GaAs substrate, 30 light emitting element, 40 CMP apparatus, 41 Column, 42 Surface plate, 43 Polishing pad, 44 Soft layer, 45 Polishing head, 46 Rotating column, 47 Slurry supply unit, 48 Slurry, 50 Ion beam.

Claims (10)

  A substrate for a light-emitting element (30) made of spinel. _2. The substrate according to claim 1, wherein the composition of the spinel sintered body is MgO · nAl ₂ O ₃ (1.05 ≦ n ≦ 1.30) and the content of Si element is 20 ppm or less.   The said sintered compact is a board | substrate of Claim 2 whose linear transmittance | permeability by the light ray with a wavelength of 350 nm or more and 450 nm or less in thickness 1mm is 80% or more. The substrate has a main surface (10a);
When a plurality of quadrangular regions of 5 mm in length and 5 mm in width are set for the main surface (10a), the region that falls within a range of 3 mm from the outer periphery of the main surface (10a) is excluded from the plurality of regions. 2. The substrate according to claim 1, wherein the PLTV indicating the ratio of the evaluation target area where the LTV is 1.0 μm or less is 90% or more for a plurality of evaluation target areas which are the portions. Production of substrate (10) for light-emitting element (30) comprising spinel, the composition of which is MgO.nAl ₂ O ₃ (1.05 ≦ n ≦ 1.30), and the content of Si element is 20 ppm or less. A method,
A step of forming a compact from a spinel powder having a Si element content of 50 ppm or less and a purity of 99.5% by mass or more (S20);
A first sintering step (S31) for forming a sintered body having a density of 95% or more by sintering the molded body in a vacuum at 1500 ° C. or higher and 1800 ° C. or lower;
A substrate manufacturing method comprising: a second sintering step (S32) of pressure-sintering the sintered body at 1600 ° C or higher and 1900 ° C or lower.   The said sintered compact formed by a said 1st sintering process (S31) is a manufacturing method of the board | substrate (10) of Claim 5 whose content of Si element is 20 ppm or less. The first sintering step (S31)
Performed at a pressure of 50 Pa or less,
When the shortest thickness from the center of the sintered body to the outside of the sintered body is D (mm), and the heating time until reaching the maximum temperature from 1000 ° C. is t minutes,
D = a × t ^1/2
0.1 ≦ a ≦ 3
The manufacturing method of the board | substrate (10) of Claim 5 which has these relationship. After the second sintering step (S32), slicing the sintered body;
Further comprising a step of polishing the surface of the substrate obtained by the slicing step using a chemical mechanical polishing method (S44),
In the polishing step (S44), the polishing pad (43) disposed on the surface plate (42) and the polishing head disposed to face the polishing pad (43) and (45) The substrate (10) is polished in a state where the substrate (10) is sandwiched,
The substrate (10) according to claim 5, wherein a soft layer (44) having a lower hardness than the polishing head (45) is disposed between the polishing head (45) and the substrate (10). Method. A substrate (10) according to claim 1;
A light emitting element provided with the semiconductor layer (1-6) arrange | positioned on one main surface of the said board | substrate (10) and containing a light emitting layer (4).   The light emitting element of Claim 9 with which the said board | substrate (10) and the said semiconductor layer (1-6) are joined.