JPS6490637A - Digital signal demodulating method - Google Patents

Digital signal demodulating method

Info

Publication number
JPS6490637A
JPS6490637A JP62245877A JP24587787A JPS6490637A JP S6490637 A JPS6490637 A JP S6490637A JP 62245877 A JP62245877 A JP 62245877A JP 24587787 A JP24587787 A JP 24587787A JP S6490637 A JPS6490637 A JP S6490637A
Authority
JP
Japan
Prior art keywords
data
signal
shift
discrimination
error
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62245877A
Other languages
Japanese (ja)
Inventor
Takami Niihara
Kazunori Nishikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Victor Company of Japan Ltd
Original Assignee
Victor Company of Japan Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victor Company of Japan Ltd filed Critical Victor Company of Japan Ltd
Priority to JP62245877A priority Critical patent/JPS6490637A/en
Publication of JPS6490637A publication Critical patent/JPS6490637A/en
Pending legal-status Critical Current

Links

Landscapes

  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To attain sure demodulation even when deviation takes place in burst error by using shift information obtained through data conversion so as to discriminate the shift and synchronizing with the data and the timing pulse. CONSTITUTION:When a burst error takes place in a data SD, a burst error discrimination circuit 12 discriminates it. In this discrimination, the returning point of time of an error is discriminated to obtain a discrimination signal S'' because the reproduction level from a recording medium 1 is lowered at the occurrence of error and increased after the restoration. The signal S'' is fed to a data shift discrimination circuit 13 to count the 3-bit shift information data SI at every N bits from the production of the signal S''. Then the counted data are obtained by using data SI2, SI1, SIphi to compare the quantity of counted values C, R, L and the one bit shift to right/left are decided from the result. A synchronizing control circuit 14 loads the value in matching with the bit shift in the 1/14 counter 5 by using the deciding signal. Thus, the timing pulse from the decoder 6 is synchronized with the data SD.
JP62245877A 1987-10-01 1987-10-01 Digital signal demodulating method Pending JPS6490637A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62245877A JPS6490637A (en) 1987-10-01 1987-10-01 Digital signal demodulating method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62245877A JPS6490637A (en) 1987-10-01 1987-10-01 Digital signal demodulating method

Publications (1)

Publication Number Publication Date
JPS6490637A true JPS6490637A (en) 1989-04-07

Family

ID=17140134

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62245877A Pending JPS6490637A (en) 1987-10-01 1987-10-01 Digital signal demodulating method

Country Status (1)

Country Link
JP (1) JPS6490637A (en)

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