JPS6489771A - Channel searching circuit - Google Patents

Channel searching circuit

Info

Publication number
JPS6489771A
JPS6489771A JP24434687A JP24434687A JPS6489771A JP S6489771 A JPS6489771 A JP S6489771A JP 24434687 A JP24434687 A JP 24434687A JP 24434687 A JP24434687 A JP 24434687A JP S6489771 A JPS6489771 A JP S6489771A
Authority
JP
Japan
Prior art keywords
signal
channel
generator
lock
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24434687A
Other languages
Japanese (ja)
Inventor
Yukitomi Fujishima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP24434687A priority Critical patent/JPS6489771A/en
Publication of JPS6489771A publication Critical patent/JPS6489771A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To change a channel faster by preventing the channel from changing at a constant cycle, writing a necessary video signal into a memory after the output of a phase locked loop(PLL) circuit is phase-locked to an input video signal, and thereafter, immediately providing a means to change channel. CONSTITUTION:The video signal from a video amplifier 6 is supplied to a lock signal generator 21. Further, a regenerative horizontal synchronizing signal form a synchronizing circuit 14 to separate the synchronizing signal from the input video signal is supplied to the lock signal generator 21. A regenerative horizontal synchronizing signal PHL consists of a PLL circuit in the synchronizing circuit 14. The horizontal synchronizing signal induced in the video signal from the video amplifier 6 is decided whether or not it is synchronized with the regenerative synchronizing signal PHL inside the lock signal generator. When a lock condition is decided, a decision output J is supplied to a channel change generator 19. When the decision signal J to indicate the lock condition is inputted, the channel change generator 19 applies a next channel searching signal to a tuner 2.
JP24434687A 1987-09-30 1987-09-30 Channel searching circuit Pending JPS6489771A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24434687A JPS6489771A (en) 1987-09-30 1987-09-30 Channel searching circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24434687A JPS6489771A (en) 1987-09-30 1987-09-30 Channel searching circuit

Publications (1)

Publication Number Publication Date
JPS6489771A true JPS6489771A (en) 1989-04-04

Family

ID=17117334

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24434687A Pending JPS6489771A (en) 1987-09-30 1987-09-30 Channel searching circuit

Country Status (1)

Country Link
JP (1) JPS6489771A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5223875A (en) * 1990-09-06 1993-06-29 Canon Kabushiki Kaisha Automatic tracking camera system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5223875A (en) * 1990-09-06 1993-06-29 Canon Kabushiki Kaisha Automatic tracking camera system

Similar Documents

Publication Publication Date Title
ES2120877A1 (en) Phase lock loop synchronization circuit and method
CA2025164A1 (en) Adaptive phase lock loop system
EP0124332A3 (en) A double conversion tuner
EP0335509A3 (en) Broad band vco control system for clock recovery
EP0170207A3 (en) A write clock pulse generator used for a time base corrector
SE9503702L (en) Locked loop
EP0845899A3 (en) Video display apparatus having phase-locked loop used for synchronizing a horizontal scan frequency with a synchronizing input signal frequency
JPS5915219B2 (en) Main oscillator synchronizer
JPS5637779A (en) Television picture receiver
EP0166428A3 (en) Time base error compensation device for video signal reproducing apparatus
EP0218402A3 (en) A sampling clock phase correction circuit
JPS6489771A (en) Channel searching circuit
DE68906305D1 (en) ARRANGEMENT FOR DERIVING A SCAN FREQUENCY.
JPS5336139A (en) Television receiver set
GB2289174A (en) Apparatus and method for enabling elements of a phase locked loop
JPS57118444A (en) Processor of transmitted signal
JPS57180282A (en) Hard copy device
JPS6453682A (en) Phase locked signal generator
JPS5742288A (en) Rotating information recording medium reproduction device
DK224688A (en) OSCILLATOR EQUIPMENT TO PROVIDE AT LEAST TWO DIFFERENT FREQUENCIES
JPS6412691A (en) Video signal sampling circuit
JPS57164407A (en) Pll oscillating circuit
JPS55147884A (en) Aft circuit of television receiver
JPS6441304A (en) Pll circuit for disk player
JPS5698962A (en) Reference carrier playback device