JPS6489610A - Static latch circuit - Google Patents

Static latch circuit

Info

Publication number
JPS6489610A
JPS6489610A JP62247263A JP24726387A JPS6489610A JP S6489610 A JPS6489610 A JP S6489610A JP 62247263 A JP62247263 A JP 62247263A JP 24726387 A JP24726387 A JP 24726387A JP S6489610 A JPS6489610 A JP S6489610A
Authority
JP
Japan
Prior art keywords
fet
defect
fet11
inverter
grounding line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62247263A
Other languages
Japanese (ja)
Inventor
Ryuichi Sase
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC IC Microcomputer Systems Co Ltd
Original Assignee
NEC IC Microcomputer Systems Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC IC Microcomputer Systems Co Ltd filed Critical NEC IC Microcomputer Systems Co Ltd
Priority to JP62247263A priority Critical patent/JPS6489610A/en
Publication of JPS6489610A publication Critical patent/JPS6489610A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To improve the defect detecting rate of an IC check and to decrease the number of processes by connecting a third FET, in which a gate circuit goes to be the reverse phase input of a power source line, a grounding line or the gate signal of a first FET, between the connecting point of the first FET and a second FET and an inverter and the power source line or the grounding line. CONSTITUTION:This circuit is constituted by connecting an FET11 between the connecting point of FETs1 and 4 and an inverter 2 and the grounding line. In this constitution, a contact 7 of an inverter 6 and a gate signal of the FET4 is erased by a photomask defect and the defect of a photoresist procedure and when the FETs1 and 4 go to a floating condition, since the FET11 is conducted, holding data are forcibly made a GND level. Thus, since the channel length and channel width of the FET11 is set to a suitable value, even for the IC check to be normally ended in several seconds at room temperature, the above-mentioned defect can be removed.
JP62247263A 1987-09-29 1987-09-29 Static latch circuit Pending JPS6489610A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62247263A JPS6489610A (en) 1987-09-29 1987-09-29 Static latch circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62247263A JPS6489610A (en) 1987-09-29 1987-09-29 Static latch circuit

Publications (1)

Publication Number Publication Date
JPS6489610A true JPS6489610A (en) 1989-04-04

Family

ID=17160874

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62247263A Pending JPS6489610A (en) 1987-09-29 1987-09-29 Static latch circuit

Country Status (1)

Country Link
JP (1) JPS6489610A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0322609A (en) * 1989-06-19 1991-01-31 Nec Corp Latch circuit
US7862272B2 (en) 2004-05-31 2011-01-04 Piolax Inc. Clip

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6010911A (en) * 1983-06-30 1985-01-21 Mitsubishi Electric Corp Semiconductor integrated circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6010911A (en) * 1983-06-30 1985-01-21 Mitsubishi Electric Corp Semiconductor integrated circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0322609A (en) * 1989-06-19 1991-01-31 Nec Corp Latch circuit
US7862272B2 (en) 2004-05-31 2011-01-04 Piolax Inc. Clip

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