JPS648772U - - Google Patents
Info
- Publication number
- JPS648772U JPS648772U JP10249887U JP10249887U JPS648772U JP S648772 U JPS648772 U JP S648772U JP 10249887 U JP10249887 U JP 10249887U JP 10249887 U JP10249887 U JP 10249887U JP S648772 U JPS648772 U JP S648772U
- Authority
- JP
- Japan
- Prior art keywords
- hole
- holes
- attaching
- circuit board
- printed circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10249887U JPS648772U (en, 2012) | 1987-07-03 | 1987-07-03 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10249887U JPS648772U (en, 2012) | 1987-07-03 | 1987-07-03 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS648772U true JPS648772U (en, 2012) | 1989-01-18 |
Family
ID=31332460
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10249887U Pending JPS648772U (en, 2012) | 1987-07-03 | 1987-07-03 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS648772U (en, 2012) |
-
1987
- 1987-07-03 JP JP10249887U patent/JPS648772U/ja active Pending
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