JPS6484976A - Picture processor - Google Patents

Picture processor

Info

Publication number
JPS6484976A
JPS6484976A JP62241697A JP24169787A JPS6484976A JP S6484976 A JPS6484976 A JP S6484976A JP 62241697 A JP62241697 A JP 62241697A JP 24169787 A JP24169787 A JP 24169787A JP S6484976 A JPS6484976 A JP S6484976A
Authority
JP
Japan
Prior art keywords
moire
magnification
circuit
period
cpu
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62241697A
Other languages
Japanese (ja)
Inventor
Kaoru Tada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Minolta Co Ltd
Original Assignee
Minolta Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Minolta Co Ltd filed Critical Minolta Co Ltd
Priority to JP62241697A priority Critical patent/JPS6484976A/en
Priority to US07/236,554 priority patent/US4893195A/en
Publication of JPS6484976A publication Critical patent/JPS6484976A/en
Pending legal-status Critical Current

Links

Landscapes

  • Facsimile Image Signal Circuits (AREA)

Abstract

PURPOSE:To eliminate moire by detecting a moire period from a picture data and obtaining an effective magnification based on the period. CONSTITUTION:In detecting a moire period signal in a signal supplied from a moire detection circuit 15 to a CPU 19, the CPU 19 judges it as the production of moire and sends a signal to a moire elimination magnification generating circuit 18 to allow the circuit 18 to send back the magnification in response to the moire period to the CPU 19. The circuit 18 consists of a RAM and stores a magnification with a high moire elimination effect to some kinds of dot pitches as a table in advance. The CPU 19 obtains a dot pitch from the detected moire period and obtains the most effective magnification from the table in the circuit 18 based thereupon. Then the optical device (optical magnification) 12 and an electric reduction circuit 14 are operated by the obtained magnification and moire attended with the reading of the original 11 is eliminated.
JP62241697A 1987-08-27 1987-09-26 Picture processor Pending JPS6484976A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP62241697A JPS6484976A (en) 1987-09-26 1987-09-26 Picture processor
US07/236,554 US4893195A (en) 1987-08-27 1988-08-25 Image processing apparatus capable of eliminating moire pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62241697A JPS6484976A (en) 1987-09-26 1987-09-26 Picture processor

Publications (1)

Publication Number Publication Date
JPS6484976A true JPS6484976A (en) 1989-03-30

Family

ID=17078178

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62241697A Pending JPS6484976A (en) 1987-08-27 1987-09-26 Picture processor

Country Status (1)

Country Link
JP (1) JPS6484976A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007082221A (en) * 2005-09-09 2007-03-29 Toshiba Corp Image forming apparatus and image forming method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007082221A (en) * 2005-09-09 2007-03-29 Toshiba Corp Image forming apparatus and image forming method

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