JPS6482159A - System for executing input/output instruction - Google Patents

System for executing input/output instruction

Info

Publication number
JPS6482159A
JPS6482159A JP24015887A JP24015887A JPS6482159A JP S6482159 A JPS6482159 A JP S6482159A JP 24015887 A JP24015887 A JP 24015887A JP 24015887 A JP24015887 A JP 24015887A JP S6482159 A JPS6482159 A JP S6482159A
Authority
JP
Japan
Prior art keywords
processor
absence
instruction
cpu
manhour
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24015887A
Other languages
Japanese (ja)
Inventor
Kiyoshi Morishima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP24015887A priority Critical patent/JPS6482159A/en
Publication of JPS6482159A publication Critical patent/JPS6482159A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)

Abstract

PURPOSE:To reduce the developing manhour of firmware by securing such as constitution where a CPU performs the inter-processor communication to decide the presence or absence of an I/O (input/output) processor and then carrying out directly an I/O instruction when the absence of the I/O processor is confirmed. CONSTITUTION:A CPU 1 performs the inter-processor communication against an I/O processor 3 to decide the presence or absence of the processor 3. When the presence of the processor 3 is confirmed, the CPU 1 makes the processor 3 carry out an I/O instruction. While the CPU 1 carries out the I/O instruction by itself when the absence of the processor 3 is confirmed. As a result, the I/O instruction is carried out just with a single type of firmware regardless of the presence or absence of the processor 3. Thus it is possible to reduce the developing manhour of firmware and also to omit the developing manhour for replacement processing.
JP24015887A 1987-09-24 1987-09-24 System for executing input/output instruction Pending JPS6482159A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24015887A JPS6482159A (en) 1987-09-24 1987-09-24 System for executing input/output instruction

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24015887A JPS6482159A (en) 1987-09-24 1987-09-24 System for executing input/output instruction

Publications (1)

Publication Number Publication Date
JPS6482159A true JPS6482159A (en) 1989-03-28

Family

ID=17055356

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24015887A Pending JPS6482159A (en) 1987-09-24 1987-09-24 System for executing input/output instruction

Country Status (1)

Country Link
JP (1) JPS6482159A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54137256A (en) * 1978-04-17 1979-10-24 Fujitsu Ltd Multi-processor equipment

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54137256A (en) * 1978-04-17 1979-10-24 Fujitsu Ltd Multi-processor equipment

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