JPS6480186A - Variable block size moving compensation system - Google Patents

Variable block size moving compensation system

Info

Publication number
JPS6480186A
JPS6480186A JP23775187A JP23775187A JPS6480186A JP S6480186 A JPS6480186 A JP S6480186A JP 23775187 A JP23775187 A JP 23775187A JP 23775187 A JP23775187 A JP 23775187A JP S6480186 A JPS6480186 A JP S6480186A
Authority
JP
Japan
Prior art keywords
prediction
prediction error
inter
block size
frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP23775187A
Other languages
Japanese (ja)
Other versions
JP2716703B2 (en
Inventor
Makiko Tanoue
Takashi Ito
Kiichi Matsuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP23775187A priority Critical patent/JP2716703B2/en
Publication of JPS6480186A publication Critical patent/JPS6480186A/en
Application granted granted Critical
Publication of JP2716703B2 publication Critical patent/JP2716703B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Compression Or Coding Systems Of Tv Signals (AREA)

Abstract

PURPOSE:To decide a block with an optimum size by deciding plural kinds of blocks with a required size including picture information, applying inter-frame prediction, moving compensation prediction and inter-frame prediction so as to obtain a prediction error as to each block and evaluating the prediction error by two evaluation means. CONSTITUTION:The block size is made small to a part with rapid pattern change and made large to the flat portion. A 1st evaluation means 17 receives a prediction error from the inter-frame predicting means 14, a prediction error from a movement compensation prediction means 15 and a prediction error from an inter-frame predicting means 16 and evaluates the prediction error by a required evaluation function. Thus, the optimum prediction system is selected and the information is outputted from its output line 17a. Then a 2nd evaluation means 22 receives a means value of the prediction error as to large/ small blocks and evaluates said prediction error by a required evaluation function. Then the optimum block size is decided to output the information from the output line 22a.
JP23775187A 1987-09-22 1987-09-22 Variable block size motion compensation method Expired - Fee Related JP2716703B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23775187A JP2716703B2 (en) 1987-09-22 1987-09-22 Variable block size motion compensation method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23775187A JP2716703B2 (en) 1987-09-22 1987-09-22 Variable block size motion compensation method

Publications (2)

Publication Number Publication Date
JPS6480186A true JPS6480186A (en) 1989-03-27
JP2716703B2 JP2716703B2 (en) 1998-02-18

Family

ID=17019930

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23775187A Expired - Fee Related JP2716703B2 (en) 1987-09-22 1987-09-22 Variable block size motion compensation method

Country Status (1)

Country Link
JP (1) JP2716703B2 (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02305083A (en) * 1989-05-18 1990-12-18 Sony Corp Method and device for encoding video signal
JPH0385883A (en) * 1989-08-30 1991-04-11 Hitachi Denshi Ltd Highly efficient image coding system
JPH05252503A (en) * 1992-03-02 1993-09-28 Matsushita Electric Ind Co Ltd High efficient encoder
JP2007150728A (en) * 2005-11-28 2007-06-14 Mitsubishi Electric Corp Dynamic-image coding equipment
JP2008092150A (en) * 2006-09-29 2008-04-17 Canon Inc Image encoding device and image encoding method
WO2008083633A1 (en) * 2007-01-11 2008-07-17 Huawei Technologies Co., Ltd. A method and a device for intra frame prediction encoding/decoding
US8155198B2 (en) 2006-12-08 2012-04-10 Kabushiki Kaisha Toshiba Interpolated frame generating method and interpolated frame generating apparatus

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02305083A (en) * 1989-05-18 1990-12-18 Sony Corp Method and device for encoding video signal
JPH0385883A (en) * 1989-08-30 1991-04-11 Hitachi Denshi Ltd Highly efficient image coding system
JPH05252503A (en) * 1992-03-02 1993-09-28 Matsushita Electric Ind Co Ltd High efficient encoder
JP2007150728A (en) * 2005-11-28 2007-06-14 Mitsubishi Electric Corp Dynamic-image coding equipment
JP2008092150A (en) * 2006-09-29 2008-04-17 Canon Inc Image encoding device and image encoding method
US8155198B2 (en) 2006-12-08 2012-04-10 Kabushiki Kaisha Toshiba Interpolated frame generating method and interpolated frame generating apparatus
WO2008083633A1 (en) * 2007-01-11 2008-07-17 Huawei Technologies Co., Ltd. A method and a device for intra frame prediction encoding/decoding

Also Published As

Publication number Publication date
JP2716703B2 (en) 1998-02-18

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