JPS647770U - - Google Patents
Info
- Publication number
- JPS647770U JPS647770U JP10129287U JP10129287U JPS647770U JP S647770 U JPS647770 U JP S647770U JP 10129287 U JP10129287 U JP 10129287U JP 10129287 U JP10129287 U JP 10129287U JP S647770 U JPS647770 U JP S647770U
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- printed circuit
- terminal
- outlet
- electronic components
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004020 conductor Substances 0.000 claims description 2
Landscapes
- Multi-Conductor Connections (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10129287U JPS647770U (es) | 1987-07-02 | 1987-07-02 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10129287U JPS647770U (es) | 1987-07-02 | 1987-07-02 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS647770U true JPS647770U (es) | 1989-01-17 |
Family
ID=31330150
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10129287U Pending JPS647770U (es) | 1987-07-02 | 1987-07-02 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS647770U (es) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2015173005A (ja) * | 2014-03-11 | 2015-10-01 | 富士通株式会社 | 回路基板及び回路基板の製造方法 |
-
1987
- 1987-07-02 JP JP10129287U patent/JPS647770U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2015173005A (ja) * | 2014-03-11 | 2015-10-01 | 富士通株式会社 | 回路基板及び回路基板の製造方法 |