JPS6468792A - Driving of active matrix type display device - Google Patents

Driving of active matrix type display device

Info

Publication number
JPS6468792A
JPS6468792A JP22527487A JP22527487A JPS6468792A JP S6468792 A JPS6468792 A JP S6468792A JP 22527487 A JP22527487 A JP 22527487A JP 22527487 A JP22527487 A JP 22527487A JP S6468792 A JPS6468792 A JP S6468792A
Authority
JP
Japan
Prior art keywords
voltage
tft1
display
driving
state
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22527487A
Other languages
Japanese (ja)
Inventor
Shintarou Kisumi
Takayuki Hoshiya
Kazuhiro Takahara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP22527487A priority Critical patent/JPS6468792A/en
Publication of JPS6468792A publication Critical patent/JPS6468792A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To perform an interlace driving without reducing the quality of display by maintaining a switching element in off-state and restraining the variation of the voltage of a display element. CONSTITUTION: A reference voltage Vr is applied into two scan bus lines adjacent to scan bus lines 6-1 to 6-4 applying a voltage Vgon putting ON a thin film transistor TFT1, and a voltage Vgoff turning off the TFT1 is applied into all the other scan bus lines. Therefore, the TFT1 in an even line is maintained on off-state in an odd field, the TFT1 in an odd line is maintained in off-state in an even field, whereby the voltage variation of display element 5 is restrained and the display corresponding to a data voltage Vd is performed. By this way, the interlace driving is performed without reducing the quality of display.
JP22527487A 1987-09-10 1987-09-10 Driving of active matrix type display device Pending JPS6468792A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22527487A JPS6468792A (en) 1987-09-10 1987-09-10 Driving of active matrix type display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22527487A JPS6468792A (en) 1987-09-10 1987-09-10 Driving of active matrix type display device

Publications (1)

Publication Number Publication Date
JPS6468792A true JPS6468792A (en) 1989-03-14

Family

ID=16826756

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22527487A Pending JPS6468792A (en) 1987-09-10 1987-09-10 Driving of active matrix type display device

Country Status (1)

Country Link
JP (1) JPS6468792A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003060868A1 (en) * 2002-01-17 2003-07-24 International Business Machines Corporation Display device, scanning line driver circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003060868A1 (en) * 2002-01-17 2003-07-24 International Business Machines Corporation Display device, scanning line driver circuit

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