JPS6455898A - Board mounting apparatus - Google Patents

Board mounting apparatus

Info

Publication number
JPS6455898A
JPS6455898A JP62211463A JP21146387A JPS6455898A JP S6455898 A JPS6455898 A JP S6455898A JP 62211463 A JP62211463 A JP 62211463A JP 21146387 A JP21146387 A JP 21146387A JP S6455898 A JPS6455898 A JP S6455898A
Authority
JP
Japan
Prior art keywords
slots
terminals
address
slot
boards
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62211463A
Other languages
Japanese (ja)
Inventor
Mitsuo Takano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP62211463A priority Critical patent/JPS6455898A/en
Publication of JPS6455898A publication Critical patent/JPS6455898A/en
Pending legal-status Critical Current

Links

Landscapes

  • Mounting Of Printed Circuit Boards And The Like (AREA)

Abstract

PURPOSE:To improve mounting efficiency and to make the number of interconnections less, by providing second slots having the terminals, which are connected to one terminal of each of first slots, on which multiplex boards are mounted and set at the same potential, and providing the boards having the terminals, which are set at a reverse potential with respect to said terminals of the first slots and connected to the terminals of the first slots. CONSTITUTION:When boards 5 are mounted on slots 30 and 31, the second pins of second slots 34 and 35, which are connected to the third pins of the first slots 30 and 31, are forcibly dropped to 0V. Therefore, the address of the slot 34 is changed to A from E. The address of the slot 35 is changed to B from F. Therefore, even if the boards not required to be addressed are mounted on the slot having the address A and the slot 31 having the address B, the addresses of the slots 34 and 35 are updated to A and B at the same time. Thus a board mounting apparatus having the continuous addresses is obtained.
JP62211463A 1987-08-27 1987-08-27 Board mounting apparatus Pending JPS6455898A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62211463A JPS6455898A (en) 1987-08-27 1987-08-27 Board mounting apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62211463A JPS6455898A (en) 1987-08-27 1987-08-27 Board mounting apparatus

Publications (1)

Publication Number Publication Date
JPS6455898A true JPS6455898A (en) 1989-03-02

Family

ID=16606356

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62211463A Pending JPS6455898A (en) 1987-08-27 1987-08-27 Board mounting apparatus

Country Status (1)

Country Link
JP (1) JPS6455898A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110271020A1 (en) * 2010-04-29 2011-11-03 Wilson Larry E Node Differentiation in Multi-Node Electronic Systems

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110271020A1 (en) * 2010-04-29 2011-11-03 Wilson Larry E Node Differentiation in Multi-Node Electronic Systems
US8335879B2 (en) * 2010-04-29 2012-12-18 Hewlett-Packard Development Company, L.P. Node differentiation in multi-node electronic systems

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