JPS6448573A - Picture processor - Google Patents

Picture processor

Info

Publication number
JPS6448573A
JPS6448573A JP20402687A JP20402687A JPS6448573A JP S6448573 A JPS6448573 A JP S6448573A JP 20402687 A JP20402687 A JP 20402687A JP 20402687 A JP20402687 A JP 20402687A JP S6448573 A JPS6448573 A JP S6448573A
Authority
JP
Japan
Prior art keywords
frame
level
signal
image
luminance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20402687A
Other languages
Japanese (ja)
Inventor
Kazuaki Kakinuma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP20402687A priority Critical patent/JPS6448573A/en
Publication of JPS6448573A publication Critical patent/JPS6448573A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To obtain a composite image without the sense of incompatibility by obtaining the fluctuation of the average luminance signal level of an image to obtain a maximum area on a screen and the image which becomes a base by making variable continuously the level of the signal for a frame added as a boundary in accordance with the luminance level of a main image. CONSTITUTION:An automatic level control circuit 6 controls a frame signal from a frame signal generating circuit 5 with a direct current component from an integration circuit 3, and changes the level of the frame signal in accordance with the change of the luminance component level of a main picture signal supplied to the integration circuit 3. On the screen of a monitor 11, a main image 12 and a sub-image 14 are displayed while the boundary is provided by a frame of the frame signal, and the images are displayed so that the brightness (luminance) can be changed in accordance with the luminance signal level of the main image in which the frame 14 of the frame signal occupies a main area on the screen. Thus, it can be prevented that it is hard for a user to see the frame 14.
JP20402687A 1987-08-19 1987-08-19 Picture processor Pending JPS6448573A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20402687A JPS6448573A (en) 1987-08-19 1987-08-19 Picture processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20402687A JPS6448573A (en) 1987-08-19 1987-08-19 Picture processor

Publications (1)

Publication Number Publication Date
JPS6448573A true JPS6448573A (en) 1989-02-23

Family

ID=16483532

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20402687A Pending JPS6448573A (en) 1987-08-19 1987-08-19 Picture processor

Country Status (1)

Country Link
JP (1) JPS6448573A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100511061B1 (en) * 2001-11-08 2005-08-30 캐논 가부시끼가이샤 Image display control apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100511061B1 (en) * 2001-11-08 2005-08-30 캐논 가부시끼가이샤 Image display control apparatus

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