JPS6442675U - - Google Patents
Info
- Publication number
- JPS6442675U JPS6442675U JP13796887U JP13796887U JPS6442675U JP S6442675 U JPS6442675 U JP S6442675U JP 13796887 U JP13796887 U JP 13796887U JP 13796887 U JP13796887 U JP 13796887U JP S6442675 U JPS6442675 U JP S6442675U
- Authority
- JP
- Japan
- Prior art keywords
- delay circuit
- gap interval
- ntsc
- secam
- video tape
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003111 delayed effect Effects 0.000 claims 1
- 230000010355 oscillation Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Television Signal Processing For Recording (AREA)
Description
第１図は本考案の多方式ビデオテープレコーダ
の再生系の概略ブロツク図、第２図はダブルアジ
マス３ヘツドの概略平面図、第３図はダブルアジ
マス４ヘツドの概略平面図である。
１……Ｒヘツド、２……Ｌ′ヘツド、３……Ｌ
ヘツド、４……Ｒ′ヘツド、５〜８……再生アン
プ、１０……第１切換スイツチ、１１……第２切
換スイツチ、１２……第３切換スイツチ、１４…
…第４切換スイツチ、１５……ｆ１発振回路、１
６……ｆ２発振回路、１７……輝度信号復調回路
、１８……クロマ信号復調回路、１９……混合回
路、２０……遅延回路。
FIG. 1 is a schematic block diagram of a reproduction system of a multi-system video tape recorder according to the present invention, FIG. 2 is a schematic plan view of a double azimuth three heads, and FIG. 3 is a schematic plan view of a double azimuth four heads. 1...R head, 2...L' head, 3...L
Head, 4...R' head, 5-8...Reproduction amplifier, 10...First changeover switch, 11...Second changeover switch, 12...Third changeover switch, 14...
...Fourth changeover switch, 15... f1 oscillation circuit, 1
6... f2 oscillation circuit, 17... Luminance signal demodulation circuit, 18... Chroma signal demodulation circuit, 19... Mixing circuit, 20... Delay circuit.
Claims (1)
Ｌ、ＳＥＣＡＭ等の多方式ＶＴＲにおいて、前記
ダブルアジマスヘツドのうち隣接するヘツド同士
のギヤツプ間隔をＰＡＬ方式もしくはＳＥＣＡＭ
方式に基いて設定し、ＮＴＳＣ方式で再生する時
、設定された前記ギヤツプ間隔とＮＴＳＣ方式に
よるギヤツプ間隔との差分を遅延回路によつて遅
延するとともに、この遅延回路の遅延量を当該遅
延回路に与えるクロツク信号の切換えによつて制
御するようになされたことを特徴とする多方式ビ
デオテープレコーダ。 NTSC, PA with double azimuth head
In multi-system VTRs such as L, SECAM, etc., the gap interval between adjacent heads of the double azimuth heads is set to PAL or SECAM.
When playing in the NTSC system, the difference between the set gap interval and the gap interval according to the NTSC system is delayed by a delay circuit, and the delay amount of this delay circuit is transmitted to the delay circuit. 1. A multi-system video tape recorder, characterized in that the multi-system video tape recorder is controlled by switching a clock signal applied thereto.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13796887U JPS6442675U (en) | 1987-09-09 | 1987-09-09 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13796887U JPS6442675U (en) | 1987-09-09 | 1987-09-09 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6442675U true JPS6442675U (en) | 1989-03-14 |
Family
ID=31399878
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13796887U Pending JPS6442675U (en) | 1987-09-09 | 1987-09-09 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6442675U (en) |
-
1987
- 1987-09-09 JP JP13796887U patent/JPS6442675U/ja active Pending
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