JPS643411B2 - - Google Patents
Info
- Publication number
- JPS643411B2 JPS643411B2 JP22637183A JP22637183A JPS643411B2 JP S643411 B2 JPS643411 B2 JP S643411B2 JP 22637183 A JP22637183 A JP 22637183A JP 22637183 A JP22637183 A JP 22637183A JP S643411 B2 JPS643411 B2 JP S643411B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- processor
- command signal
- transmission command
- wire
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000005540 biological transmission Effects 0.000 claims description 48
- 238000001514 detection method Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 5
- 238000006243 chemical reaction Methods 0.000 description 4
- 239000012530 fluid Substances 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 239000012141 concentrate Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B3/00—Line transmission systems
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
- Arrangements For Transmission Of Measured Signals (AREA)
Description
【発明の詳細な説明】
〔発明の属する技術分野〕
本発明は、信号の伝送と電力の供給とを共通の
２線伝送路を介して行なう２線式伝送器に関する
ものである。更に詳しくは、本発明は伝送端側に
マイクロプロセツサを有し、伝送すべき信号をこ
のマイクロプロセツサで信号処理し、２線伝送路
を介して受側端側に伝送するようにした２線式伝
送器に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of the Invention] The present invention relates to a two-wire transmitter that transmits signals and supplies power via a common two-wire transmission path. More specifically, the present invention has a microprocessor on the transmission end side, processes the signal to be transmitted by this microprocessor, and transmits it to the receiving end side via a two-wire transmission line. This relates to wire transmitters.
従来公知の２線式伝送器として、例えば特公昭
49−42936号公報に記載されているものがある。
As a conventionally known two-wire transmitter, for example,
There is one described in 49-42936.
この装置は、第１図ブロツク図に示すように、
負荷L0に流れる電流を調整する電流調整手段１
と、伝送すべき信号eiが印加され電流調整手段を
制御する電圧応答手段２と、負荷電流ILに応じた
電圧を得る帰還抵抗３と、この帰還抵抗に発生す
る電圧を電圧応答手段２の入力側に負帰還させる
帰還回路４とで構成されている。 As shown in the block diagram of FIG.
Current adjustment means 1 that adjusts the current flowing to load L 0
, a voltage response means 2 to which the signal e i to be transmitted is applied and controls the current adjustment means, a feedback resistor 3 that obtains a voltage according to the load current I L , and a voltage response means 2 that controls the voltage generated in this feedback resistor. It is comprised of a feedback circuit 4 that provides negative feedback to the input side of the circuit.
この様な構成の従来装置は、伝送すべき信号ei
に正確に対応する負荷電流ILを負荷L0に供給する
ことができるという特長があるが、伝送すべき信
号を他の別の信号で補正したが、所定の演算、例
えばリニアライズの為の演算や開平演算等を行な
うことはできず、このような演算を行なわせるに
は回路が更に複雑になるという欠点があつた。 The conventional device with this kind of configuration is capable of transmitting signals e i
It has the advantage of being able to supply the load L 0 with a load current I L that exactly corresponds to It is not possible to perform calculations, square root calculations, etc., and the disadvantage is that the circuit becomes even more complicated to perform such calculations.
本発明は、伝送器側において所定の演算を行な
うことができるようにするとともに、伝送端側よ
り受信端側において演算結果を必要な時だけ伝送
させることができるようにした、構成の簡単な２
線式伝送器を実現しようとするものである。
The present invention has two simple configurations that allow predetermined calculations to be performed on the transmitter side, and also allow calculation results to be transmitted from the transmission end side to the reception end side only when necessary.
This is an attempt to realize a wire transmitter.
本発明に係る装置は、伝送すべき信号をプロセ
ツサで信号処理し２線伝送路を介して伝送する装
置であつて、
前記２線伝送路を介して受信端側から送られて
くる伝送指令信号を検出するとともに、当該伝送
指令信号を前記プロセツサに読み込ませる伝送指
令信号読み込み手段を設け、
前記プロセツサは前記伝送指令信号を読み込ん
だ時信号処理した信号を前記２線伝送路を介して
所定の時間だけ受信端側に伝送させる動作をなす
ことを特徴とする。
The device according to the present invention is a device that processes a signal to be transmitted using a processor and transmits it via a two-wire transmission line, and the device processes a signal to be transmitted by a processor and transmits the signal through a two-wire transmission line, and the apparatus receives a transmission command signal sent from the receiving end side via the two-wire transmission line. A transmission command signal reading means is provided for detecting the transmission command signal and reading the transmission command signal into the processor, and when the processor reads the transmission command signal, the processor transmits the processed signal through the two-wire transmission line for a predetermined period of time. It is characterized in that it performs an operation of transmitting only the data to the receiving end side.
第２図は本発明に係る装置の一例を示す構成ブ
ロツク図である。この図において、は伝送端側
に設置された伝送器、は受信端側で、両者の間
は２線伝送路loを介して結ばれている。
FIG. 2 is a block diagram showing an example of a device according to the present invention. In this figure, is the transmitter installed at the transmission end, and is the reception end, and the two are connected via a two-wire transmission line L.sub.o.
伝送器において、１は２線伝送路loに流れる
電流を調整する電流調整手段、２は電流調整手段
１を制御するアンプ、３は負荷電流ILに応じた電
圧信号efを得る帰還抵抗で、これらは第１図に示
した従来装置のものと対応している。５は第１の
検出端６からの信号e1を入力するバツフアアン
プ、７は第２の検出端８からの信号e2を入力する
バツフアアンプ、９〜１３はいずれも比較器、１
４はマイクロプロセツサで、各比較器９〜１３か
らの信号を入力している。１５はプロセツサ１４
からのデイジタル信号をアナログ信号に変換する
Ｄ／Ａ変換器で、その出力端は各比較器９〜１３
の他方の入力端に接続されている。１６，１７は
プロセツサ１４からの信号によつて駆動されるス
イツチ、１８，１９はスイツチ１６，１７を介し
てＤ／Ａ変換器１５からの信号をホールドするア
ナログ信号保持回路である。アナログ信号保持回
路１８の出力端は、アンプ２の入力端に接続され
るとともに、比較器９の一方の入力端に接続され
ている。アナログ信号保持回路１９の出力端は、
伝送器に設けた出力端子２０に接続されてい
る。 In the transmitter, 1 is a current adjustment means for adjusting the current flowing through the two-wire transmission line L o , 2 is an amplifier that controls the current adjustment means 1, and 3 is a feedback resistor for obtaining a voltage signal e f according to the load current I L These correspond to those of the conventional device shown in FIG. 5 is a buffer amplifier that inputs the signal e 1 from the first detection terminal 6; 7 is a buffer amplifier that inputs the signal e 2 from the second detection terminal 8; 9 to 13 are all comparators;
4 is a microprocessor to which signals from each comparator 9-13 are input. 15 is the processor 14
A D/A converter that converts the digital signal from the
is connected to the other input end of the Switches 16 and 17 are driven by signals from the processor 14, and analog signal holding circuits 18 and 19 hold signals from the D/A converter 15 via the switches 16 and 17. The output terminal of the analog signal holding circuit 18 is connected to the input terminal of the amplifier 2 and also to one input terminal of the comparator 9. The output end of the analog signal holding circuit 19 is
It is connected to an output terminal 20 provided on the transmitter.
２１は本発明に係る装置において特徴としてい
る伝送指令信号読み込み手段で、２線伝送路loに
入力端が結合しており、伝送路loを介して受信端
側から送られてくる伝送指令信号を検出するとと
もに、この伝送指令信号をライン２２を介してプ
ロセツサ１４に読み込ませる役目をする。２３は
プロセツサ１４の割込み端子を示し、ここに伝送
指令信号が印加される。 Reference numeral 21 denotes a transmission command signal reading means, which is a feature of the device according to the present invention, and has an input end connected to a two-wire transmission line L o , and reads a transmission command signal sent from the receiving end side via the transmission line L o . It serves to detect the signal and read the transmission command signal to the processor 14 via line 22. Reference numeral 23 indicates an interrupt terminal of the processor 14, to which a transmission command signal is applied.
２４は演算定数等の設定手段で、つまみ２５に
よつて例えば手動により調整され、ここで得られ
た設定信号e3は、比較器１２の一方の入力端に印
加されている。なお、比較器１０，１１の一方の
入力端には、それぞれバツフアアンプ５，７の出
力信号が印加され、また、比較器１３の一方の入
力端には、帰還抵抗３に生ずる帰還信号efが印加
されている。 Reference numeral 24 denotes a setting means for arithmetic constants, etc., which is adjusted manually, for example, with a knob 25, and the setting signal e3 obtained here is applied to one input terminal of the comparator 12. Note that the output signals of the buffer amplifiers 5 and 7 are applied to one input terminal of the comparators 10 and 11, respectively, and the feedback signal e f generated in the feedback resistor 3 is applied to one input terminal of the comparator 13. is being applied.
２６は抵抗２７を介して、２線伝送路loに接続
されたツエナーダイオードで、この両端に定電圧
を得る。伝送器を構成する各回路は、この定電
圧が供給されて動作する。 26 is a Zener diode connected to the two-wire transmission line LO via a resistor 27, and a constant voltage is obtained across the Zener diode. Each circuit making up the transmitter operates by being supplied with this constant voltage.
受信端において、STは２線伝送路loに伝送
指令信号を印加する回路、BTは直流電源、L0は
負荷で、これらは２線伝送路loに対して直列に接
続されている。なお、負荷L0及び伝送指令信号
印加回路STは、図示してない例えば上位の計算
機に結合されている。 At the receiving end, ST is a circuit that applies a transmission command signal to the two-wire transmission line L0 , BT is a DC power supply, and L0 is a load, which are connected in series to the two-wire transmission line L0 . Note that the load L 0 and the transmission command signal application circuit ST are coupled to, for example, a host computer (not shown).
この様に構成した装置の動作を次に説明する。
受信端側からは、２線伝送路loを介して、例え
ば4mA〜20mAの電流が常時供給されており、こ
こには受信端側から、第３図に示すように、必要
に応じて信号レベルが一時的に低下する伝送指令
信号eSTを伝送させる。 The operation of the apparatus configured in this way will be explained next.
A current of, for example, 4 mA to 20 mA is constantly supplied from the receiving end via a two-wire transmission line L o , and as shown in Figure 3, a signal is transmitted from the receiving end as necessary. A transmission command signal eST whose level temporarily decreases is transmitted.
伝送器は、常時、次のような信号処理を行な
つている。すなわち、はじめに、プロセツサ１４
は、第１の検出端６からの信号e1をバツフアアン
プ５及び比較器１０を介して読み込み、これを比
較器１０、プロセツサ１４、Ｄ／Ａ変換器１５で
形成されるＡ／Ｄ変換ループでデイジタル信号に
変換する。同じように第２の検出端８からの信号
e2、設定手段２４からの信号e3についてもこれを
デイジタル信号にそれぞれ変換する。次にプロセ
ツサは、これらのデイジタル信号を利用して補正
演算や、リニアライズのための演算等、所定の演
算を行なう。どのような演算を行なうかは、検出
端６，８等によつて決定される。例えば、第１の
検出端が流量に応じた圧力差を検出する圧力検出
器であり、その出力信号e1が被測定流体の温度に
よつても影響を受ける場合、第２の検出端８は、
被測定流体の温度を検出する温度検出器であつ
て、プロセツサは圧力信号e1を温度信号e2によつ
て温度の影響を受けないような信号にするために
補正演算を行なうとともに、圧力信号e1から流量
信号にするための開平演算及び、4mA〜20mAに
変換するための変換演算等を行なうこととなる。
また、必要に応じて被測定流体の流量の制御する
ためのPID演算も行なわれる。 The transmitter always performs the following signal processing. That is, first, the processor 14
reads the signal e1 from the first detection end 6 via the buffer amplifier 5 and comparator 10, and converts it into an A/D conversion loop formed by the comparator 10, processor 14, and D/A converter 15. Convert to digital signal. Similarly, the signal from the second detection end 8
The signal e 2 and the signal e 3 from the setting means 24 are also converted into digital signals. Next, the processor uses these digital signals to perform predetermined calculations such as correction calculations and linearization calculations. The type of calculation to be performed is determined by the detection ends 6, 8, etc. For example, if the first detection end is a pressure detector that detects a pressure difference depending on the flow rate, and its output signal e1 is also affected by the temperature of the fluid to be measured, the second detection end 8 is ,
This is a temperature sensor that detects the temperature of a fluid to be measured, and the processor performs correction calculations to make the pressure signal e1 into a signal that is not affected by temperature by the temperature signal e2 , and also performs correction calculations on the pressure signal e1. Square root calculation to convert e 1 into a flow rate signal, conversion calculation to convert from 4 mA to 20 mA, etc. will be performed.
PID calculations are also performed to control the flow rate of the fluid to be measured, if necessary.
この演算結果は、スイツチ１７をオンとし、ア
ナログ信号保持回路１９を介して端子２０から例
えばバルブ等のアクチユエータに出力されるもの
で、この伝送器は、必要に応じて伝送端に設置
した調節計としても動作する。 The result of this calculation is outputted from the terminal 20 via the analog signal holding circuit 19 to an actuator such as a valve by turning on the switch 17. It also works as .
いま、伝送路loを介して受信端側から、伝送
指令信号eSTを伝送させると、伝送器におい
て、伝送指令信号読み込み手段２１はこれを検出
し、プロセツサ１４の割込み端子２３に印加させ
る。 Now, when the transmission command signal eST is transmitted from the receiving end side via the transmission line L o , the transmission command signal reading means 21 in the transmitter detects this and applies it to the interrupt terminal 23 of the processor 14 .
プロセツサ１４は、この伝送指令信号eSTを読
み込むと、スイツチ１６をオンとし、演算結果を
アナログ信号保持手段１８に出力させ、アンプ２
を介して電流調整手段１を制御し、２線伝送路lo
に流れる電流ILを調整する。この負荷電流ILは、
帰還抵抗３によつて検出され、負荷電流ILに対応
した電圧efがライン４、比較器１３を介してプロ
セツサ１４に読み込まれ、Ａ／Ｄ変換されて前述
した演算結果と比較され、負荷電流ILが伝送すべ
き演算結果と正確に対応するように制御される。 When the processor 14 reads this transmission command signal eST, it turns on the switch 16, outputs the calculation result to the analog signal holding means 18, and outputs the calculation result to the amplifier 2.
to control the current regulating means 1 through the two-wire transmission line l o
Adjust the current I L flowing through the This load current I L is
The voltage e f detected by the feedback resistor 3 and corresponding to the load current I L is read into the processor 14 via the line 4 and the comparator 13, A/D converted, and compared with the above calculation result. The current I L is controlled so as to accurately correspond to the calculation result to be transmitted.
この様な演算結果の伝送は、伝送指令信号eST
を読み込んでから、所定の時間tSだけ行なわれ、
以後、プロセツサはスイツチ１６を一定間隔tB
ごとにオンとし、負荷電流ILの値が例えば4mAと
なるような出力e0を、アナログ信号保持手段１８
に出力させる動作を行なう。この時、アナログ信
号保持手段１８の出力e0や、負荷電流ILは、ライ
ン２６やライン４を介してプロセツサ１４に帰還
される。また、信号e1，e2，e3のＡ／Ｄ変換動作
や、これらのデイジタル値を用いての所定の演
算、出力端子２０への演算結果の出力動作を行な
う。 Transmission of such calculation results is performed using the transmission command signal eST.
is executed for a predetermined time tS after reading,
After that, the processor switches the switch 16 at regular intervals tB.
The analog signal holding means 18
Perform the operation to output the output. At this time, the output e 0 of the analog signal holding means 18 and the load current I L are fed back to the processor 14 via the line 26 and the line 4. It also performs A/D conversion of the signals e 1 , e 2 , and e 3 , performs predetermined calculations using these digital values, and outputs the calculation results to the output terminal 20 .
この様に構成した装置によれば、伝送端側にお
いて、各種の補正演算やリニアライズのための演
算を行なうことができ、また、伝送端側から、受
信端に設置した上位計算機が要求する時だけ演算
結果を伝送することができるもので、上位計算機
は、伝送された演算結果を利用した更に高度の仕
事に専念することが可能となる。 According to the device configured in this way, various correction calculations and calculations for linearization can be performed on the transmission end side, and when requested by the host computer installed at the reception end from the transmission end side. This allows the higher-level computer to concentrate on higher-level tasks that utilize the transmitted results.
なお、上記の実施例においては、各信号e0，
e1，e2，e3及びefをいずれも各比較器９〜１３の
一方の入力端に印加させる構成としたものである
が、各比較器をひとつの比較器で共用し、各信号
をマルチプレクサによつて選択し、その選択した
信号を、比較器の一方の入力端に印加させてもよ
い。また、ここでは、比較器、プロセツサ、Ｄ／
Ａ変換器を含むループでＡ／Ｄ変換動作を行なう
ものであるが、プロセツサの入力側にＡ／Ｄ変換
器を設け、ここで変換されたデイジタル信号をプ
ロセツサに入力させるようにしてもよい。また、
演算定数設定手段２４は、ひと組のみ設けたが、
複数個設け、複数個の演算定数設定が行なえるよ
うにしてもよい。 Note that in the above embodiment, each signal e 0 ,
The configuration is such that e 1 , e 2 , e 3 and e f are all applied to one input terminal of each comparator 9 to 13, but each comparator is shared by one comparator, and each signal may be selected by a multiplexer and the selected signal may be applied to one input of the comparator. Also, here, the comparator, processor, D/
Although the A/D conversion operation is performed in a loop including an A converter, an A/D converter may be provided on the input side of the processor, and the digital signal converted there may be input to the processor. Also,
Although only one set of calculation constant setting means 24 was provided,
A plurality of them may be provided so that a plurality of calculation constants can be set.
以上説明したように、本発明に係る装置によれ
ば、簡単な構成で、伝送器側より所定の演算処理
を行なつた信号を、受信端側からの指令信号によ
つて伝送させることができる。
As explained above, according to the device according to the present invention, with a simple configuration, a signal that has undergone predetermined arithmetic processing from the transmitter side can be transmitted in response to a command signal from the receiving end side. .
第１図は従来装置の一例を示す構成ブロツク
図、第２図は本発明に係る装置の一例を示す構成
ブロツク図、第３図は第２図装置の動作を説明す
るための動作波形図である。
……伝送器、……受信端、lo……２線伝送
路、１４……マイクロプロセツサ、２１……伝送
指令信号読み込み手段。
FIG. 1 is a block diagram showing an example of a conventional device, FIG. 2 is a block diagram showing an example of a device according to the present invention, and FIG. 3 is an operating waveform diagram for explaining the operation of the device shown in FIG. be. ...transmitter, ...reception end, l o ...two-wire transmission line, 14 ...microprocessor, 21 ...transmission command signal reading means.
Claims (1)
線伝送路を介して伝送する装置であつて、 前記２線伝送路を介して受信端側から送られて
くる伝送指令信号を検出するとともに当該伝送指
令信号を前記プロセツサに読み込ませる伝送指令
信号読み込み手段を設け、 前記プロセツサは前記伝送指令信号を読み込ん
だ時信号処理した信号を前記２線伝送路を介して
所定の時間だけ受信端側に伝送させる動作をなす
ことを特徴とする２線式伝送器。[Claims] 1. Signal processing of the signal to be transmitted by a processor; 2.
A transmission command signal reading device that transmits data via a two-wire transmission line, which detects a transmission command signal sent from a receiving end via the two-wire transmission line and reads the transmission command signal into the processor. 2-wire transmission, characterized in that the processor is operable to transmit the processed signal to the receiving end side for a predetermined period of time via the 2-wire transmission path when reading the transmission command signal. vessel.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22637183A JPS60119139A (en) | 1983-11-30 | 1983-11-30 | Two-wire transmission unit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22637183A JPS60119139A (en) | 1983-11-30 | 1983-11-30 | Two-wire transmission unit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60119139A JPS60119139A (en) | 1985-06-26 |
| JPS643411B2 true JPS643411B2 (en) | 1989-01-20 |
Family
ID=16844085
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP22637183A Granted JPS60119139A (en) | 1983-11-30 | 1983-11-30 | Two-wire transmission unit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60119139A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07113584B2 (en) * | 1986-12-26 | 1995-12-06 | 三井東圧化学株式会社 | 2-wire temperature converter |
| JP5144559B2 (en) * | 2008-08-29 | 2013-02-13 | セイコーインスツル株式会社 | Two-terminal type semiconductor temperature sensor |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CA1173927A (en) * | 1981-11-02 | 1984-09-04 | Felix J. Houvig | Communication system and method |
-
1983
- 1983-11-30 JP JP22637183A patent/JPS60119139A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60119139A (en) | 1985-06-26 |
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