JPS6433753U - - Google Patents
Info
- Publication number
- JPS6433753U JPS6433753U JP12870987U JP12870987U JPS6433753U JP S6433753 U JPS6433753 U JP S6433753U JP 12870987 U JP12870987 U JP 12870987U JP 12870987 U JP12870987 U JP 12870987U JP S6433753 U JPS6433753 U JP S6433753U
- Authority
- JP
- Japan
- Prior art keywords
- short
- conductive pattern
- insulating substrate
- flat package
- pins
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Lead Frames For Integrated Circuits (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12870987U JPS6433753U (fr) | 1987-08-25 | 1987-08-25 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12870987U JPS6433753U (fr) | 1987-08-25 | 1987-08-25 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6433753U true JPS6433753U (fr) | 1989-03-02 |
Family
ID=31382302
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12870987U Pending JPS6433753U (fr) | 1987-08-25 | 1987-08-25 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6433753U (fr) |
-
1987
- 1987-08-25 JP JP12870987U patent/JPS6433753U/ja active Pending