JPS64270U - - Google Patents
Info
- Publication number
- JPS64270U JPS64270U JP1987094315U JP9431587U JPS64270U JP S64270 U JPS64270 U JP S64270U JP 1987094315 U JP1987094315 U JP 1987094315U JP 9431587 U JP9431587 U JP 9431587U JP S64270 U JPS64270 U JP S64270U
- Authority
- JP
- Japan
- Prior art keywords
- terminals
- board
- attached
- embedded
- utility
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Multi-Conductor Connections (AREA)
- Connections Arranged To Contact A Plurality Of Conductors (AREA)
Description
図面はこの考案の一実施例を説明するための図
であり、第１図は要部の斜視図、第２図は端子に
接続される回路の構成図である。
１……基板本体、２ａ〜２ｉ……端子、３……
端子台、４……ｂ接点、５……ａ接点、６……ト
ランジスタ回路、７……シヨートソケツト（接続
部材）。
The drawings are diagrams for explaining one embodiment of this invention, with FIG. 1 being a perspective view of the main parts, and FIG. 2 being a configuration diagram of a circuit connected to the terminals. 1... Board body, 2a to 2i... Terminals, 3...
Terminal block, 4... B contact, 5... A contact, 6... Transistor circuit, 7... Short socket (connection member).
Claims (1)
する接続部材を着脱自在に取り付けてなることを
特徴とする出力端子用の基板。[Claims for Utility Model Registration] A plurality of terminals are embedded in the board body, an electric circuit is connected to each of the terminals, and a connecting member for selectively connecting the terminals is detachably attached between the terminals. A board for output terminals, characterized in that it is attached to.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987094315U JPS64270U (en) | 1987-06-19 | 1987-06-19 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987094315U JPS64270U (en) | 1987-06-19 | 1987-06-19 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS64270U true JPS64270U (en) | 1989-01-05 |
Family
ID=30957652
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987094315U Pending JPS64270U (en) | 1987-06-19 | 1987-06-19 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS64270U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5214989B2 (en) * | 1971-12-29 | 1977-04-26 | ||
| JPS59119686A (en) * | 1982-12-25 | 1984-07-10 | 富士通株式会社 | Matrix board |
-
1987
- 1987-06-19 JP JP1987094315U patent/JPS64270U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5214989B2 (en) * | 1971-12-29 | 1977-04-26 | ||
| JPS59119686A (en) * | 1982-12-25 | 1984-07-10 | 富士通株式会社 | Matrix board |