JPS6426826U - - Google Patents
Info
- Publication number
- JPS6426826U JPS6426826U JP12274587U JP12274587U JPS6426826U JP S6426826 U JPS6426826 U JP S6426826U JP 12274587 U JP12274587 U JP 12274587U JP 12274587 U JP12274587 U JP 12274587U JP S6426826 U JPS6426826 U JP S6426826U
- Authority
- JP
- Japan
- Prior art keywords
- electronic component
- thickness
- melting point
- low melting
- lead terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000002184 metal Substances 0.000 claims 4
- 230000008018 melting Effects 0.000 claims 3
- 238000002844 melting Methods 0.000 claims 3
- 239000012212 insulator Substances 0.000 claims 1
- 229910000679 solder Inorganic materials 0.000 description 8
- 238000007747 plating Methods 0.000 description 5
- 239000011347 resin Substances 0.000 description 3
- 229920005989 resin Polymers 0.000 description 3
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
Landscapes
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
Description
第１図ａおよびｂはそれぞれ本考案の一実施例
を示す破断斜視図及び断面図であり樹脂外装２の
内部のはんだめつき端子３ａ，３ｂを外装樹脂よ
り突出しているリード端子面のめつき厚さと段差
を付けた図である。第２図ａおよびｂは従来品の
斜視図および断面図、第３図ａおよびｂは端子面
３ｂの表面よりはんだめつきを取り除き銀メツキ
を施した物の破断斜視図および断面図、第４図は
本考案に関する、はんだめつき厚とはんだ玉発生
率の関係を示すグラフである。第５図は本考案に
関する、はんだめつき厚と接合面のはんだ喰れ発
生率の関係を示すグラフである。第６図は本考案
に関する、はんだめつき厚とはんだぬれ性の関係
を示すグラフである。
１……コンデンサ素子、２……外装樹脂、３…
…端子、３ａ……上部端子面、３ｂ……素子との
接合する端子面、４……はんだ玉、５……導電性
接着剤、５ｂ……銀メツキ。
Figures 1a and 1b are a cut away perspective view and a cross-sectional view, respectively, showing an embodiment of the present invention, in which solder-plated terminals 3a and 3b inside the resin sheath 2 are connected to the lead terminal surface protruding from the sheath resin. It is a diagram showing the thickness and level difference. Figures 2a and b are a perspective view and a sectional view of a conventional product, Figures 3a and b are a broken perspective view and a sectional view of a product in which solder has been removed from the surface of the terminal surface 3b and silver plating has been applied. FIG. 4 is a graph showing the relationship between solder plating thickness and solder ball generation rate according to the present invention. FIG. 5 is a graph showing the relationship between the solder plating thickness and the incidence of solder erosion on the joint surface, according to the present invention. FIG. 6 is a graph showing the relationship between solder plating thickness and solder wettability regarding the present invention. 1...Capacitor element, 2...Exterior resin, 3...
...Terminal, 3a... Upper terminal surface, 3b... Terminal surface to be joined to the element, 4... Solder ball, 5... Conductive adhesive, 5b... Silver plating.
Claims (1)
ド端子を有する電子部品素子を絶縁体で外装を施
した電子部品において、電子部品素子と接合し、
かつ外装の内部に位置するリード端子の低融点金
属の厚さを２μｍ以下としかつ外装の外部の少な
くとも一部のリード端子表面の低融点金属の厚さ
を４μｍ以上とする、厚みに段差をもつ端子構造
を有するチツプ型電子部品。 In an electronic component in which an electronic component element having a lead terminal formed by applying a low melting point metal to the surface of a metal plate is sheathed with an insulator, the electronic component element is joined to the electronic component element,
And the thickness of the low melting point metal of the lead terminal located inside the exterior is 2 μm or less, and the thickness of the low melting point metal on the surface of at least a part of the lead terminal outside the exterior is 4 μm or more, and there is a step in the thickness. A chip-type electronic component with a terminal structure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12274587U JPH0528752Y2 (en) | 1987-08-10 | 1987-08-10 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12274587U JPH0528752Y2 (en) | 1987-08-10 | 1987-08-10 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6426826U true JPS6426826U (en) | 1989-02-15 |
| JPH0528752Y2 JPH0528752Y2 (en) | 1993-07-23 |
Family
ID=31370961
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12274587U Expired - Lifetime JPH0528752Y2 (en) | 1987-08-10 | 1987-08-10 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0528752Y2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08153651A (en) * | 1994-11-25 | 1996-06-11 | Nec Corp | Manufacture of chip-type electronic part |
| US7212334B2 (en) | 2003-04-15 | 2007-05-01 | Fujitsu Limited | Optical signal-to-noise ratio improving device |
-
1987
- 1987-08-10 JP JP12274587U patent/JPH0528752Y2/ja not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08153651A (en) * | 1994-11-25 | 1996-06-11 | Nec Corp | Manufacture of chip-type electronic part |
| US7212334B2 (en) | 2003-04-15 | 2007-05-01 | Fujitsu Limited | Optical signal-to-noise ratio improving device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0528752Y2 (en) | 1993-07-23 |
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