JPS6423115A - Encoder origin setting device - Google Patents

Encoder origin setting device

Info

Publication number
JPS6423115A
JPS6423115A JP17943887A JP17943887A JPS6423115A JP S6423115 A JPS6423115 A JP S6423115A JP 17943887 A JP17943887 A JP 17943887A JP 17943887 A JP17943887 A JP 17943887A JP S6423115 A JPS6423115 A JP S6423115A
Authority
JP
Japan
Prior art keywords
origin
signal
phase
encoder
setting device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17943887A
Other languages
Japanese (ja)
Inventor
Akihiro Kumazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP17943887A priority Critical patent/JPS6423115A/en
Publication of JPS6423115A publication Critical patent/JPS6423115A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To obtain a method by which an origin is easily and accurately sets by synthesizing the counter values of A, B, and C phases of an encoder and a latch memory together to obtain an origin. CONSTITUTION:While A-phase and B-phase signals generated by the incremental type encoder 1 are sent to an AND element through a counter 2, a signal sent by a signal quantity setting device 5 is inputted to the latch memory 4. Here, the arrival at a machine origin is stored and when the signals sent from the counter 2 match with the signal quantity set by the signal quantity setting device 3, an origin signal is sent to the AND element, which generates its output when the A-phase, B-phase, C-phase, and origin signal are all inputted from the encoder 1. Consequently, even if the respective phases of the encoder 1 and the external origin signal do not match mechanically, the origin is easily set by the latch memory 4 connecting them and the counter 2.
JP17943887A 1987-07-17 1987-07-17 Encoder origin setting device Pending JPS6423115A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17943887A JPS6423115A (en) 1987-07-17 1987-07-17 Encoder origin setting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17943887A JPS6423115A (en) 1987-07-17 1987-07-17 Encoder origin setting device

Publications (1)

Publication Number Publication Date
JPS6423115A true JPS6423115A (en) 1989-01-25

Family

ID=16065866

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17943887A Pending JPS6423115A (en) 1987-07-17 1987-07-17 Encoder origin setting device

Country Status (1)

Country Link
JP (1) JPS6423115A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03119717U (en) * 1990-03-19 1991-12-10

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03119717U (en) * 1990-03-19 1991-12-10

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