JPS6420462A - Repair supporting device for substrate - Google Patents

Repair supporting device for substrate

Info

Publication number
JPS6420462A
JPS6420462A JP62176227A JP17622787A JPS6420462A JP S6420462 A JPS6420462 A JP S6420462A JP 62176227 A JP62176227 A JP 62176227A JP 17622787 A JP17622787 A JP 17622787A JP S6420462 A JPS6420462 A JP S6420462A
Authority
JP
Japan
Prior art keywords
data
substrate
file
cause
repair
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62176227A
Other languages
Japanese (ja)
Inventor
Akihide Hara
Takeshi Kamogawa
Yoshiaki Goto
Hiroaki Unno
Shu Yamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP62176227A priority Critical patent/JPS6420462A/en
Publication of JPS6420462A publication Critical patent/JPS6420462A/en
Pending legal-status Critical Current

Links

Landscapes

  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)

Abstract

PURPOSE:To quickly and surely execute an inspection and a repair without having a technical knowledge, by converting the cause to an abnormal operation of a circuit board, and the inspecting work contents of the circuit board, etc., to a data base. CONSTITUTION:A data of a substrate which is designed by a CAD 1 of a design and manufacture department A is stored in a substrate drawing data file 6, a parts characteristic data file 7, and a circuit characteristic data file 8, of a knowledge data generating means 5. A data base generating means 9 analyzes the cause to an abnormal operation of the substrate from the stored contents of the files 6, 7 and 8, generates an abnormality counter-measure data and stores its in a file 10. A repair data generating part 20 of a service department B reads out the contents of the file 10, executes weighting in accordance with the cause of a high frequency, etc., edits them to a repair data of the smallest number of data and stores it in a file 23. In case of executing a substrate inspection in a customer C, when a kind of the substrate is inputted, an inspecting method, the cause to its result, a countermeasure, etc., are displayed 33.
JP62176227A 1987-07-15 1987-07-15 Repair supporting device for substrate Pending JPS6420462A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62176227A JPS6420462A (en) 1987-07-15 1987-07-15 Repair supporting device for substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62176227A JPS6420462A (en) 1987-07-15 1987-07-15 Repair supporting device for substrate

Publications (1)

Publication Number Publication Date
JPS6420462A true JPS6420462A (en) 1989-01-24

Family

ID=16009853

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62176227A Pending JPS6420462A (en) 1987-07-15 1987-07-15 Repair supporting device for substrate

Country Status (1)

Country Link
JP (1) JPS6420462A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0535772A (en) * 1991-07-25 1993-02-12 Nec Corp Parallel execution method
JP2008292467A (en) * 2007-04-13 2008-12-04 Yogitech Spa Method and computer program product for executing failure mode and effect analysis of integrated circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0535772A (en) * 1991-07-25 1993-02-12 Nec Corp Parallel execution method
JP2008292467A (en) * 2007-04-13 2008-12-04 Yogitech Spa Method and computer program product for executing failure mode and effect analysis of integrated circuit

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