JPS6416669U - - Google Patents

Description

[Brief explanation of drawings]

1 and 2 relate to an embodiment of the present invention; FIG. 1 is a sectional view of a multilayer board with a built-in capacitor of the embodiment, and FIG. 2 is an equivalent circuit diagram of the multilayer board of FIG. 1. 3 and 4 relate to conventional examples,
FIG. 3 is a sectional view of a conventional multilayer board, and FIG. 4 is an equivalent circuit diagram of the multilayer board of FIG. In the figure, symbols 21 to 26...substrate, 27 to 29...dielectric, 31 to 33...one capacitor electrode, 38, 39, 41...other capacitor electrode, 34, 35...via hole, 36
, 37... conductor.

Claims (1)

[Claims for Utility Model Registration] A utility model consisting of a plurality of substrates stacked in layers, with a dielectric inserted at a proper position inside the stacked substrates, and facing both sides of the dielectric in the stacking direction of the substrates. In a multilayer substrate with a built-in capacitor in which a pair of capacitor electrodes are formed, a via hole with a conductor provided inside is formed in the stacking direction of each substrate, and on the back side of the via hole, At least one of the pair of capacitor electrodes is formed as a buried capacitor electrode connected to the conductor, and on the surface of the substrate, the buried capacitor electrodes are connected to each other via the conductor. Alternatively, a connection pattern is formed to connect the buried capacitor electrode and the capacitor electrode on the surface of the substrate, and by changing the connection relationship of the connection pattern, the capacitance of the capacitor constituted by the dielectric and the capacitor electrode is increased. A multilayer board with a built-in capacitor characterized by a variable value.