JPS6413796U - - Google Patents

Info

Publication number
JPS6413796U
JPS6413796U JP1987108644U JP10864487U JPS6413796U JP S6413796 U JPS6413796 U JP S6413796U JP 1987108644 U JP1987108644 U JP 1987108644U JP 10864487 U JP10864487 U JP 10864487U JP S6413796 U JPS6413796 U JP S6413796U
Authority
JP
Japan
Prior art keywords
electronic circuit
sealing resin
shield
circuit board
package
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1987108644U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987108644U priority Critical patent/JPS6413796U/ja
Publication of JPS6413796U publication Critical patent/JPS6413796U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
JP1987108644U 1987-07-15 1987-07-15 Pending JPS6413796U (US07413550-20080819-C00001.png)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987108644U JPS6413796U (US07413550-20080819-C00001.png) 1987-07-15 1987-07-15

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987108644U JPS6413796U (US07413550-20080819-C00001.png) 1987-07-15 1987-07-15

Publications (1)

Publication Number Publication Date
JPS6413796U true JPS6413796U (US07413550-20080819-C00001.png) 1989-01-24

Family

ID=31344171

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987108644U Pending JPS6413796U (US07413550-20080819-C00001.png) 1987-07-15 1987-07-15

Country Status (1)

Country Link
JP (1) JPS6413796U (US07413550-20080819-C00001.png)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017199752A (ja) * 2016-04-26 2017-11-02 ローム株式会社 パワーモジュールおよびその製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017199752A (ja) * 2016-04-26 2017-11-02 ローム株式会社 パワーモジュールおよびその製造方法

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