JPS6413568U - - Google Patents
Info
- Publication number
- JPS6413568U JPS6413568U JP6731887U JP6731887U JPS6413568U JP S6413568 U JPS6413568 U JP S6413568U JP 6731887 U JP6731887 U JP 6731887U JP 6731887 U JP6731887 U JP 6731887U JP S6413568 U JPS6413568 U JP S6413568U
- Authority
- JP
- Japan
- Prior art keywords
- memories
- control circuit
- control
- circuit
- address counter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000015654 memory Effects 0.000 claims description 7
- 230000004044 response Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Image Input (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6731887U JPS6413568U (no) | 1987-05-01 | 1987-05-01 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6731887U JPS6413568U (no) | 1987-05-01 | 1987-05-01 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6413568U true JPS6413568U (no) | 1989-01-24 |
Family
ID=31292690
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6731887U Pending JPS6413568U (no) | 1987-05-01 | 1987-05-01 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6413568U (no) |
-
1987
- 1987-05-01 JP JP6731887U patent/JPS6413568U/ja active Pending