JPS6398283A - Redundancy suppressing coding system - Google Patents

Abstract

PURPOSE:To efficiently perform the suppression concerning main and sub- scanning directions by compressing with a run-length coding once over a (l) line of a sub-scanning direction concerning the zero block of a variable length in a main scanning direction to the data of N bits, M pieces and an (l) line and block-coding to respective rows of N X mj X l rows concerning the non- zero block of a fixed length. CONSTITUTION:One element of one row is an N bit, M pieces of it are longitudinally arranged, one line is constituted and an (l) line is simultaneously inputted. An M number of multivalue data in one line is divided with mj pieces (j=1-K) and the division is executed to all (l) lines. The block is executed on the division. At that case, when '1' appears at the bit of either of N X m1 X l row and one column, the zero block (block including '0') of the N X m1 X l row of the variable length is segmented in the main scanning direction. When the block is interrupted, the non-zero block of the fixed length is segmented from next in the main scanning direction. Concerning the former, a run-length coding is executed and concerning the latter, a prescribed block code is assigned for one row. When the above-mentioned operation is successively repeated and mk is completed, a next (l) line is inputted.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention is directed to the redundancy of a binary multilevel signal over multiple lines, such as color binary multilevel dithered image data read using a rask scan method. The present invention relates to a redundancy suppression coding method.

[Prior Art] In a redundancy suppression coding method for binary signals such as binary image data, it is necessary to obtain a signal sequence with greater bias in statistical properties than the original element sequence, and to A major challenge is to obtain a high compression ratio by simply encoding the obtained signal sequence.

This is because in a signal sequence with large statistical bias, the length of consecutive sequences having the same logical value becomes longer, so if run-length encoding is performed, for example, so-called entropy is reduced and an extremely high compression ratio can be obtained.

However, encoding methods in the field of image communications, especially facsimile communications, such as MH (Modified Huffman) encoding, MR (Modified READ) encoding, and MMR (Modified, Modified READ) encoding recommended by CCITT, are Not only facsimile,
It is well known that these encoding methods are also used for electronic files, etc., but these encoding methods focus on the fact that document information such as characters inherently has many "white" runs, and are used to encode such image data. This is based on the premise of transmission. On the other hand, in addition to general document images, binary images such as halftone images such as photographs may be pseudo halftone images that are binarized using a dither method or the like. However, since pseudo-halftone images produce gradation using the area gradation method, their nature makes it difficult to print dots (“
black") will be dispersed. In other words, the pseudo-halftone image will be
This results in an increase in the "run length" which is shorter than the original halftone image, which is inconvenient for encoding if left as is.

This situation is explained in Figures 2 (a) to (C) and Figures 3 (a) and (b) for a four-value dither as an example of a binary multi-value dither.
). The matrices of FIGS. 2(a) and 2(b) represent threshold matrices, particularly dot-concentrated dither matrices. Figure (C) shows dots (pixels) and data (2-bit pulse width modulation) in a 4-value dither.
It shows the relationship between The solid line in Figure 3(a) is the same as in Figure 2(
The threshold change in the first row of b) is shown. When a halftone image like the dotted line in the figure is input to such a threshold, the third
Pseudo halftone image data having a discrete distribution as shown in Figure (b) is obtained. If "white" and "black" become disjointed in this way, the compression rate will decrease in run-length encoding, which requires no explanation.Also, when performing MH encoding etc. on such pseudo-halftone images, If this is done, not only is it not possible to achieve highly efficient suppression, but the amount of data may even increase.

Conventionally, a pit interleaving method has been known as a means to solve the above problem. In the pit interleaving method, pixels corresponding to threshold values that are close to each other are grouped and converted into multi-line pit patterns, or pixels with the same threshold are grouped and converted into multi-line bit patterns, and each Although MH encoding is performed on the bit pattern, significant efficiency improvements cannot be expected.

On the other hand, compared to the above-mentioned black and white images, the amount of information in color images is enormous, 3 to 4 times larger, and recently, due to commercialization, the information per pixel has also tended to become binary and multivalued. be. Therefore, it is not the white/black image ratio that requires a highly efficient redundancy reduction coding scheme to transmit or store this information. However, there is currently no effective redundancy suppression coding method for color image information, and a combination of the conventional methods for black and white images described above, that is, pit interleaving, MH coding, etc., are performed on image data of each color. The reality is that this situation does not allow for much improvement in efficiency.

[Problems to be Solved by the Invention] The above-mentioned problems in particular with color image data are not limited to this, but can also occur with a plurality of binary multi-value data sequences that occur simultaneously. In particular, in the case of color image data read using raster scan method, etc.
Since this is also correlated with the sub-scanning direction, compression in the sub-scanning direction also emerges as an extremely important issue.

Therefore, the present invention was made in view of the drawbacks of the above-mentioned conventional example, and its purpose is to improve the redundancy of a plurality of binary multivalued data strings.
The object of the present invention is to propose a redundancy suppression coding method that efficiently suppresses redundancy in the main scanning direction and the sub-scanning direction.

[Means for solving the problems] The configuration of the present invention for realizing the above problems consists of one element or N
an input section for arranging M binary multi-value data strings of bits and inputting the M binary multi-value data strings line by line in the sub-scanning direction; I 1m
a r...mj,...mm), and the divided data strings of mj After checking the bit values of the data, two variable-length zero blocks with NXmjXI rows and a fixed-length non-zero block with Nxmjx1 rows that includes at least one "1" bit and has a fixed length in the row direction. a run-length encoding unit that converts the variable-length zero block of N x m j x and Q rows into a run-length code by run-length coding; a block encoding unit that performs predetermined encoding on each row of the long non-zero block, and each time the input unit inputs a line,
and a combining unit that combines the run-length code and the predetermined encoded code for all m3 rows in a predetermined order and outputs the result.

Another configuration of the present invention includes an input section for arranging M binary multi-value data strings each having N bits, and manually inputting the M binary multi-value data strings one line at a time in the sub-scanning direction; The elements are interleaved with a predetermined width for rows and lines to obtain a first bit data string in which one line has N rows and A preprocessing unit converts the data so that the value is '1'' and no change is 0'', and one line is connected to the preprocessing unit to obtain a data string of N bits x M bits. A block cutting unit which inputs M second dot data strings as M binary multi-value data strings of N-bit multi-value one line at a time, m
1, m2. . . .mj, . After examining the bit value of , communicate the variable-length zero blocks of Nxmjxu rows that contain only "0" bits in both column and row data and have variable lengths in the row direction, and a block cutting unit that cuts out a fixed length non-zero block of Nxmjx,Q rows including at least one bit of 1'' and having a fixed length in the row direction;
A run-length encoding unit converts the m, IX, and Q rows of variable-length zero blocks into run-length codes by run-length encoding, and performs predetermined encoding on each row of the fixed-length non-zero blocks. It has a block encoding unit and a combining unit that combines the run-length code and the predetermined encoded code in a predetermined order for all m3 rows each time the input unit inputs a line and outputs the result.

[Operation] According to one of the redundancy suppression methods according to the present invention having the above configuration,
Zero blocks with a variable length in the main scanning direction are compressed by length encoding across the line in the sub-scanning direction, and non-zero blocks with a fixed length are compressed by Nx
It is compressed by performing predetermined block encoding on each line of the mjx sentence line.

According to another configuration of the present invention, the preprocessing increases the run length of "o" in both the sub-scanning direction and the main scanning direction, making encoding by run-length encoding efficient and Hxmjxj of long non-zero block
Many specific patterns occur in one single line block,
When encoding the block for the specific pattern, selecting a shorter encoding code will further improve compression efficiency.

Embodiments Below, embodiments of the present invention will be described in detail with reference to the accompanying drawings. Embodiments to which the present invention is applied include embodiments characterized by the encoding method itself, and embodiments characterized by the combination of preprocessing, which is a step before encoding, and the encoding.

<Principle of Examples> Therefore, in order to easily understand the outline of the concept of the present invention,
The principle of block extraction adopted in the embodiment will be explained using FIGS. 4(a) and 4(b).

FIG. 4(a) shows how one data (one element) of N-bit binary multi-value data is inputted simultaneously, consecutively and horizontally by one MXf in the vertical direction. That is, one element in one row is N bits, and M pieces of these arranged vertically (in the sub-scanning direction) constitute one line, and such a line is viewed as a whole and is manually read at the same time. As such a data string, for example, a color multi-valued image data string read using a rask scan method may be assumed. That is, if M=4, the four elements are usually cyan, magenta, yellow, and black. The vertical line in the sub-scanning direction is selected to have an appropriate length depending on the degree of uneven distribution of bits in the signal, for example,
If the lines are adjacent to each other, then the value is 2.

FIG. 4(a) and FIG. 4(b) explain a method of forming a multivalued data string as shown in FIG. 4(a) into blocks. As shown in FIG. 4(a), M pieces of multi-value data in one line are
m J pieces m m 1 piece), and this division is performed on all the inputs, this (ml.

m2. . . m" . . . mk) is, for example, color multivalued image data, and if m, wm, = 2, it becomes a combination of cyan and magenta, and a combination of yellow and black. Based on such division, as shown in FIG. 4(b), first, m1 rows of binary multi-value data from the first line to the intersection line are compiled, and the whole is Nxyy1, xjl.
It is treated as a bit data string in a row and is divided into blocks.

This blocking starts with the first vertical column Nxm, x
If jl contains only 0" bits, look at the next Nxm, x11x10 data, and perform this operation by setting "1" to any bit in NXmt X41 row and 1st column.
The process continues until the ``0'' appears, at which point a variable-length NXrrzx-view block (contains only "0", so it is called a zero block for convenience) is cut out in the main scanning direction. When a variable-length zero block is interrupted, a fixed-length non-zero block is cut out in the main scanning direction.

After cutting out fixed length non-zero blocks, variable length zero blocks are searched for and cut out again. If a fixed-length non-zero block appears again after a fixed-length zero block, a zero block with a length of 0'' is forcibly inserted.This will be described in detail later.

After forming blocks as described above, encoding is performed. For variable-length zero blocks, run-length encoding is applied, and for fixed-length non-zero blocks, a predetermined block code is assigned to each row.

When the above operation is completed for m, m2. m3...
Repeat the above operations, and when mk is finished, input the next line.

Application to Color Image Data> An example in which the above encoding is applied to color image data will be described below with reference to FIGS. 1(a) and 1(b). The order of explanation is shown in FIG.

An outline of the embodiment (b) will be explained, and then its constituent parts will be explained in detail. The difference between the embodiments shown in FIG. 1(a) and FIG. 1(b) is in encoding.

<Outline of the first embodiment> Fig. 1(a) First, the embodiment of Fig. 1(a) will be explained. This example is cyan (C)
, magenta (M), yellow (Y), and black (K), redundancy is suppressed for each of the combinations of C and M and the combinations of Y and K. According to FIGS. 4(a) and (b), N=2 (upper pit, lower pit), M=4. Writer 2. ml=m2=2
It is. As can be seen from the figure, the combination of C and M and the combination of Y are equivalent, so in the following explanation, C
, M will be explained.

The circuit configuration of the embodiment can be roughly divided into the preprocessing section ICM
and an encoding processing unit 2CM. The preprocessing unit ICM includes an image memory (3c, 3M), a sub-scanning direction pit interleaving reconstruction unit (4C, 4M), a main scanning direction pit interleaving reconstruction unit (5c, 5M), and a change point extraction unit (
6C, 6M). In the image memory, for example, the second
Multivalued color image data is stored using a 4×4 dither matrix as shown in FIGS. (a) and (b). In this color image data, the color components of one pixel are four-value image data (a combination of upper bits and lower bits) as shown in Fig. 2 (C), and the main color is multi-valued by the dither matrix. It is assumed that the runs are disjoint in both scanning and sub-scanning directions.

Sub-scanning direction pit interleaving reconstruction unit (4c.

4M), for example, performs 4-bit pit interleaving by regarding one line in the sub-scanning direction (each consisting of the upper and lower bits of a single error component) as one bit.
Further, two adjacent lines of image data after pit interleaving are output. That is, in the case of 4-bit pit interleaving, the two output lines are 8-bit data (4CL+1+4CLI
+ 4 CL15゜4cLs+4yu++4M+++4
Mus+4mbg) *In addition, -U indicates the upper bit,
Let L represent the lower bit. In this way, the run length in the sub-scanning direction is improved. The main scanning direction pit interleaving reconstruction unit 5 receives 8-bit data (4 bits) input simultaneously.
cu+.

4 CLI + 4 eLI5+ 4 CLSI
4 MU1+ 4 MLI * 4 MIJSr 4
For example, in the main scanning direction of MLB), pit interleaving processing is performed with a width of 4 bits, and 8-bit data (5eU1+5 CLSI5 CLI8+5 eL1
1+5 MU1+ 5 MLll5 MIJSr5ML
5) is output to the change point extraction section. Due to this main scanning direction pit interleaving process, the logical value "1" becomes only at the above-mentioned change points. In this case, the number of "0" runs increases further, so that run-length encoding by a run-length encoding unit, which will be described later, becomes efficient, and a high data compression rate can be obtained.

The change point extraction part uses 8-bit data (5 CUI + 5 C
LI +5 CuSo4 CLSI5 MLIII5
MLll5 MUS+51LS), the point where the pit changes in the main scanning direction is captured, and the change point is
1” and the other points as “O” to create 8-bit data (6CLSI15 CLSI6 C
LIll16 CLSI6 MU116 MLll61
11LI! 116ML! 1) is output to the encoding unit 2CM. 6CUI+6 CLI+61:U5+6
CL5 + is collectively expressed as 6 C1,6as, and 6ML
11 + 6MLI + 6 MIJSr 6 ML5
are collectively expressed as 6M1°6MS.

The outline of the encoding according to the first example will be further explained. The structure of the lower 2CM of the code is 8-bit data (6C
Ul+ 6 CLSI 6 CUS+ 6 CLSI
6 MUl+6MLI + 6 MU5 * 6ML5
), when the O → 1 detection unit 8CM detects that either one is 1” and the 0 → 1 detection unit 8CM detects a change of “O” - “1”, the previous zero element a run-length encoding unit 9CM that extracts 8 rows of variable length zero blocks containing only 8 rows of variable length zero blocks, and following the 8 rows of variable length zero blocks,
8t data (6CL11+ 6 CLSI 6 C
Ufl+ 6 CLSI 6 MLll-6MLII
6 MU516 ML5), a block encoding unit 7CM7CM that cuts out fixed-length non-zero blocks (therefore, eight 1-row, 4-column blocks) of a predetermined length (for example, 4 columns)
and a synthesizing section 10cM that synthesizes these encoded codes.

The run-length encoding unit 9cM suppresses redundancy by run-length encoding the four rows of variable-length zero blocks and outputs a run-length code 12CM, and the block encoding unit 7CM outputs a run-length code 12CM for each cut-out zero block. A predetermined encoding is applied to each of the eight 1-by-4 fixed-length non-zero blocks to obtain eight block codes 11 CM. The combiner 10CM has a run-length code 12CM and eight block codes 11C.
M are arranged in a predetermined order and combined to output an image data string 13CM.

According to the configuration of the embodiment shown in FIG. 1(a), the "0" run is highly efficiently compressed by run-length encoding. Also, 8-bit data (6cus.

6 CLSI 6 CLI! 116 CLSI 6
MLIII 6MLI+ 6 MIJSr 6 ML
Bl) Depending on the type of signal source (for example, the type of original image in the case of image data), non-zero blocks may include many specific patterns. This often occurs due to the pretreatment mentioned above. For such specific patterns,
For example, if the block encoding unit 7CM performs encoding in which a code with a code length shorter than the fixed length of the block is assigned to each block of 1 row and 4 columns, high efficiency can be achieved even for image data strings containing "1". It can be compressed into For example, FIG. 8(a) shows a pattern obtained by the non-zero block, and shows an example of encoding performed on a block in 1st row and 4th column having that pattern.

<Outline of the second embodiment>...Fig. 1(b) Fig. 1(b)
The preprocessing in this embodiment is the same as the embodiment shown in FIG. The encoding unit 2CM includes a pattern determination unit 14CM that examines the pattern of the eight non-zero blocks arranged in rows 1 and 4, and a flag indicating that such blocks have such a pattern. The difference from FIG. 1(a) is that it includes a flag generating section 150M that generates a flag.

Now, in the block encoding in the first embodiment, data compression was achieved by using a code with a code length shorter than the block length for frequently occurring patterns. In the example, a flag 16CM indicating that such a specific pattern is present is generated in the flag generation unit 15CM, and this flag 18CM is generated in the block encoding unit 7CM.
Block code 17cM and run length encoder 9
Combined with the run length code 12cv by CM, the synthesizer 10CM generates a compressed signal 130M,
The aim is further compression. In addition, the first example of the flag is
This is shown in Figure 2 (a) and (b).

Explanation of each constituent part> The following will be explained in sequence according to the drawings.
Since each component of the embodiments shown in a) and (b) has many common parts, in order to avoid duplication of explanation, the accompanying drawings described below are examples of circuits for each color or two colors.

First, let's explain the front M ring part ICM.

<Pit interleaving reconstruction unit> The pit interleaving method will be explained using Fig. 5 (a) and (b), and Fig. 6 (a) to (C), and Fig. 7 (a) and (b). . FIG. 5(a) shows the state of a 4-value C signal stored in the image memory 3°, which has been converted into a 4-value signal using the dither matrix shown in FIG. 2(a) or 2(b), for example.

It has a size of 40 pixels in the main scanning direction, and 5 lines are shown in the sub-scanning direction for convenience. The numbers given in the figure are the numbers of pixels in the main scanning direction. This 4
The value C signal has periodicity of 4 bit periods in each of the main and sub-scanning directions. As mentioned above, such a dithered image is excellent for expressing halftones, but it is clear from the figure that the run length is short.

When the sub-scanning direction pit interleaving reconstruction unit 4c performs 4-bit interleaving in the sub-scanning direction on this 4-value C signal, 1.2, 3. in FIG. 4(a). ...,
The line arrangement of 5... is 1, 5, etc. as shown in Fig. 4(b).
9.13... becomes the arrangement, "white" run and "black"
It can be seen that the run length is increasing.

The main scanning direction pit interleaving reconstruction unit 5c is shown in FIG.
As shown in C), 4-bit pit interleaving processing is also performed in the main scanning direction. FIG. 7(a) shows the configuration of the sub-scanning direction pit interleave reconstruction section 4c. The address counter 91 of the sub-scanning direction pit interleave reconfiguring unit 4c is a counter that counts line numbers in increments of 4 lines, such as 1, 5, 9, . . . , and outputs two address values of 93.94 at the same time. This address value 93.94 is separated by four lines. While the readout circuit 92 performs memory interleaving according to these address values, it simultaneously reads out the contents of the memory 3CM for two lines, a total of 8 bits, and outputs it to the main scanning direction pit interleave reconfiguration unit 5C. The four pit data of the first two lines read out by the readout circuit 92 are converted into binary code No. 4.
c, (i.e. % 4CLI++4CLI) + 4
Fig. 5(b) shows the sequence of cs (4CII5+4CL5). In this way, periodicity in the sub-scanning direction is removed and the run length becomes longer.

The main scanning direction pit interleave reconstruction unit 5c will be explained. The signal (4C1+4cs) in FIG. 5(b) is approximately 4
It has periodicity of bit period. This signal (4c+, 4c
When interleaving of 4 bits in the main scanning direction is performed on s), 1°2.3, 4. The pixel arrangement in the main scanning direction of ... is 1, 5, 9, 13 as shown in Fig. 5(C).
．． 1? , . . . , and it can be seen that the “white” run and “black” run lengths increase in the main scanning direction.

By the way, the reason why the pit interleave is set to 4 bits is because
This is because the size of the dither matrix used for threshold processing was 4 bits, but the pit interleaving was performed with the same length as the dither matrix. In addition to determining the pit interleaving length in this way, it can also be set to an integer multiple or fraction of the size of the matrix, or with a period corresponding to a threshold with an approximate value in the threshold matrix. There is also a method of grouping.

The circuit of the main scanning direction pit interleaving reconstruction section 5c is shown in FIG. 7(b). The main scanning direction pit interleaving reconstruction unit 5c uses two sets of line memories 40 and 41 to rearrange the C signals (4c+, 4cs). One unit of memory in one set of line memory has 2 bits for the upper bit and lower bit, for a total of 4 lines (signal 4 (:
It has a memory interleaving function to access two sets of line memories simultaneously. Two sets are used:
C signal (4CI+4C6) input and rearrangement operation and rearranged signal string! This is because the operation of reading out 5ct and scs is performed at the same time. That is, when inputting (writing) to one set of line memories, the other set of line memories is used for outputting (reading). In order to prevent one set of line memories from being used for writing and reading at the same time, an address counter 25 for writing, an address counter 26 for reading, and the outputs of these counters 25 and 26 are distributed to each line memory 40 and 41. Selector 27,2
8, 29, 30, 31, 32, and a line memory control unit 42 that performs exclusive control. The line memory control unit 42 alternately sets the second line memory write signal 36 or the first line memory write signal 37 to "1" in synchronization with the BD signal 38 generated for each line. Also selector 27.28.
31 is a selector that selects an output according to the logical value of the second line memory write signal 36 or the first line memory write signal 37; Alternatively, the input is selected according to the logical value of the first line memory write signal 37. In this way, when the first line memory write signal 37 is "1", the second line memory write signal 36 is "0", and the selector 2 outputs "O".
, the selector 29 selects the input "0" and the selector 31 selects the output "0", so the C signal 4C++40S is written to the first line memory 40, while the output of the read address counter 26 is written to the first line memory 40 by the selector 28 and the selector 30. The data is input to the 2-line memory 41, and the selector 32 selects the second line memory 41. In this way, simultaneous writing and reading processing can be performed, contributing to speeding up.

The address generation method for each address counter 25, 26 is shown in FIGS. 6(a) to 6(e). The capacity of the line memory is, for example, 000 to IFFF as shown in FIG. 6(a).

As mentioned above, one address has two bits. 000～
FFF is for the signal 4C1, and 1000 to IFFF is for the signal 4C8. As shown in FIG. 6(b), the write address counter 25 is set from 000 to FFF and from 1000 to
It may be increased sequentially in ascending order up to IFFF.

Further, the read address counter 26 is configured as shown in FIG. 6(C). Such an address generation circuit for the read counter 26 can be easily constructed using, for example, a counter identical to the write address counter 25, a counter with an output of 1" to "4" for offset, and an adder.

The BD signal 38 of this embodiment uses a beam detect signal if the present redundancy suppression coding method is applied to, for example, a laser beam printer, or uses a horizontal synchronization signal if applied to a facsimile or the like.

In addition, address counters 25 and 26 and line memory 40
．． The driving clock 41 is a synchronous clock 35CM.

This synchronized clock 35cM is generated by the encoding and combining unit 15CM, and when the signal sequence is in a certain pattern during encoding in the encoding and combining unit 15CM, it is necessary to forcibly insert a predetermined code. In that case, the sub-scanning direction and main scanning direction pit interleaving reconstruction unit 4C+ continues until the synthesis unit 10cM synthesis unit 10c2 finishes sending out the forced insertion code (in this embodiment, the MH code is “0”).
50 (details will be described later).

The pit interleaving retiring unit as described above performs pit interleaving for each color of the color signal, as shown in FIGS. 1(a) and 1(b).

By the way, as can be seen from FIG. 1(a) and Cb'), the C signal and the M signal are encoded at the same time by the encoding section 2cM. That is, the pit interleaving preprocessing of the C signal and the Y signal is synchronized, and therefore, of the components shown in FIGS. 7(a) and 7(b), except for the first line memory 40 and second line memory 41, It can be shared, and this commonality contributes to downsizing of the circuit. The same applies to the combination of signal Y and signal Y.

Incidentally, pit interleaving processing in the sub-scanning direction was performed on two adjacent lines in the above embodiment, but as shown in FIG. 7(a).
, (b), it is also possible to perform pit interleaving processing over multiple lines in the sub-scanning direction. Furthermore, in the above embodiment, pit interleap m filling was performed in both the main and sub-scanning directions, but the type of binarization code,
If such pit interleaving is not necessary depending on the characteristics, direct encoding processing may be performed without pit interleaving processing.

Change point extraction〉 “0” run or “
Once the length of the 1" run becomes long to a certain extent, it is possible to further lengthen the 0" run by extracting the change point, that is, converting the 1 run to a 0 run. Figure 8(b) shows an example of a circuit for extracting changing points, and Figure 8(a)
The results are shown below. An example of the changing point extracting section 6c in FIG. 8(b) is a case where changing points between pixels adjacent to each other by one pixel in the main scanning direction of the signal 5C1 are extracted. Flip-flops 20 and 22 are used to detect one adjacent pixel, and EX-OR gates (exclusive OR gates) 21 and 23 are used to detect a change point.

For a binary code sequence subjected to 4-bit interleaving,
The pixel immediately before the target pixel on the same scanning line and EX-O
Take R. That is, if each pixel of the binarized code string is made to correspond to the threshold value DIJ in FIG. 2(a), the EX-OR gate 21.2
3 output D xlJ 6 C1 is DxlJ=DIJ
■DI-ITJ. In the change point extracting section 6.degree., one more circuit is provided for the signal 5c in the circuit shown in FIG. 8(b). Figure 8 (
In a) the signal 6C++6C5 is shown.

As can be seen by comparing Figure 5(c) and Figure 8(a), the "O" run (such "O" run is also called "white" run) is longer, and the run length code is It is obvious that it is suitable for Further, in the bit-interleaved signal string, the run lengths of the "white" run and the "black" run are long. The characteristics appearing in the signal sequence 6CI+6C5 obtained by extracting changing points from such a signal sequence are as follows.

(2): There is a high probability that a logical value "1" will be isolated and unevenly distributed surrounded by "0"s (that is, "1000" will occur after a "0" run). This is because if the "white" run and "black" run are long, change points "1" occur only at both ends of them.

■ On the other hand, an isolated "black" in a long "white" run.

And an isolated "white" in a long "black" run becomes "1100" when the change point is captured.

From the above ■ and ■, the signal string 13C4 has 1000” and “
It can be seen that 1100" occurs frequently.

This is obvious when looking at Figure 8(a). The above fact has a great deal to do with encoding, which will be described later.

The preprocessing for redundancy reduction coding has been described above. Therefore, next, we will explain the second embodiment regarding the encoding/synthesizing section.
Let me explain. In a sense, the preprocessing section described above independently processes each color signal and each line signal. In the encoding embodiment described below, adjacent line signals of two color signals (for example, signal C and signal M) are processed as if they were one signal.

Encoding of the first embodiment> FIG. 10(a) shows an image data string (6
CUI16 CLI16MUl16ML116 C11
516CL516Mu5+ 6 ML5) is shown,
A method of cutting out variable length zero blocks (or fixed length non-zero blocks) from this image data string is shown. still,
The data in FIG. 10(a) and the data in FIG. 8(a) are different. In the figure, according to convention, "0" is represented as "white" and "1" is represented as "black" because it is easy to display the number of digits.

2 communication signals (6CL11 + 6 CLI r 6 ML
ll +6 MLI + 6 CLI5+ 6 CLS
For +6 MLIj+ML5), those signals containing only "0" at the same time are cut out as a white ("0") run. For example, "white 5" in the figure means that six white runs (six columns) of eight rows continue.

Such white (“0”) runs are compressed by, for example, MH encoding.

On the other hand, if even one "1" appears in any row, eight fixed-length non-zero blocks of 4-bit length with 1 row and 4 columns are cut out from there. There must be one such block somewhere. These include "1" as described above, but there may also be rows in which all rows are "O". If the preprocessing described above is performed, there will be more 0" runs overall for each color, but as shown above, If you cut out a block containing all colors, all rows will be “0”.
000", many items are included in non-blocks. For example, in Figure 10 (a), the seventh block at 8 rows and 4 columns has only zeros in 1 row and 4 columns. As many as four blocks (=oooo) are included. This is because the stochastic processes of the C signal and M signal are independent in the same pixel, so the occurrence of "0" and "1" between colors is random. This is because there are many "0000" patterns, which suggests the possibility of further compression.This will be explained in another embodiment.

The patterns that can be generated in the fixed length non-zero block thus obtained are a combination of the 16ffi patterns shown in FIG. 9(a). 16f like this! For convenience, symbols of B0 to B15 are given to the patterns of type 1 and shown in FIG. 9(a). According to this convention, for example, Fig. 10 (a)
) is the first fixed-length non-zero block in (Bo, BI, B
8. B9. Bo, B12°B1□, BO).

Note that depending on the image data, as shown in FIG. 10(a), there are cases where the image does not start from a variable length zero block. In such a case, one “
Insert "White 0"("00f10101" in MH code). Also, do the same when there are two consecutive non-zero fixed length blocks. Variable length zero blocks and fixed length non-zero blocks must be alternated. This is to ensure synchronization during decoding.

By the way, as mentioned above, many 1ooo' and °'1100' occur in the block due to preprocessing.Also, when "1" occurs in either color, it is made part of the block. There are also many "0000"s. Therefore, if we focus on patterns that occur in large numbers like this and perform predetermined encoding to make the bit length shorter than the pattern length, the compression rate by encoding will improve. In the example, “00
Three types of patterns often occur: ``00'', ``1000'', and ``1100.'' In the example of FIG. 9(a), the 2-bit code ``00'' is changed to B.="0000," and 8
3=“1100”. In this way, high compression is achieved.

Furthermore, all the codes in FIG. 9(a) are unique to each other, and are a combination that will not cause confusion.

The compressed code "10" is not adopted because it cannot be distinguished from patterns other than Bo and Bs. In this way, the frequently occurring patterns "0000" and "1100" are compressed to 2 bits. On the other hand, 0000″, “1100”,
For images in which many patterns other than "1000" occur with the same probability, the compression code is set to 3 bits. Then, 000",'001",010","
011'' 4f!! type compression code is possible.In individual compression, the compression ratio is worse than the 2-bit example, but the overall compression ratio is further improved.Figure 10(b) shows the above compression code. It is a diagram showing the compression pattern of each signal according to the convention. In FIG. 10(b), MH represents MH encoding. Such encoding is performed every two lines. FIG. 10(b) It can be seen that the encoding of this embodiment improves the compression rate much more than simple MH encoding.

FIG. 11(a) shows an example of a circuit for such encoding. RL (run length) counter 51, selector 52
．． “White” MH encoding ROM 53, etc. runs “0”, that is,
The variable length zero block is encoded by MH encoding and the encoded code is latched in the latch 54. The detection circuit 50 is the first
As shown in Figure 1(b) in detail, eight binary signal sequences (6CL11, 6CLl+ 6 ML11+ 6 ML
II 6 CLISI 6CLS+ 6MUS+6ML
5) Any change (“0” → “O”” o “−“
1"1"→"0""1"-1"). The RL counter 51 is a counter using CLK as a driving clock,
When "1" is input to the EN (energization) terminal, counting becomes possible, and when "1" is input to the CL (clear) terminal, it is cleared.
+6 CLll6 MIJl+6 MLI・6CLI5
・6CLS+6 MLIll+6 ML5) Everything is “
0", it continues counting and inputs the MH code according to the count value to the latch 54. 2 communication signal sequences (6CLll + 6 eLl + 6ML11 +6
MLl+ 6 CLISI 6CLS+ 6MUS, +
6ML5) changes from "0" to 1"', the sign code of the count value at that time is latched into the latch 54 via the signal 72, and at the same time, the counter 51 is cleared.

On the other hand, the eight 4-bit shift registers 61a to 61h each have a signal string (6CLll+6CLI+6
MUI +6 MLII 6 CU5+ 6 cLs
o 6 MLI516 ML8) is held for a length of 4 bits. The eight block encoding ROMs 62a-62h encode the outputs of the 4-bit shift registers 61a-61h, respectively, according to the rules shown in FIG. 9(a). on the other hand,
The 4-bit counter 55 has a detection circuit 50 that receives a signal string (6C
IJI, 6 CLI + 6 MUI-+6 MLI
I 6CU8+ 6 CLll 6 MLI11+ 6
1LII) from "0" to 1", and energizes the signal 71 4 bit times after the change. At this timing, the outputs of the block encoding ROMs 62a to 62h are latched into the latches 63a to 63h, respectively. The synthesizer 64 is for synthesizing the respective encoded codes and storing the synthesized code in the shift register 65.Since the MH code has a variable length, such a synthesizer is necessary.The shift register 65 is a parallel code. Perform serial conversion.

AND gate 60 selects M, which corresponds to white "0" as described above, when a non-zero block starts from the beginning of the line.
It is for inserting H code. AND gate 59 is
When a “1” signal is immediately input without a “0” run following one non-zero block, that is, when the signal sequence (6
CUI+6c+, ++6 MLII6wbx+6cu
s+6c Ls+6 Mus+6 MLs)
is "1" and the signal 70 is "1", to insert the MH code corresponding to white "0".The white "O" insertion section 56 is for this one " It is provided to insert white 1, and outputs "0" to the selector 52 when either AND gate 59 or 60 opens. In this way, the white MH encoding ROM 53 outputs the MH code -00110101'' corresponding to 0″', and white “0” is forcibly inserted.

Note that the clock control 5f is a circuit that generates the synchronous clock 35CM of the pit interleave reconfiguration unit (41: +4M + 50+5M) described above, and at the timing of the forced insertion, this "oottoiol" is output from the shift register 65. The generation of the synchronous clock 35cM is stopped until the process is completed. This is for synchronizing the input to the line memory 40 or 41 and the output from the shift register 65.

Although the MH encoding method is used in the circuit of FIG. 11(a), for example, wy1e encoding may be used as one-dimensional encoding. Furthermore, it is obvious that the present invention can be easily applied not only to one-dimensional encoding but also to two-dimensional encoding processing such as MR symbols and MMR symbols. Basically, there is no choice of encoding method. Furthermore, it is also applicable to R, G, and B for color images.

Encoding of Second Embodiment> The above-described embodiment is based on the compression rules shown in FIG.
0″ is coded “oo” and “, respectively.

1". In this embodiment, this o o
The purpose is to compress o o' more efficiently. For this purpose, the eight non-zero blocks arranged in the 1st row and 4th column are extracted as shown in FIG. 10(a) in the same manner as in the previous embodiment. If there is a 4-bit "0000" (for convenience, this is called a "zero pattern") in any of the eight 1-row, 4-column blocks containing "1", it is used as in the previous example. Instead of coding it as "00", set a flag to indicate that "0000" was present, and set the value of that flag to 0.Even if there is one in 1 row and 4 columns, it is 1".
(For convenience, such a block with 1 row and 4 columns is
The flag corresponding to “non-zero pattern” is “1”
shall be. Such a flag is provided for each column. The code corresponding to the non-zero pattern is executed as shown in FIG. 9(b).

FIG. 12(a) shows the format after compression. Binary signals 6CU1, 6 CLI+ 6MUI, 6MLl+”
Cll5゜6 CLS * 6 MLI5 + 6
The MLS encoding codes are #1 code and #2 code, respectively.
Code..., #8 code. Similarly, the flags corresponding to these code codes are #IF and #2.
F......Set as #8F.

For example, if #IF is “0”, the signal 6 in the 1st row and 4th column
Cu11 has a zero pattern=oooo, indicating that there is no corresponding #1 code.

Any combination of blocks with 8 rows and 4 columns is always a combination of zero patterns and non-zero patterns, so the combination of flags is "10000000", "010000".
00”・・・・・・・・・2 of “11111111”
There are 55 ways. “ooooo.

00" is a zero block, so it does not exist as a combination of flags. FIG. 12(b) shows an example of the format including flags and code codes. example contains only one non-zero pattern, and that non-zero pattern is
This is the case when image data such as "00" is input. This is because these non-zero patterns are converted to a 2-bit block code according to FIG. 9(b).

Conversely, the maximum length is 48 bits as shown in FIG. 12(b).

When data is compressed in this way, the zero pattern does not appear as a code, so there is a risk that synchronization may occur during decoding. However, there is always a flag at the beginning, and its length is always 8 bits, and depending on the logical value of that flag, the length of the code following the flag is <#1 code to #8 code.
You can see how many zero patterns there are in a block of 8 rows and 4 columns, and as you can see from Figure 9(b),
All the code codes corresponding to Bl'''B111 are unique. Therefore, even if a zero pattern is converted as if there is no code corresponding to it, there will be no synchronization loss during decoding.

When the block cutout shown in FIG. 10(a) is compressed according to the compression of this embodiment, it becomes as shown in FIG. 13. For example, BO/Bl /Ba/B, /Bo
/ B 12 / B 12 / The block of 8 rows and 4 columns of Bo has the flag part "01110110", no #1 code, #2 code "00", and #3 code "toooo".
t”, #4 code is encoded as 11001° .

FIG. 14 shows an example of a circuit that performs such flag-based encoding. That is, the basic configuration is the same as that of the first embodiment described above (FIGS. 11(a) and 11(b)), and the block encoding ROMs 62a to 62h are configured as shown in FIG.
The flag output is added to part of the output. For example, if a zero pattern is input to this block encoding ROM, the length is set to "1" (because it is only one bit of the flag), the flag is set to "0", and the code is set to "0". The length output of the ROM is input to the combiner 64 and becomes information for combining. That is, the synthesizer 64 only outputs the zero pattern "o o o o" as "1". In this way, even more effective compression becomes possible for image signals that include many zero patterns "0000".

The above two encoding embodiments have been described, and in these encodings, zero patterns and non-zero patterns in 1 row and 4 columns in the main scanning direction are extracted from a fixed length non-zero block, but this extraction is performed in the sub-scanning direction. They may be taken out in 4 rows and 1 column in the direction.

In the above embodiment, the block length is 4 bits, but there is no limitation to this, and it is determined depending on the circuit scale and the type of original image data. Incidentally, setting the length to 8 bits improves efficiency somewhat. Furthermore, the efficiency of MH encoding for the "0" run can be further improved by slightly changing the encoding ROM table. Furthermore, the encoding method is not limited to the MW encoding method, but can also be applied to other one-dimensional encoding methods.

Furthermore, as is well known, the binary color signals C, M, and Y may be read out from a memory (not shown), or may be obtained by reading an image in real time and performing binarization processing. good.

<Effects of Examples> The effects of the various embodiments described above are summarized as follows.

■: Pit interleaving processing is applied to the color image data in 4-level binary display, especially pit interleaving processing is performed not only in the main scanning direction but also in the sub-scanning direction, so the white runs and black runs are separated. Also, the run length is restored and becomes longer. This is particularly effective for color image data that has been subjected to halftone processing using a threshold matrix.

■: Since change point extraction processing is further applied to the image data string that has been subjected to bit interleaving processing, the run length of "1" is short and the run length of "0" is long, which makes it possible to achieve high compression in the encoding process. You can expect it. As a result, pseudo-halftone images can be compressed with high efficiency while using the encoding algorithm intended for document images as is.

In particular, if existing encoding such as MH encoding is used, a redundancy suppression method with a high compression ratio can be obtained with only slight changes to the conventional circuit.

(2): Due to the change point extraction in (2) above, many image data strings (blocks) having a predetermined pattern are generated. Therefore,
The patterns in this block are encoded into short bit length codes for each row and then synthesized. Furthermore, the "0" run is encoded by applying one-dimensional encoding such as MH encoding as before. That is, depending on the type of original image data, the image data string from which the changing points have been extracted may include "o o o o" and "1".
Since "000" or "1100" occur frequently, the compression rate can be increased by encoding such blocks with short pits, and signals of two or more rows can be combined into one signal.

(2) Furthermore, by replacing the zero pattern o o o o' with a 1-bit flag, a higher degree of compression becomes possible.

[Margins below] [Effects of the Invention] As explained above, according to the redundancy suppression coding method of the present invention, blocks are simultaneously formed over every line in the main scanning direction and the sub-scanning direction, and variable lengths are created in the main scanning direction. For zero blocks, the entire sentence line in the sub-scanning direction is compressed by run-length encoding, and for fixed-length non-zero blocks, a predetermined block encoding is performed for each row of NXmjx1 rows. Accordingly, the redundancy of a plurality of binary multilevel data strings can be efficiently suppressed in the main scanning direction and the sub-scanning direction.

According to still another aspect of the present invention, the pit interleaving process in the main scanning direction and the sub-scanning direction increases the run length of "0'° in both the sub-scanning direction and the main scanning direction, so that the encoding by run-length encoding becomes longer. becomes more efficient, and when a large number of specific patterns occur in one line block of NXmj By doing so, the compression efficiency can be further increased.

[Brief explanation of the drawing]

Fig. 1(a) is a principle block diagram of the first embodiment, Fig. 1(b)
2(a) and 2(b) are dither matrix diagrams provided for the embodiment according to the present invention and the conventional example, and FIG. 2(C) is a diagram of multivalued data and its A diagram showing an example of the correspondence of constituent pits. FIGS. 3(a) and (b) are diagrams explaining how the degree of pit dispersion increases due to halftone processing in the conventional example. FIGS. 4(a) and (b) are diagrams explaining the principle of block extraction common to the 1.2 embodiments, Figures 5(a) to (C) are diagrams explaining the principle of pit interleaving, and Figures 6(a) to (C). 7(a) is a circuit diagram of the sub-scanning direction pit interleaving reconstruction unit; FIG. 7(b) is a circuit diagram of the main scanning direction pit interleaving reconstruction unit. , FIGS. 8(a) and 8(b) are diagrams explaining the operation and circuit configuration of the change point extraction unit common to the 1.2 embodiment, and FIG. 9(a) is a diagram illustrating the encoding according to the first embodiment. FIG. 9(b) is a diagram illustrating an example of a code code for encoding according to the second embodiment. FIG. 10(a) is a diagram illustrating a block extraction method in the embodiment. 10(b) is a diagram explaining the code arrangement after encoding in the first embodiment. FIGS. 11(a) and (b) are for encoding common to the 1.2 embodiment. 12(a) and 12(b) are diagrams explaining the encoding format in the second embodiment. FIG. 13 is a diagram showing the code arrangement according to the encoding method of the second embodiment. The figure shows a ROM used for encoding in the second embodiment.
FIG. In the figure, 1゜MlIYK...pretreatment part, 2cM12Y...
Encoding unit, 3cM+3Y...Image memory, 4 Co
4 Ml 4 Y+ 4 *... Sub-scanning direction pit interleaving reconstruction unit, 5 Co 5 M. 5 Y, 5 K...Main scanning direction pit interleaving, 6c. 6M + 6Y+ 6K...change point extraction section, 4C
UI + 4CLI +4 CLI% + 4 CLS
I 4 CUS+ 4 CLSI 4 MUI + 4
MLI+4 MUS+4 MLS+4 YL
11+4 YLI+4 YLI5+4 MLI14
KLI114 KL114 KUS + 4KLS
...4-level binary image data string pit-interleaved in the sub-scanning direction, 6 CUI + 6CLI + 6CL
I5+ 6CLS+ 61: LIsl 6 CLSI
6ML11+ 6MLl+ 6 MLI5・8 ML
516 YLll16 MLI16 YLI! 1
,6 YL516 KIJII6 KLI+6 to υ5.6 to LS...signal extracted at change point, 7cM+
7Y...Block encoding unit, 8 CMI 8 YK
...O-1 detection unit, 10cM, 10YK...Run-length encoding unit, 11cM, 11yx...Block code, 12cM, 1:2YK...Run-length code, 13cM, 13YK...Redundancy Suppressed signal, "CMI 14y...pattern discrimination unit, 15cM, 15YK...flag generation unit, 1
6CM, 16YK... these are flags.

Claims (6)

[Claims] (1) an input unit for arranging M binary multi-value data strings each having N bits per element and inputting the M binary multi-value data strings one line at a time in the sub-scanning direction; Multivalued data string (m_1, m_2,...
m_j, ...m_k), and divide the divided m_j×N rows of bit data into the bit values of each data over l lines in the sub-scanning direction for each j. After examining this, we create a variable-length zero block of N×m_j×l rows that contains only “0” bits in both column and row data and has a variable length in the row direction.
a block cutting unit that cuts out a fixed-length non-zero block of N×m_j×l rows that includes at least one “1” bit and has a fixed length in the row direction; and the N×m_j×l rows. a run-length encoding unit that converts variable-length zero blocks into run-length codes by run-length encoding; and a block that performs predetermined encoding on each row of the fixed-length non-zero blocks of N×m_j×l rows. A redundant system comprising: an encoding unit; and a combining unit that combines the run-length code and the predetermined encoded code for all m_j rows in a predetermined order every time the input unit inputs l lines, and outputs the result. degree suppression coding method. (2) When M=4, the one element corresponds to each color image data of cyan, magenta, yellow, and black,
The redundancy reduction coding method according to claim 1, characterized in that m_1=m_2=2. (3) The redundancy suppression code according to claim 1, wherein the run-length encoding unit performs run-length encoding on the number of elements in the row direction of the variable length zero block of N×m_j×l rows. method. (4) The length of the code in the block encoder is:
2. The redundancy suppression coding method according to claim 1, wherein a part of the code code is shorter than the length of at least a fixed-length non-zero block. (5) an input section for arranging M binary multi-value data strings each having N bits and inputting the M binary multi-value data strings one line at a time in the sub-scanning direction; Interleave a predetermined width for each line to obtain a first bit data string of N rows x M pieces, capture the bit change for each row of the first bit data string, and set the bit change to "1". Converting so that no change is set to "0", one line is N bits x M
a pre-processing unit that obtains a bit data string; It is a block extraction unit that inputs the M binary multi-value data strings (m_1, m_2, . . .
m_j, . After examining the data, cut out l variable-length zero blocks of N×m_j×l rows that contain only “0” bits in the data in both the column and row directions and have a variable length in the row direction. a block cutting unit that cuts out a fixed-length non-zero block of N×m_j×l rows that includes at least one bit of 1” and has a fixed length in the row direction; and a variable-length zero block of N×m_j×l rows. a run-length encoding unit that converts the block into a run-length code by run-length encoding; a block encoding unit that performs predetermined encoding on each row of the fixed-length non-zero block; A redundancy reduction encoding method comprising: a combining unit that combines the run-length code and the predetermined encoded code for all m_j rows in a predetermined order and outputs the result each time the run-length code is input. (6) Claims characterized in that the M binary multi-value data strings input to the input section are multi-value color image data with M=4 and multi-valued using a threshold matrix. Redundancy suppression coding method according to Section 5.