JPS6397964U - - Google Patents
Info
- Publication number
- JPS6397964U JPS6397964U JP19324886U JP19324886U JPS6397964U JP S6397964 U JPS6397964 U JP S6397964U JP 19324886 U JP19324886 U JP 19324886U JP 19324886 U JP19324886 U JP 19324886U JP S6397964 U JPS6397964 U JP S6397964U
- Authority
- JP
- Japan
- Prior art keywords
- permanent magnet
- magnetic cores
- saturable
- saturable magnetic
- flux generated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004804 winding Methods 0.000 claims description 9
- 230000004907 flux Effects 0.000 claims 5
- 238000010586 diagram Methods 0.000 description 7
- 239000003990 capacitor Substances 0.000 description 1
Landscapes
- Details Of Television Scanning (AREA)
Description
第１図は本考案の水平偏向直線性補正回路の一
実施例の回路図、第２図は第１図示の水平偏向直
線性補正回路の動作説明用の回路図、第３図は既
提案の水平偏向直線性補正回路を使用した水平偏
向直線性補正回路のブロツク図、第４図乃至第６
図は既提案の水平偏向直線性補正装置の構成図、
第７図は特性曲線例図、第８図は鋸歯状波電流の
波形図、第９図は広偏向角の受像管における問題
点の説明図、第１０図は画像歪の説明図である。
１……水平偏向出力回路、２……水平偏向コイ
ル、５……コンデンサ、７，８……ドラムコア、
９……永久磁石、１０，１１……巻線、ＬＣＡ…
…水平偏向直線性補正装置、１４……２次巻線、
Ｒ……負荷回路、ＳＷ……スイツチ。
Fig. 1 is a circuit diagram of one embodiment of the horizontal deflection linearity correction circuit of the present invention, Fig. 2 is a circuit diagram for explaining the operation of the horizontal deflection linearity correction circuit shown in Fig. 1, and Fig. 3 is a circuit diagram of an embodiment of the horizontal deflection linearity correction circuit of the present invention. Block diagrams of horizontal deflection linearity correction circuits using horizontal deflection linearity correction circuits, Figs. 4 to 6
The figure shows the configuration of the previously proposed horizontal deflection linearity correction device.
FIG. 7 is an example of a characteristic curve, FIG. 8 is a waveform diagram of a sawtooth wave current, FIG. 9 is an explanatory diagram of problems in a wide deflection angle picture tube, and FIG. 10 is an explanatory diagram of image distortion. 1...Horizontal deflection output circuit, 2...Horizontal deflection coil, 5...Capacitor, 7, 8...Drum core,
9... Permanent magnet, 10, 11... Winding wire, LCA...
...Horizontal deflection linearity correction device, 14...Secondary winding,
R...Load circuit, SW...Switch.
Claims (1)
た磁束を直列的に還流させうるような配置態様で
前記の永久磁石における対をなす２つの磁極にそ
れぞれ個別に接し、かつ、互に離隔した状態に設
けられた２つの可飽和磁心と、前記の２つの可飽
和磁心にそれぞれ巻回された巻線とを備え、前記
した２つの可飽和磁心にそれぞれ巻回された巻線
を直列に接続し、それに一定方向の電流を流した
ときに前記の２つの可飽和磁心にそれぞれ巻回さ
れたそれぞれの巻線によつて生じる磁束が、一方
の可飽和磁心については前記の永久磁石による磁
束と加算され、他方の可飽和磁心内では前記の永
久磁石による磁束との間で減算されるように、前
記した２つの可飽和磁心に巻回されている２つの
巻線の接続極性を定めて、前記の直列接続された
巻線を受像管の水平偏向コイルと実質的に直列接
続するとともに、前記した２つの可飽和磁心にそ
れぞれ巻回されている巻線の一方のもの、もしく
は双方のものに２次巻線を巻回し、前記した２次
巻線に対してスイツチを介して負荷回路を接続し
てなる水平偏向直線性補正回路。 one permanent magnet, each of which is in contact with the two magnetic poles of the pair of the permanent magnet in an arrangement such that the magnetic flux generated by the permanent magnet can be circulated in series, and is spaced apart from each other; two saturable magnetic cores provided in a state of When the two saturable magnetic cores are connected and a current is passed through them in a certain direction, the magnetic flux generated by the respective windings wound around the two saturable magnetic cores is equal to the magnetic flux generated by the permanent magnet for one of the saturable magnetic cores. The connection polarity of the two windings wound around the two saturable magnetic cores is determined so that the flux is added to the magnetic flux generated by the permanent magnet in the other saturable magnetic core. , the series-connected windings are substantially connected in series with the horizontal deflection coil of the picture tube, and one or both of the windings are respectively wound around the two saturable magnetic cores. A horizontal deflection linearity correction circuit is formed by winding a secondary winding around the coil and connecting a load circuit to the secondary winding via a switch.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986193248U JPH0520050Y2 (en) | 1986-12-16 | 1986-12-16 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986193248U JPH0520050Y2 (en) | 1986-12-16 | 1986-12-16 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6397964U true JPS6397964U (en) | 1988-06-24 |
| JPH0520050Y2 JPH0520050Y2 (en) | 1993-05-26 |
Family
ID=31149096
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1986193248U Expired - Lifetime JPH0520050Y2 (en) | 1986-12-16 | 1986-12-16 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0520050Y2 (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58157260A (en) * | 1982-03-15 | 1983-09-19 | Asia Seisakusho:Kk | Compensating system of video screen |
-
1986
- 1986-12-16 JP JP1986193248U patent/JPH0520050Y2/ja not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58157260A (en) * | 1982-03-15 | 1983-09-19 | Asia Seisakusho:Kk | Compensating system of video screen |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0520050Y2 (en) | 1993-05-26 |
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