JPS638830A - Central controller - Google Patents

Abstract

PURPOSE:To efficiently and quickly execute a special instruction by providing a microprogram which constitutes an optimum instruction even for the special instruction peculiar to a different programming language and executing this microprogram. CONSTITUTION:When a task of a special programming language occurs, a proper microprogram coping with the special programming language is loaded from a bulk memory 4 to a main storage device 3 through a bus 2 and is stored in a read buffer 11 from the main storage device 3. The microprogram is loaded to a RAM 5 from the read buffer 11 through a selector 18 by the control of an address counter 19 to substitute a general or fundamental microprogram stored in the RAM 5 with the microprogram adapted to the special programming language. A selector 22 selects an address control part 20 to execute instructions of the special program language by the newly loaded microprogram.

Description

Detailed Description of the Invention [Objective of the Invention] (Industrial Application Field) The present invention provides a central control system 2 that can efficiently and quickly execute special instructions specific to different programming languages.
11 device.

(Prior Art) Computers use various programming languages, such as F
ORTRAN, C0BOL, PASCAL, C, LIS
Programming languages such as P, PROLOG, and other assembly languages have been developed. micro program υ
The ITll type central control unit has a general instruction system made up of microprograms made up of microinstructions. By the way, in a computer having such a central control unit, special instructions that are used only in a specific programming language such as LISPW, that is, special instructions unique to that programming language, are placed in an appropriate place among the instructions in the general instruction system. It is executed in a pseudo manner by combining various instructions.

(Problems to be Solved by the Invention) In conventional central control units, a special TA instruction unique to a particular programming language is executed using a combination of multiple general instructions. , the special instruction is converted into multiple general instructions, and the execution of these multiple general instructions means that one special instruction is executed, which increases the number of instruction steps in the object program and improves efficiency. There is a problem that the processing speed becomes slower and the processing speed becomes slower.

This invention has been made in view of the above, and its purpose is to provide a microprogram that configures optimal instructions even for special instructions specific to different programming languages, and to execute the microprogram. The object of the present invention is to provide a microprogram-controlled central control unit that efficiently and quickly executes the special instructions.

[Structure of the Invention] (Means for Solving the Problems) In order to solve the above problems, the present invention provides a central control unit that executes instructions constituting a program in a predetermined programming language using a microprogram control method. a storage means for storing a microprogram of instructions suitable for another programming language; a command means for instructing to read out the microprogram of instructions suitable for the other programming language stored in the storage means; The present invention further comprises a control means for controlling a microprogram of instructions suitable for the other programming language read out based on a command so as to be stored in a microprogram storage section.

(Operation) In the central control unit of the present invention, a microprogram of instructions suitable for another programming language is read from the storage means, the read microprogram is stored in the microprogram storage section,
Programs in other programming languages are executed by this stored microprogram.

(Example) Hereinafter, the present invention will be explained in detail using the drawings.

FIG. 1 is a block diagram of a central control unit according to an embodiment of the present invention, and FIG. 2 is a symmetrical multiprocessor system to which the central control unit of FIG. 1 is applied.

First, explanation will be given with reference to FIG. The multiprocessor system in FIG. 2 has a plurality of CPU1 to CPUn,
These CPUs are connected to each other via a data bus 2. This bus 2 also includes a main memory device (MEM) 3.
and a bulk memory 4 such as a magnetic disk storage device are commonly connected.

Each CPU adopts a microprogram control method, and has a RAM 5 which is a writable control storage device (WO2) for storing microprograms.
EPR where J5 and microprograms are stored
It has a ROM 6 consisting of OM and the like. When executing a program, each CPU loads the microprogram stored in the ROM 6 into RA to RA 15, and sequentially executes the instructions of the program based on the microprogram loaded into the RAM 5. . The CPU 1 has a plurality of ROMs 6, and each ROM 6 stores, for example, a microprogram of general or basic instructions in one of the ROMs 6, and stores instructions in a different programming language in another ROM 6. It stores suitable microprograms.

Further, the CPUn has one ROM 6, but this ROM 6 stores, for example, only a microprogram of general or basic instructions. Although it is possible to execute instructions in a special programming language using the combination of instructions that can be executed by the microprogram stored in the ROM 6, in this case the combination of instructions becomes complex and is not efficient. Not fast.

The bulk memory 4 stores microprograms for instructions suitable for a special programming language not stored in the ROM 6 of the CPLIn, such as LISP. The illustrated bulk memory 4 stores microprograms 7 and 8 for instructions suitable for two special programming languages, respectively. For example, one microprogram 7 is for LISP and the other is for PROL.
This is a microprogram for OG.

In this way, the bulk memory 4 stores instructions suitable for special block programming language instructions that the CPUn does not store in its ROM 6 as microprograms. The program is loaded from bulk memory 4 into RAM 5 of CPLJn via bus 2 and main memory 3 when CPUn executes this special programming language;
This allows the CPUn to efficiently and quickly execute even special programming languages.

Figure 1 shows a central system installed at the CPU port that loads and executes microprograms for special programming languages stored in the bulk memory 4! 2I
This shows the configuration of the I device, and this configuration will be explained.

In FIG. 1, the portion excluding the bus 2, main storage device 3, and bulk memory 4 corresponds to CPU n in FIG. This CPUn has a RAM 5 and a ROM 6 as shown in FIG. Connected to bus 2 or one buffer?
It has 11. This read buffer 11 is connected to an address counter 12 that supplies address information, and the output from the read buffer 11 is latched into a register 14. The output of the register 14 is passed through the selector 18 to the R
It is designed to be stored in AM5. Note that an initialization signal, a count-up signal, etc. are input to the address counter 12, a write clock signal, a read/write signal, etc. are input to the read buffer 11, and a register 14
A clock signal is input to.

The selector 18 also receives the output of the ROM 6, which stores a microprogram for general or basic instructions stored in the ROM 6, into a register 17.
The microprogram from the R○M 6 can be input to the RAM 5 via the selector 18.

Further, an address counter 15 is connected to the ROM 6.
Address information is now provided. Note that a count-up signal is input to the address counter 15.

A selector signal is input to the selector 18, and the selector 1
8, it is determined by this selector signal whether to select a microprogram of a special programming language from the read buffer 11 or to select a microprogram of n for a general or basic programming language from the ROM 6. ing.

The RAM 5 inputs and stores the microprogram in the microprogram control method executed by the CPLIn from the selector 18 as described above, and the address control unit 20 is connected to the RAM 5 via the selector 22. And by controlling the microprogram (not shown), the address of the microprogram is counted up, branching to a fixed address, unconditional branching, conditional branching, branching and linking (B
Address control necessary for ranch and link), return, etc. is executed.

Further, an address counter 19 is connected to the RAM 5 via a selector 22, and the microprogram from the read buffer 11 or the ROM 6 is stored in memory locations of addresses sequentially input from one address counter in the RAM 5. The microprogram output from RAM 5 is latched in register 21,
The program is supplied to a microprogram execution unit (not shown) via a control bus and executed.

Note that the above configuration is for CPUn, but cp
In a case where the ROM 6 has a plurality of ROMs 6 like the ui, a plurality of ROMs 6 and address counters 15 and registers 17 related to the ROMs 6 are provided in place of the read buffer 11.

The central control device according to one embodiment of the present invention is configured as described above. Next, its effect will be explained.

Initially, when the device is started up, a general or basic microprogram stored in the ROM 6 is loaded into the RAM 5 via the register 17 and selector 18. The operating system (O8) operates according to the microprogram loaded into the RAM 5. In this case, the selector 22 of the RAM 5 selects the address counter 19, and the microprograms are sequentially stored in the address positions from the address counter 19. When the loading is completed, the selector 22 selects the address control section 20, and the address control of the address control section 20 executes the microprogram for each instruction. In addition, multiple CPU
Since each CPLIn has a ROM 6 that stores general or basic microprogramming, the operations described above are executed by these CPUs.

When the predetermined program is started in this way and a predetermined program is being executed, a task that cannot be executed using microprogramming instructions loaded from the ROM 6 in a special programming language such as LISP is executed using a C++ program, for example.
If a request to be executed by PUn is generated, for example, by an information bit in a task control block (TCB) or a setting by a system manager, an appropriate microprogram corresponding to the special programming language is transferred from the bulk memory 4 to the bus. 2 to the main memory 3, from the main memory 3 to the read buffer 11, and from this read buffer 11 via the register 18 to the RAM 5 under the control of the address counter 19; The microprogram stored in the microprogram is replaced from a general or basic microprogram to a microprogram suitable for a special programming language such as the LIMP mentioned above.

When a microprogram suitable for this special programming language is loaded into the RAM 5, the selector 22 selects the address control [1-control unit 20 side] again, and this newly loaded microprogram causes the above-mentioned special programming language to be selected. The command is executed.

Note that, for example, in a CPU newly loaded with a microprogram for LIsP, it is not possible to stop the operating system from running.
It is necessary for the PU to receive instructions on which address in the main memory 3 to execute from another CPtJ where an operating system is running, but this is due to the communication between the CPUs. This can be done by communication command.

In addition, in the above configuration, one grammar uses a CPU dedicated to one language to perform command operations as necessary.
can be dynamically set at any time.

Furthermore, in a computer system with a multiprocessor configuration, one CPU may be reserved for the operating system or gH that does not require special instructions, and another CPU may be dedicated to, for example, LISP. , the remaining CPUs can dynamically provide an environment suitable for the user's needs, such as for FORTRAN.

Note that in the above description and in FIG. 2, since it is preferable to apply the system to a multiprocessor configuration, the explanation is given using a multiprocessor configuration as an example. However, the central system of the present invention! The 2II device is not necessarily limited to such a configuration.

[Effects of the Invention 1] As explained above, according to the present invention, a microprogram with instructions suitable for special instructions specific to other programming languages is read out from the storage means, and the read microprogram is stored in the microprogram memory. Since the stored microprogram executes the program in Ike's programming language, by executing the instructions of the microprogram, it can be executed using special instructions specific to other programming languages.
Efficiently, for example, with a small number of instruction steps, each can be executed at a rapid processing speed.

Ru.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a central control device according to an embodiment of the present invention, and FIG. 2 is a block diagram of a multi-brohiser system using the centrally controlled till device of FIG. 3... Main memory 4... Bulk memory 5... RAM 6... ROM 11... Read buffer?

Claims (1)

[Claims] A central control unit that executes instructions constituting a program in a predetermined programming language in a microprogram control system, comprising a storage means for storing a microprogram of instructions suitable for another programming language, and the above-mentioned others stored in the storage means. command means for instructing to read a microprogram with instructions suitable for the programming language of;
and control means for controlling the microprogram with instructions suitable for the other programming language read out based on the command of the command means to be stored in the microprogram storage section of the microprogram control section. Central control unit.