JPS6387034U - - Google Patents
Info
- Publication number
- JPS6387034U JPS6387034U JP18119086U JP18119086U JPS6387034U JP S6387034 U JPS6387034 U JP S6387034U JP 18119086 U JP18119086 U JP 18119086U JP 18119086 U JP18119086 U JP 18119086U JP S6387034 U JPS6387034 U JP S6387034U
- Authority
- JP
- Japan
- Prior art keywords
- layer
- insulating substrate
- electrode layers
- glaze
- groove
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000010410 layer Substances 0.000 claims description 13
- 239000000758 substrate Substances 0.000 claims description 4
- 238000010438 heat treatment Methods 0.000 claims description 3
- 239000011241 protective layer Substances 0.000 claims description 2
- 238000005338 heat storage Methods 0.000 claims 1
Landscapes
- Electronic Switches (AREA)
Description
第１図は本考案の一実施例の断面図、第２図お
よび第３図は従来の例の断面図である。
１……絶縁基板、２……グレーズ層、３……発
熱抵抗層、３′……発熱寄与抵抗層部分、４ａ，
４ｂ……電極層、５……絶縁保護層、６……溝。
FIG. 1 is a sectional view of one embodiment of the present invention, and FIGS. 2 and 3 are sectional views of conventional examples. DESCRIPTION OF SYMBOLS 1...Insulating substrate, 2...Glaze layer, 3...Heating resistance layer, 3'...Heating contributing resistance layer portion, 4a,
4b... Electrode layer, 5... Insulating protective layer, 6... Groove.
Claims (1)
のためのグレーズ層と、このグレーズ層上に一定
の幅および一定の間隔を以て平行に配列される複
数の発熱抵抗層と、この発熱抵抗層上に所定の間
隔で対向して設けられる複数の電極層と、これら
複数の電極層および前記発熱抵抗層を保護被覆す
る絶縁保護層とからなるサーマルヘツドにおいて
、前記絶縁基板上面の前記電極層の対向する部分
の下部に溝部が設けられ、この溝部に前記グレー
ズ層が上面が平担になるように埋設されてなるこ
とを特徴とするサーマルヘツド。 an insulating substrate, a glaze layer for heat storage installed on the insulating substrate, a plurality of heat generating resistor layers arranged in parallel on the glaze layer with a certain width and a fixed interval, and on the heat generating resistor layer. In a thermal head comprising a plurality of electrode layers facing each other at predetermined intervals, and an insulating protective layer that protects and covers the plurality of electrode layers and the heating resistor layer, the electrode layers on the upper surface of the insulating substrate are arranged opposite to each other. 1. A thermal head, characterized in that a groove is provided at the lower part of the part where the glaze is formed, and the glaze layer is buried in the groove so that the upper surface thereof is flat.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18119086U JPS6387034U (en) | 1986-11-27 | 1986-11-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18119086U JPS6387034U (en) | 1986-11-27 | 1986-11-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6387034U true JPS6387034U (en) | 1988-06-07 |
Family
ID=31125834
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18119086U Pending JPS6387034U (en) | 1986-11-27 | 1986-11-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6387034U (en) |
-
1986
- 1986-11-27 JP JP18119086U patent/JPS6387034U/ja active Pending