JPS6384941U - - Google Patents
Info
- Publication number
- JPS6384941U JPS6384941U JP17895786U JP17895786U JPS6384941U JP S6384941 U JPS6384941 U JP S6384941U JP 17895786 U JP17895786 U JP 17895786U JP 17895786 U JP17895786 U JP 17895786U JP S6384941 U JPS6384941 U JP S6384941U
- Authority
- JP
- Japan
- Prior art keywords
- electrode pad
- conductive adhesive
- substrate
- groove
- bonded
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 claims description 2
- 239000000853 adhesive Substances 0.000 claims 2
- 230000001070 adhesive effect Effects 0.000 claims 2
- 239000004065 semiconductor Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05556—Shape in side view
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05556—Shape in side view
- H01L2224/05557—Shape in side view comprising protrusions or indentations
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17895786U JPH0440277Y2 (US07576130-20090818-C00114.png) | 1986-11-20 | 1986-11-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17895786U JPH0440277Y2 (US07576130-20090818-C00114.png) | 1986-11-20 | 1986-11-20 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6384941U true JPS6384941U (US07576130-20090818-C00114.png) | 1988-06-03 |
| JPH0440277Y2 JPH0440277Y2 (US07576130-20090818-C00114.png) | 1992-09-21 |
Family
ID=31121578
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17895786U Expired JPH0440277Y2 (US07576130-20090818-C00114.png) | 1986-11-20 | 1986-11-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0440277Y2 (US07576130-20090818-C00114.png) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007103439A (ja) * | 2005-09-30 | 2007-04-19 | Optrex Corp | 半導体集積回路 |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1092676B1 (en) * | 1999-03-31 | 2008-01-02 | Seiko Epson Corporation | Narrow-pitch connector, electrostatic actuator, piezoelectric actuator, ink-jet head, ink-jet printer, micromachine, liquid crystal panel, and electronic apparatus |
-
1986
- 1986-11-20 JP JP17895786U patent/JPH0440277Y2/ja not_active Expired
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007103439A (ja) * | 2005-09-30 | 2007-04-19 | Optrex Corp | 半導体集積回路 |
| JP4739895B2 (ja) * | 2005-09-30 | 2011-08-03 | オプトレックス株式会社 | 半導体集積回路 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0440277Y2 (US07576130-20090818-C00114.png) | 1992-09-21 |
