JPS6384637U - - Google Patents
Info
- Publication number
- JPS6384637U JPS6384637U JP17832286U JP17832286U JPS6384637U JP S6384637 U JPS6384637 U JP S6384637U JP 17832286 U JP17832286 U JP 17832286U JP 17832286 U JP17832286 U JP 17832286U JP S6384637 U JPS6384637 U JP S6384637U
- Authority
- JP
- Japan
- Prior art keywords
- input
- computer
- monitoring means
- signal
- state monitoring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000012544 monitoring process Methods 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 6
Landscapes
- Input From Keyboards Or The Like (AREA)
Description
第１図はこの考案の特徴を最も良く表わす主要
図、第１Ａ図はその動作を説明するためのタイミ
ングチヤート、第２図はこの考案の実施例を示す
回路図、第３図はこの考案の他の実施例を示す回
路図、第４図は入力回路の従来例を示す回路図、
第５図は入力回路の他の従来例を示す回路図であ
る。
符号説明、１……計算機（ＣＰＵ）、２……状
態監視部、２Ａ……フリツプフロツプ、３……ス
イツチ、４……表示器、４Ａ……発光ダイオード
（ＬＥＤ）、５……Ｉ／Ｏポート、６……トラン
ジスタ、７……ブザー、８……スイツチ信号読取
部、９……表示点灯回路。
Figure 1 is a main diagram that best represents the features of this invention, Figure 1A is a timing chart to explain its operation, Figure 2 is a circuit diagram showing an embodiment of this invention, and Figure 3 is a diagram of this invention. A circuit diagram showing another embodiment, FIG. 4 is a circuit diagram showing a conventional example of an input circuit,
FIG. 5 is a circuit diagram showing another conventional example of an input circuit. Description of symbols, 1... Computer (CPU), 2... Status monitoring section, 2A... Flip-flop, 3... Switch, 4... Display, 4A... Light emitting diode (LED), 5... I/O port , 6...transistor, 7...buzzer, 8...switch signal reading section, 9...display lighting circuit.
Claims (1)
おいて、 入力信号を受けて所定の出力信号を出す一方、
入力信号が計算機に読み取られたとき該計算機よ
り発せられる信号に応動して前記出力信号の状態
を変化させる状態監視手段と、 該状態監視手段からの出力に応動する表示器ま
たはブザーと を設け、入力チエツクを可能にしてなることを
特徴とするチエツク機能付入力回路。 (2) 実用新案登録請求の範囲第１項に記載のチ
エツク機能付入力回路において、前記状態監視手
段はフリツプフロツプ回路であることを特徴とす
るチエツク機能付入力回路。[Scope of claims for utility model registration] (1) In an input circuit for inputting signals to a computer, while receiving an input signal and outputting a predetermined output signal,
A state monitoring means for changing the state of the output signal in response to a signal emitted from the computer when the input signal is read by the computer, and a display or a buzzer responsive to the output from the state monitoring means, An input circuit with a check function, characterized in that it enables an input check. (2) Utility Model Registration The input circuit with a check function according to claim 1, wherein the state monitoring means is a flip-flop circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17832286U JPS6384637U (en) | 1986-11-21 | 1986-11-21 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17832286U JPS6384637U (en) | 1986-11-21 | 1986-11-21 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6384637U true JPS6384637U (en) | 1988-06-03 |
Family
ID=31120345
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17832286U Pending JPS6384637U (en) | 1986-11-21 | 1986-11-21 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6384637U (en) |
-
1986
- 1986-11-21 JP JP17832286U patent/JPS6384637U/ja active Pending
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