JPS6382121A - Output circuit - Google Patents

Abstract

PURPOSE:To suppress ringing to a small value by connecting a diode to a MOS transistor (TR) whose current path between a source and a drain is inserted between a power supply and an output terminal in a forward direction in series with the current path so as to attain high speed operation. CONSTITUTION:The diodes D1, D2 are connected between the power supply Vcc and an output terminal Vout in series with a current path of the source and drain of the MOS TRs 21, 22 in forward direction. That is, the on-resistance is increased at the end of transient change of an output signal by the diodes D1, D2 connected in series with the MOS TRs 21, 22 to suppress the occurrence of ringing at a load terminal of an external circuit. Since the on-resistance of the diodes D1, D2 is sufficiently small at switching, the increase in the switching time due to the insertion of the diodes D1, D2 is small. Thus, the switching speed is improved effectively while the ringing is suppressed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to an output circuit that is formed inside a semiconductor integrated circuit and outputs a logic signal to the outside using a MOS transistor.

(Prior art) An output circuit provided inside a semiconductor integrated circuit is, for example,
It has a configuration as shown in Fig. 8 or Fig. 9.
The output circuit shown in the figure is constructed by connecting N'8 V cc, a transistor 11, and an N-channel MOS transistor 12 in series. Furthermore, the output circuit shown in FIG.
- transistor 13 and N-channel MOS transistor 1
4 is connected in series.

Generally, a capacitive load such as an input capacitor of an external circuit is often connected to an output terminal of an output circuit, and an inductance component is present in the wiring from the output terminal to the load of the external circuit. Therefore, since a capacitive load is also connected to the output terminal yout of the output circuit shown in FIGS. 8 and 9, charging and discharging the equivalent capacitance of the load is necessary to increase the switching speed. needs to be faster. Therefore, the MOS transistor 11.
12. It is necessary to design the on-resistance of 14 to be small.

FIG. 10 shows a circuit corresponding to the output state of the output circuit in FIG. 8, and the resistor Ron is connected to the N-channel MO
Corresponds to the on-resistance of the S transistor 12, and the inductor L
corresponds to the sum of the inductance of the internal wiring and the inductance of the wiring to the external circuit. Further, the capacitor OL represents the input capacitance of the external circuit.

In the circuit shown in Fig. 10, when the output signal falls, that is, when the switch S is switched from position a to position a, the output waveform of the output voltage V becomes monotonous if the resistance value of the resistor Ron is sufficiently large. It becomes a damped waveform. However, the resistance Ron
When the resistance value of is small, the output voltage ■ becomes an attenuated CO8 waveform as shown in FIG. 11, and ringing occurs. This is because when the resistance value of the resistor ROn is small, sufficient damping is not applied to the resonant circuit consisting of the inductor L and the capacitor CL.

The resistance value of the resistor ROn, which is the boundary between a monotonous attenuation waveform and a ringing state, is determined by the capacitor C, for example.
When L=50 [pF] and inductor value=10 [nH], it is about 28 [Ω]. This value is relatively large.

Although only the fall of the output signal of the output circuit of FIG. 8 has been explained, the rise of the output signal of the output circuit of FIG.
When the output signal of the output circuit shown in the figure changes by turning on, the same phenomenon as described above occurs.

Preferably, ringing does not occur because ringing is detrimental to external circuitry receiving the output signal.

Furthermore, even if ringing occurs, its magnitude must be kept sufficiently small.

Therefore, due to the ringing problem, the on-resistance of the MOS transistors 11, 12, and 14 in FIGS. 8 and 9 cannot be made very small. For this reason, the value of the output current is limited, making it impossible to improve the switching speed.

(Problems to be Solved by the Invention) This invention was made in view of the above points, and the conventional output circuit cannot increase the output current due to the ringing problem, which limits the operating speed. The present invention aims to improve the above points and provide an output circuit that is capable of high-speed operation and that can suppress ringing to a sufficiently low level.

[Structure of the Invention] (Means for Solving the Problems) That is, the output circuit according to the present invention includes a MOS transistor in which a source-drain current path is inserted between a power source and an output terminal. In contrast, a diode is connected in series with the current path and in the forward direction.

(Function) In an output circuit equipped with the above means, MOS
By a diode connected in series with a transistor,
When the transient change in the output signal ends, its on-resistance increases, suppressing ringing at the load end of the external circuit. Furthermore, during switching, the on-resistance of the diode is sufficiently small, so that the increase in switching time due to insertion of the diode is small.

61 (Example) The present invention will be described in detail below with reference to the drawings. FIG. 1 shows an output circuit according to an embodiment of the present invention.
A P-channel MOS transistor 21 and an N-channel MOS transistor 22 are connected in series between the voltage m V cc and the ground (earth power supply) Vss. That is, the source electrode of the P-channel MOS transistor 21 is connected to the power supply Vcc, and the drain electrode is connected to the N
It is connected to the train electrode of channel MOS transistor 22, and the source electrode of this transistor 22 is grounded.

A first input terminal V1 to which a first input signal from the previous stage is supplied is connected to the gate electrode of the transistor 21, and a second input terminal V1 from the previous stage is connected to the gate electrode of the transistor 22. A second input terminal V2, to which a signal is supplied, is connected.

Further, the drain electrode of the transistor 21 is connected to the anode of the first diode D1, and the anode of the second diode D2 is connected to the cathode of the first diode D1. The cathode of the second diode D2 is connected to the drain electrode of the transistor 22, and the connection point between the diodes D1 and D2 is connected to an output terminal (Out) for taking out an output signal.

That is, when L I+ level signals are supplied to both input terminals V1 and V2, P-channel MOS transistor 21 is turned on, and N-channel MOS transistor 22 is turned off.

As a result, current flows from the power supply VCC to the output terminal yout via the transistor 21 and the first diode D1.
and charges a capacitor (not shown) connected as a load to the input of the external circuit. In this case, during such switching, the on-resistance of the diode D1 is sufficiently small, and since there is an inductance component between the output terminal yout and the load (capacitor), the charging current is transferred by the diode D1. Hardly reduced.

If the voltage drop due to the first and second diodes DI and D2 is Vd, the voltage at the output terminal VOut is Vc
When in the range from c-Vd to Vcc+Vd, both diodes D1 and D2 are in the off state.

Therefore, at this time, the output impedance becomes high, and ringing at the load end can be damped.

When the voltage at the output terminal vout is equal to or higher than Vcc+Vd, the second diode D2 is in the on state, and the current is
It flows from the output terminal Vout to the power supply vCC via the second diode D2 and the transistor 21. As a result, the overshoot at the rise of the output signal is
Vcc+Vd +Vp T:')y>pull. Here, ■p is a voltage drop due to the on-resistance of the transistor 21.

The same thing can be considered when the output signal falls, that is, when input signals of "H" level are supplied to the input terminals V1 and V2.In other words, the voltage of the output terminal V Out is V
When in the range from ss-Vd to VSS+Vd,
Since both the first and second diodes D1 and D2 are in the OFF state, the output impedance increases and ringing at the load end is damped. In addition, the output terminal Vou
When the voltage at t is below Vss-Vd, the diode D1 is turned on, and current flows from the ground Vss to the output terminal Out via the transistor 22 and the diode D1. As a result, the undershoot at the fall of the output signal is clamped at Vss-Vd-Vn. Here, Vn is a voltage drop due to the on-resistance of the transistor 22.

Even if the conductance of the transistors 21 and 22 is increased, it is possible to maintain the high impedance state at the output terminal yout as described above, so ringing can be generated by reducing the on-resistance of the transistors 21 and 22. It will be possible to increase the switching speed without having to do so.

FIG. 2 shows a second embodiment of the output circuit according to the present invention, and the same components as those of the output circuit shown in FIG. 1 are given the same reference numerals, and detailed explanation thereof will be omitted. The output circuit shown in FIG. 2 is provided with a P-channel MOS transistor 23 and an N-channel MOS transistor 24, each having a higher on-resistance than the transistors 21 and 22, and these transistors 23 and 24 are connected to the power supply Vcc and the ground Vss. connected in series between. Further, the drain electrode of the transistor 23 is connected to the cathode of the first diode D1, and the source electrode of the transistor 24 is connected to the anode of the second diode D2. and,
The output signal is taken out from the connection point between the diodes D1 and D2.

Therefore, the static output voltage at the output terminal y out is:
It will definitely be VCC or Vss. Furthermore, since the on-resistances of the transistors 23 and 24 are relatively large, ringing can be suppressed to a sufficiently low level.

FIG. 3 shows a third embodiment of the output circuit according to the present invention.
diodes D1 and D2 are connected in series in the forward direction. Therefore, the voltage at the output terminal ■Out is V
When in the range from cc - V d to Vcc + Vd,
It becomes a high impedance state and can dampen ringing at the load end.

This output circuit does not have the clamping effect of overshoot and undershoot at the rise and fall of the output signal, but compared to the output circuits shown in Figures 1 and 2, it is It becomes possible to reduce the through current to the terminals, and even higher speed operation becomes possible.

FIG. 4 shows a fourth embodiment of the invention, in which third and fourth diodes D3 and D are added to the circuit shown in FIG.
4 has been added. In this case, the cathode of the third diode is connected to the voltage ai V cc and its anode is connected to the output terminal vout. Further, the cathode of the fourth diode D4 is connected to the output terminal VOut, and the anode thereof is grounded. With such a configuration, overshoot and undershoot at the rise and fall of the output signal can be clamped.

FIG. 5 shows a fifth embodiment of the invention, in which a first diode D1 is connected between the voltage IVcc and the transistor 21, and a second diode D2 is connected between the transistor 22 and the ground VSS. It was designed to connect. This output circuit has the same effect as the output circuit shown in FIG.

FIG. 6 shows a sixth embodiment of the output circuit according to the present invention, in which an open-drain output circuit is constructed using only the N-channel transistor 22 and second diode D2 of the output circuit shown in FIG. It is composed of

FIG. 7 shows a seventh embodiment of the present invention, in which an output circuit is constructed by combining bipolar transistors and MOS transistors. Even in the output circuit having such a configuration, by using the diode D2 connected between the NPN transistor 25 and the N-channel MOS transistor 22, substantially the same effect as the output circuit shown in FIG. 3 can be obtained.

Note that the diodes D1 to D4 used in the above embodiments
may be either a PN junction diode or a Schottky barrier diode.

[Effects of the Invention] As described above, according to the present invention, an MO in which a source-drain current path is inserted between a power supply and an output terminal.
By connecting a diode to the S transistor in series with its current path and oriented in the forward direction, its on-resistance increases at the end of the transient change in the output signal.
It becomes possible to suppress the occurrence of ringing at the load end of the external circuit. Furthermore, during switching, the on-resistance of the diode is sufficiently small, so by increasing the size of the MOS transistor, the switching speed can be effectively improved while suppressing ringing.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an output circuit according to an embodiment of the present invention, FIGS. 2 to 7 are circuit diagrams showing other embodiments of the invention, and FIGS. A circuit configuration diagram showing a conventional output circuit, FIG. 10 is an equivalent circuit diagram corresponding to the output state of the output circuit shown in FIG. 8, and FIG. 11 is a change state of the output signal of the output circuit shown in FIG. 8. FIG. 21, 23...P channel MOS transistor, 2
2゜24...N channel MOS transistor, D1
~D4...Diode, 25...NPN transistor. Applicant's Representative Patent Attorney Takehiko Suzue Figure 1 Figure 3 Figure 5 Figure 2 Figure 4 Figure 6 Figure 7 Vcc Figure 8 Figure 10

Claims (2)

[Claims] (1) In an output circuit that is formed inside a semiconductor integrated circuit and uses MOS transistors to output logic signals to the outside, a source-drain current path is inserted between the power supply and the output terminal, and the input from the previous stage is An output circuit comprising: a MOS transistor whose conduction is controlled by a signal; and a diode connected in series to the current path in a forward direction. (2) In an output circuit that is formed inside a semiconductor integrated circuit and uses MOS transistors to output logic signals to the outside, a source-drain current path is inserted between one side of the power supply and the output terminal, and a first MOS transistor of a first conductivity type whose conduction is controlled by a first input signal; a first diode connected in series to the current path of the first MOS transistor in a forward direction; a second MOS transistor of a second conductivity type, in which a source-drain current path is inserted between the other side of the power supply and the output terminal, and whose conduction is controlled by a second input signal from the previous stage; and a second diode connected in series to the current path of the second MOS transistor in the same direction.