JPS6378608A - Channel selection device - Google Patents

Channel selection device

Info

Publication number
JPS6378608A
JPS6378608A JP22194286A JP22194286A JPS6378608A JP S6378608 A JPS6378608 A JP S6378608A JP 22194286 A JP22194286 A JP 22194286A JP 22194286 A JP22194286 A JP 22194286A JP S6378608 A JPS6378608 A JP S6378608A
Authority
JP
Japan
Prior art keywords
signal
circuit
channel
supplied
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22194286A
Other languages
Japanese (ja)
Inventor
Katsuto Minazu
水津 勝登
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP22194286A priority Critical patent/JPS6378608A/en
Publication of JPS6378608A publication Critical patent/JPS6378608A/en
Pending legal-status Critical Current

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  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)

Abstract

PURPOSE:To inform a reception state to a user, and to prevent the irregularity of a picture from occurring at time of no signal, by supplying a video signal to a CRT by controlling a signal selection circuit for a channel with a signal, and supplying a fixed signal from a signal generation circuit to the CRT for the channel without the signal, at the time of operating a memory. CONSTITUTION:A switching signal '1' is supplied from a channel selection circuit 9 to a terminal 22 at a preset time. Meanwhile, the signal '1' is supplied from a signal detection circuit 8 to a terminal 21 when the signal is present, and it is inverted at an inverter 24, and is changed to a signal '0', then it is added on an AND circuit 25. The signal selection circuit 5 introduces the output of an amplifier circuit 4 to the CRT6 (display device) 6, and displays an image by a broadcasting signal. However, in the channel without the signal, the signal '0' is supplied from the signal detection circuit 8 to the terminal 21, and it is inverted at the inverter 24. In this way, the signal selection circuit 5 is switched so as to introduce the fixed signal from the signal generation circuit 7 to the CRT6, and the image by the fixed signal is displayed on the CRT6, and the irregularity of the picture due to noise, etc., can be prevented from occurring.

Description

【発明の詳細な説明】 〔発明の目的〕 (産業上の利用分野) 本発明はテレビジ四ン受像機において。[Detailed description of the invention] [Purpose of the invention] (Industrial application field) The present invention relates to a television receiver.

所定チャンネルの放送を受信する場合、各チャンネルの
データを予めメモリに記憶(プリセット)シておき、キ
ー操作によって、記憶した任意のチャンネルデータな読
出し、希望するチャンネルを選局するようにした選局装
置に関する。
When receiving the broadcast of a predetermined channel, the data of each channel is stored (preset) in the memory in advance, and by key operation, the stored arbitrary channel data is read out and the desired channel is selected. Regarding equipment.

(従来の技術) 第3図は従来の選局装置を示すブロック図であり、1は
アンテナ、2はチューナ、3は中間周波増幅ならびに映
像検波を行う信号処理回路、4は映像増幅回路である。
(Prior art) Fig. 3 is a block diagram showing a conventional channel selection device, in which 1 is an antenna, 2 is a tuner, 3 is a signal processing circuit that performs intermediate frequency amplification and video detection, and 4 is a video amplification circuit. .

この増幅回路4の出力は信号選択回路5を介してCR,
T等の表示装置6に供給されるが、信号選択回路5には
固定信号発生回路7からの信号も供給されている。さら
に信号処理回路3の出力は信号検出回路8に供給され、
その検出出力は選局回路9に供給されている。選局回路
9にはメモリ10およびキー入力回路11が接続され、
かつ選局回路9はチューナ2および信号選択回路6にも
接続されている。
The output of this amplifier circuit 4 is passed through a signal selection circuit 5 to CR,
The signal selection circuit 5 is also supplied with a signal from a fixed signal generation circuit 7. Furthermore, the output of the signal processing circuit 3 is supplied to the signal detection circuit 8,
The detection output is supplied to the tuning circuit 9. A memory 10 and a key input circuit 11 are connected to the channel selection circuit 9.
The tuning circuit 9 is also connected to the tuner 2 and the signal selection circuit 6.

この第3図の回路の動作を説明すると9選局回路9で制
御され、たチューナ2は、アンテナ1からの信号に対し
て特定の周波数に同調して希望するチャンネルの信号を
受信する。信号処理回路3で検波された映像信号は通常
、増幅回路4、選択回路6を介してCBr4に供給され
表示される。
The operation of the circuit shown in FIG. 3 will be described. The tuner 2 is controlled by a channel selection circuit 9, and tunes to a specific frequency with respect to the signal from the antenna 1 to receive the signal of a desired channel. The video signal detected by the signal processing circuit 3 is normally supplied to the CBr 4 via an amplifier circuit 4 and a selection circuit 6 for display.

上記選局回路9はキー入力回路11からのキー操作に基
いて、所定チャンネルのデータをメモリ10から読出し
、チューナ2を制御するものであるが、メモリ10への
データの書込み(プリセット)は次の如く行われる。第
4図のフローチャートを参照して説明する。
The tuning circuit 9 reads data of a predetermined channel from the memory 10 based on key operations from the key input circuit 11 and controls the tuner 2. Writing (presetting) data to the memory 10 is performed as follows. It is done as follows. This will be explained with reference to the flowchart in FIG.

プリセットに際し、キー入力回路11によって選局回路
9にメモリ動作の開始を指示すると。
When presetting, the key input circuit 11 instructs the channel selection circuit 9 to start memory operation.

信号選択回路5に対し切換信号が供給され、信号発生回
路7からの固定信号がCBr4に供給されるように切換
わる(ステップ1)。その後チャンネルアップの動作を
行い別のチャンネルを受信する(ステップ2)。この状
態において信号検出回路8の出力によって放送信号が有
るか否かの判定を行い(ステップ3)、信号有りのとき
にはメモリー10にそのチャンネルのデータを記憶しく
ステップ4)、信号無しのときは1信号無〃であること
を記憶する(ステップ5)。こうして全チャンネルにつ
いて実行し、すべてのチャンネルでの実行が完了した時
点で信号選択回路5に対する切換信号を解除しくステッ
プ6.7)、増幅回路4の出力をCBr4に導くように
切換える。こうしてメモリ動作時器このプリセット時、
CBr4に信号発生回路7からの固定信号を供給する理
由は、メモリ動作中は信号の有無に関からす全てのチャ
ンネルを受信する訳であり、信号が無い場合の画面の乱
れを防ぐためである。この固定信号の供給によってCR
,T6には2例えば特定色の単一画面が表示され1画面
上にノイズ等を生じることを防止できる。
A switching signal is supplied to the signal selection circuit 5, and the fixed signal from the signal generation circuit 7 is switched to be supplied to the CBr 4 (step 1). Thereafter, a channel up operation is performed to receive another channel (step 2). In this state, it is determined whether or not there is a broadcast signal based on the output of the signal detection circuit 8 (step 3), and if there is a signal, the data of that channel is stored in the memory 10 (step 4), and if there is no signal, it is determined that there is a broadcast signal (step 3). The fact that there is no signal is memorized (step 5). The process is executed for all channels in this way, and when the process for all channels is completed, the switching signal to the signal selection circuit 5 is released (step 6.7), and the output of the amplifier circuit 4 is switched to lead to the CBr4. In this way, the memory operation timer is set at this preset time.
The reason why a fixed signal is supplied from the signal generation circuit 7 to the CBr4 is that during memory operation, all channels are received regardless of the presence or absence of a signal, and this is to prevent screen distortion when there is no signal. . By supplying this fixed signal, CR
, T6, for example, a single screen of a specific color is displayed, and it is possible to prevent noise from occurring on one screen.

尚、信号検出回路8では例えば同期信号の有無が検出さ
れ、同期信号が有るとき罠は「High」、無いときに
は「Low Jの信号が出力され。
The signal detection circuit 8 detects the presence or absence of a synchronizing signal, for example, and outputs a "High" signal when a synchronizing signal is present, and a "Low J" signal when there is no synchronizing signal.

この出力を受げて選局回路9では信号の存在するチャン
ネルを判別する。
Upon receiving this output, the channel selection circuit 9 determines the channel on which the signal is present.

(発明が解決しようとする問題点) 以上述べたような選局装置では、メモリ動作を実行中は
、CBr4には常に固定信号が供給されるので、ユーザ
ーはこの状態において増幅回路4の出力がどの様である
か、即ち受信信号がどの様であるかを認識することがで
きな〜ゝO そこで本発明は、上記欠点を解決してユーザーに受信状
態を知らしめることができるようにし、かつ無信号時に
は画面の乱れを防止するようにした選局装置を提供する
ことを目的とする。
(Problems to be Solved by the Invention) In the above-described channel selection device, a fixed signal is always supplied to CBr4 while memory operation is being performed, so the user can check the output of amplifier circuit 4 in this state. Therefore, the present invention solves the above-mentioned drawbacks and makes it possible to inform the user of the reception status. An object of the present invention is to provide a channel selection device that prevents screen disturbances when there is no signal.

〔発明の構成〕[Structure of the invention]

(問題点を解決するための手段) 本発明は、メモリ動作時に、信号検出回路からの出力を
利用して、信号有りのチャンネルについては信号選択回
路を制御して映像信号がCR,Tに供給されるようにし
、信号無のチャンネルについては信号発生回路からの固
定信号がcR,Tに供給されるようにしたものである。
(Means for Solving the Problems) The present invention utilizes the output from the signal detection circuit during memory operation to control the signal selection circuit for channels with signals so that video signals are supplied to CR and T. For channels with no signal, fixed signals from the signal generation circuit are supplied to cR and T.

(作用) 本発明では、信号検出回路の出力が信号無のときには固
定信号による特定の画像がCRT上に表示され、信号有
りのときにはそのチャンネルの映像信号による画像がC
RT上に表示されるようになる。
(Function) In the present invention, when there is no signal in the output of the signal detection circuit, a specific image based on a fixed signal is displayed on the CRT, and when there is a signal, an image based on the video signal of that channel is displayed on the CRT.
It will be displayed on RT.

(発明の実施例) 本発明の一実施例を第1図に示す。第1図において従来
の第3図と異なる点は、信号切換え制御回路12が設け
られた点にある。この信号切換え制御回路12は、前記
信号検出回路8からの出力と2選局回路9からの切換え
信号とが供給され1選択切換え信号を出力するものであ
り、その具体回路例を第2図に示している。
(Embodiment of the Invention) An embodiment of the present invention is shown in FIG. The difference in FIG. 1 from the conventional FIG. 3 is that a signal switching control circuit 12 is provided. This signal switching control circuit 12 is supplied with the output from the signal detection circuit 8 and the switching signal from the 2-channel selection circuit 9, and outputs a 1 selection switching signal. A specific example of the circuit is shown in FIG. It shows.

第2図において、端子21には信号検出回路8の出力が
供給され、信号有りのときは論理「1」、信号無しのと
きは論理「0」の信号が加わる。また端子22には選局
回路9からの切換え信号が供給され1通常時は「0」、
プリセット時は「1」の信号が加わる。端子21はイン
バータ24を介してアンド回路25の第1入力端に接続
され、端子22はアンド回路25の第2入力端に接続さ
れ、アンド回路25の出力端は出力端子23に接続され
ている。この出力端子23は信号選択回路5の制御部に
接続される。
In FIG. 2, the output of the signal detection circuit 8 is supplied to a terminal 21, and a logic "1" signal is applied when a signal is present, and a logic "0" signal is applied when a signal is absent. In addition, a switching signal from the tuning circuit 9 is supplied to the terminal 22;
At the time of presetting, a signal of "1" is added. The terminal 21 is connected to the first input terminal of the AND circuit 25 via the inverter 24, the terminal 22 is connected to the second input terminal of the AND circuit 25, and the output terminal of the AND circuit 25 is connected to the output terminal 23. . This output terminal 23 is connected to the control section of the signal selection circuit 5.

前記信号選択回路5は、出力端子23の出力が例えば「
1」のときには信号発生回路7からの信号をCR,T6
に導き、「0」のときには増幅回路4からの信号をCR
T6に導くように切換えられる。
The signal selection circuit 5 is configured so that the output of the output terminal 23 is, for example, "
1”, the signal from the signal generation circuit 7 is CR, T6
When it is "0", the signal from the amplifier circuit 4 is CR
It is switched to lead to T6.

尚、第1図の切換え信号制御回路12以外の構成は、第
3図と同じゆえ、詳細な説明は省略する。
Note that the configuration other than the switching signal control circuit 12 in FIG. 1 is the same as that in FIG. 3, so a detailed explanation will be omitted.

本発明の動作について説明すると2通常時には選局回路
9から切換え信号「0」が端子22に供給され、信号検
出回路8から信号有りを表わす信号「1」が端子21に
供給される。これにより、アンド回路25の両人力は「
0」となり、出力端子23には「0」の選択切換え信号
が発生し。
To explain the operation of the present invention, 2. Normally, a switching signal "0" is supplied from the channel selection circuit 9 to the terminal 22, and a signal "1" representing the presence of a signal is supplied from the signal detection circuit 8 to the terminal 21. As a result, the power of the AND circuit 25 is “
0", and a selection switching signal of "0" is generated at the output terminal 23.

信号選択回路δは増幅回路4の出力をCRT6に導くよ
うに切換わる。
The signal selection circuit δ is switched to guide the output of the amplifier circuit 4 to the CRT 6.

次にプリセット時について述べると、このとき選局回路
9から切換え信号「1」が端子22に供給される。一方
、信号検出回路8からは、信号有のときKは信号「1」
が端子21に供給され。
Next, the presetting time will be described. At this time, the switching signal "1" is supplied from the tuning circuit 9 to the terminal 22. On the other hand, from the signal detection circuit 8, when there is a signal, K is the signal "1".
is supplied to terminal 21.

インバータ24で反転され、信号「0」となってアンド
回路26に加わる。したがって出力端子23の出力は「
0」となり、信号選択回路5は増幅回路4の出力をCR
,T6に導き、プリセット時にあっても放送信号による
画像を表示することができる。ただし無信号チャンネル
になると信号検出回路8からはrOJの信号が端子21
に供給されるため、これがインバータ24で反転され。
The signal is inverted by the inverter 24, becomes a signal "0", and is applied to the AND circuit 26. Therefore, the output of the output terminal 23 is "
0'', and the signal selection circuit 5 converts the output of the amplifier circuit 4 into CR.
, T6, and an image based on the broadcast signal can be displayed even during presetting. However, when the channel becomes a no-signal channel, the rOJ signal is sent from the signal detection circuit 8 to the terminal 21.
This is inverted by the inverter 24.

アンド回路250両入力が「1」となり、出力端子23
の出力は「1」となる。これにより信号選択回路5は、
信号発生回路7からの固定信号をCR,T6に導くよう
に切換わり、プリセット時でも無信号チャンネルの場合
には固定信号による画像がCR,T6に表示され、ノイ
ズ等による画面の乱れを防止できる。
Both inputs of the AND circuit 250 become "1", and the output terminal 23
The output of is "1". As a result, the signal selection circuit 5
The fixed signal from the signal generation circuit 7 is switched to be guided to CR and T6, and even during presetting, if there is no signal channel, an image based on the fixed signal is displayed on CR and T6, preventing screen disturbances due to noise etc. .

このよう一本発明によれば、プリセット時に。Thus, according to one aspect of the present invention, at the time of presetting.

選局回路9からの切換え信号が信号選択回路5に対して
固定信号を選択する様に要求しているとき、信号検出回
路8の出力が信号無の状態にあっては固定信号をCR,
’!”6に導き、信号有りの状態にあっては増幅回路4
の出力をCR,T6に導くようにしている。
When the switching signal from the channel selection circuit 9 requests the signal selection circuit 5 to select a fixed signal, if the output of the signal detection circuit 8 is in the state of no signal, the fixed signal is CR,
'! 6, and when there is a signal, the amplifier circuit 4
The output is led to CR, T6.

したがってプリセット時でもユーザーに対してチューナ
2が同調した周波数に関し、放送信号が有るときはCR
,T6に放送信号を再現し。
Therefore, even during presetting, when there is a broadcast signal, CR
, reproduce the broadcast signal on T6.

放送信号が無いときは固定信号を再現して、受信状態を
知らすことができる。
When there is no broadcast signal, a fixed signal can be reproduced to notify the reception status.

尚、切換え信号制御回路12は第2図で示されるような
構成に限らず、他の回路であっても同様の作用を達成す
るものであれば、どのような構成であってもかまわない
Note that the switching signal control circuit 12 is not limited to the configuration shown in FIG. 2, but may be any other circuit as long as it achieves the same effect.

〔発明の効果〕〔Effect of the invention〕

以上述べたように本発明の選局装置によれば、メモリ動
作実行中(プリセット時)に、無信号チャンネルにあっ
てはCEI、T上での画面の乱れを防止し、有信号チャ
ンネルにあってはその放送信号映像を(ILT上に再現
して受信状態をユーザーに知らすことができ1機能向上
に役立つ。
As described above, according to the channel selection device of the present invention, during execution of memory operation (during presetting), it is possible to prevent screen disturbances on CEI and T for non-signal channels, and to prevent screen disturbances on CEI and T for signal channels. In addition, the broadcast signal image can be reproduced on the ILT to inform the user of the reception status, which is useful for improving functionality.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の選局装置を示すブロック図。 第2図は本発明装置で用いられる切換え信号制御回路の
一例を示す回路1ス、第3図は従来の選局装置を示すブ
ロック図、第4図は第3図の動作説明用のフローチャー
トである。 2・・・・・・チューナ、  3・・・・、・・信号処
理回路。 4・・・・・・増幅回路、  5・−・・・・信号選択
回路。 7・・・・・・信号発生回路、8・・・・・・信号検出
回路。 9・・・・・・選局回路、10・・・・・・メモリ。 11・・・・・・キー入力回路。 12・・・・・・切換え信号制御回路。 代理人 弁理士  則 近 憲 借 問 宇治 弘 プリセラ)1                 固定
信号選択 1通   常 0 第2図
FIG. 1 is a block diagram showing a channel selection device of the present invention. FIG. 2 is a circuit diagram showing an example of a switching signal control circuit used in the device of the present invention, FIG. 3 is a block diagram showing a conventional channel selection device, and FIG. 4 is a flowchart for explaining the operation of FIG. be. 2...Tuner, 3...,...Signal processing circuit. 4... Amplification circuit, 5... Signal selection circuit. 7... Signal generation circuit, 8... Signal detection circuit. 9...Tuition selection circuit, 10...Memory. 11...Key input circuit. 12...Switching signal control circuit. Agent: Patent attorney: Nori Chika (Interview: Hiropricera Uji) 1 Fixed signal selection 1 Normal 0 Figure 2

Claims (1)

【特許請求の範囲】 放送信号を選択的に受信するチューナと、 受信した信号を検波増幅処理するための第1の回路、お
よび固定信号を発生する第2回路と、上記第1の回路と
第2の回路からの信号のいずれか一方を選択して表示装
置に導くための信号選択回路と、 チャンネルデータを記憶するメモリおよび選局回路を有
し、前記チューナを制御して希望するチャンネルを選択
受信する選局手段と、 前記第1の回路に接続され、受信信号の有無を検出する
信号検出回路と、 前記メモリに所定チャンネルデータを書込むプリセット
時に、前記信号検出回路回路の出力状態が有信号のとき
には前記第1の回路の出力を前記表示装置に導き、無信
号のときには前記第2の回路の出力を前記表示装置に導
くように前記信号選択回路を切換え制御する手段とを具
備して成る選局装置。
[Claims] A tuner for selectively receiving broadcast signals, a first circuit for detecting and amplifying the received signal, and a second circuit for generating a fixed signal, the first circuit and the first circuit for generating a fixed signal. a signal selection circuit for selecting one of the signals from the second circuit and guiding it to a display device; a memory for storing channel data; and a channel selection circuit; and controlling the tuner to select a desired channel. a signal detecting circuit connected to the first circuit and detecting the presence or absence of a received signal; and a signal detecting circuit that detects an output state of the signal detecting circuit at the time of presetting to write predetermined channel data in the memory. means for switching and controlling the signal selection circuit so that the output of the first circuit is guided to the display device when there is a signal, and the output of the second circuit is guided to the display device when there is no signal. A channel selection device consisting of:
JP22194286A 1986-09-22 1986-09-22 Channel selection device Pending JPS6378608A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22194286A JPS6378608A (en) 1986-09-22 1986-09-22 Channel selection device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22194286A JPS6378608A (en) 1986-09-22 1986-09-22 Channel selection device

Publications (1)

Publication Number Publication Date
JPS6378608A true JPS6378608A (en) 1988-04-08

Family

ID=16774568

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22194286A Pending JPS6378608A (en) 1986-09-22 1986-09-22 Channel selection device

Country Status (1)

Country Link
JP (1) JPS6378608A (en)

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