JPS6373731A - Spread spectrum communication demodulator - Google Patents

Abstract

PURPOSE:To miniaturize and simplify the entire constitution by using the same matched filter in common not only to initial connection processing but also to synchronizing process processing keeping synchronizing state. CONSTITUTION:When the system is led once into the synchronizing state, correlation output signals I, Q repeat a triangle wave period taking a high correlation level and a period taking nearly 0 level alternately. A shift clock generating circuit 13 changes the period of shift clock signals SIHI, SHQ in response to the deviation of timing to allow a data demodulation section 16 to fetch the signal at the peak point of the correlation output signals I, Q. Thus, the synchronizing state with the reference PN signal PNGEN of the reception signal SS is kept. Thus, the matched filters 10, 11 are used to maintain the synchronizing state and the constitution is much simplified and miniaturized in comparison with a conventional equipment.

Description

DETAILED DESCRIPTION OF THE INVENTION A. Field of Industrial Application The present invention relates to a spread spectrum communication demodulator, and can be applied to, for example, a ranging system using an artificial satellite.

B. Summary of the Invention The present invention provides a spread spectrum communication demodulator that uses the same matched filter not only for initial connection processing to enter a synchronized state, but also for synchronization process processing for maintaining a synchronized state, thereby improving overall performance. This allows the configuration to be made smaller and simpler.

C. Conventional technology The spread spectrum communication system modulates the information signal (baseband signal) to be transmitted with a pseudo-noise code (called a PN code) that has a sufficiently wider spectrum width than the information signal. It is a communication method that spreads and transmits the information, and is characterized by the fact that by assigning PN codes with sufficiently small cross-correlation to each communication channel, it is possible to achieve high confidentiality with almost no crosstalk between each communication channel. .

When receiving a transmission signal using this spread spectrum communication method, a reference PN signal is generated inside the demodulator, and the phase is synchronized with the received PN signal included in the spread spectrum reception signal (this is PN synchronized). A so-called despreading process is performed to obtain a high autocorrelation output, and the baseband signal is extracted from the transmission signal and sent to the data demodulator.

This PN synchronization process includes a so-called initial connection stage for bringing the received PN signal and the reference PN signal into a synchronized state;
Conventionally, the sliding method shown in FIG. 7 has been adopted as the initial connection method.

That is, the received signal SS and the reference PN signal PNGEN sent from the PN generation circuit 1 are multiplied in the multiplier 2, and the multiplied output MUL is sent to the enprobe detection circuit 3.
and when the controller (not shown) determines PN synchronization and determines that synchronization has not been obtained based on the obtained enprobe detection output ENV, the generation timing of the reference PN signal PNGEN from the PN generation circuit 1 is determined. Based on *P
The PN code constituting the N signal is shifted by one chip, as follows:
Similar operations are repeated to obtain PN synchronization.

Here, the PN code has an autocorrelation function C when the phases of the received PN signal and the reference PN signal match as shown in FIG.
It is determined that when OE becomes very high and the phases do not match, the autocorrelation number CON becomes approximately O,
Therefore, it can be determined that PN synchronization has been achieved when the enprobe level of the multiplication output MUL exceeds a predetermined threshold level.

However, according to the sliding method, the PN synchronization state can be determined only once per period of the PN code;
N It takes a long time (4 [seconds] in practice) to enter the synchronized state.
degree).

By the way, surface acoustic wave delay line, COD (charge
With the development of digital technology, a matched filter 5 as shown in FIG. 9 has come to be used in the demodulator. That is, the received signal SS is input to the shift register 6, the reference PN signal PNatN is set to the register 7, and the matching determination section 8
It is determined whether the data in the corresponding positions of the shift register 6 and the register 7 match or not, and a determination output SO having a signal level corresponding to the number of -several pieces is outputted from the summation unit 9, whereby the reference PN signal PNt, received signal SS
The autocorrelation with the received PN signal included in the PN signal is taken.

If this matched filter method is used, it is theoretically possible to achieve PN synchronization with respect to the received signal SS within a short time period of about one cycle of the PN code.

D Problems to be Solved by the Invention However, even in a demodulator using a matched filter as described above, in the synchronization process stage, there is a sliding shift that allows the reference PN signal to be easily phase-shifted in order to maintain the PN synchronization relationship. Configuration using the sliding DL method (sliding DL
L method and τ dither method) are adopted.

Therefore, as a configuration for obtaining PN synchronization by despreading processing, it is necessary to separately form an initial connection configuration and a synchronization process configuration, resulting in a problem that the configuration becomes large and expensive.

The present invention has been made in consideration of the above points, and is capable of processing the synchronization process using a matched filter for the initial connection of PN synchronization, and is a spread spectrum communication system capable of further downsizing and simplifying the overall configuration. The present invention aims to provide a demodulator.

E Means for Solving the Problem In order to solve this problem, in the present invention, the received signal SS, which is a spread spectrum signal, and the internally generated reference PN signal PNGtN are combined into a matched filter 10,
Correlation output signal 1.11 between the received signal SS obtained from the matched filter 10.11 and the reference PN signal pNets. In a spread spectrum communication demodulator that draws into a synchronized state based on The reference PN signal P is determined by the detection output.
N. The relative phase of the received signal SS is shifted to maintain the synchronized state.

F action Once pulled into the synchronized state, the correlation output signal! , Q alternately repeats triangular wave-like periods in which the correlation level is high and periods in which the correlation level is approximately 0.

As a result, by monitoring this level at a predetermined timing, it is possible to determine the relative phase change of the received signal SS with respect to the reference PN signal PNstw, and the phase of the received signal SS in the matched filter 10.11 can be determined. Synchronization can be maintained by adjusting relatively and directly or indirectly.

As a result, the matched filters 10.11 can also be used to maintain a synchronized state, and the configuration can be made smaller and easier to handle than conventional devices.

Embodiment G An embodiment of the present invention will be described in detail below with reference to the drawings.

(G1) First Embodiment In FIG.
given to. The first and second matched filters 10 and 11 receive a reference PN signal PNa assigned to the communication channel as a comparison reference signal. is given by the PN signal generation circuit 12, and a received signal SS which is shifted sequentially and a fixed reference PN signal PNG! , l, and the correlation output signals ■ and Q (FIG. 2(A) and (B)) are output.

As mentioned above in the conventional device, the autocorrelation coefficient of the PN code is determined to be high when the phases match, and approximately 0 when the phases do not match, so the received signal SS As you input , a triangular wave will rise when the received PN signal included in the received signal SS matches the reference PN signal (the period is the period of 2 chips of the PN code), and at other times It will take a constant value.

Here, it is practically difficult to completely match the clock frequency of the original oscillator used when generating the PN code in the transmitter and the clock frequency of the original oscillator in the demodulator, and are different.

Therefore, in FIG. 1, a shift clock signal 5 is generated in a shift clock generation circuit 13 having a VCO (voltage controlled oscillator) configuration based on a clock signal from an original oscillator.
When HISSHQ is generated and the received signal SS is sequentially shifted in the matched filter 10.11 to obtain correlation output signals I and Q, the correlation output signals I and Q are shown in FIGS. 2(A) and (B). It includes low frequency beat components CO3 and SIN corresponding to the frequency shift between the original oscillators shown.

Note that when the transmitter is mounted on a moving body such as an artificial satellite, the low frequency beat components CO3 and SIN are also generated due to Doppler shift.

Here, compared to the shift clock signal SHI for the first matched filter IO, the second matched filter 11
The shift clock signal SHQ for the signal SHQ is delayed by 90 degrees so that the low frequency beat component COS in the correlated output signals ■ and Q.

SIN also has a phase difference of 90 degrees.

Correlation output signals (2) and (Q) having such waveform shapes are delayed by half CH/2 of one chip time TCH in the PN code via delay circuits 14 and 15, respectively, and then sent to a data demodulation section 16 having a Costas loop configuration. given to. The data demodulator 16 receives a peak timing control signal TIM generated by a timing control circuit (not shown) based on the correlation output signals T and Q, and generates a delayed correlation output signal PI.
The signal is taken in at the upper or lower peak point of PQ and the data is demodulated.

Each of these delayed correlation output signals Pi, PQ is as follows:
The signal is delayed by the time TCH/straddle through delay circuits 17 and 18 and is applied to the arithmetic circuit 19.

The arithmetic circuit 19 adds the squares of these input signals ET and EQ, removes low frequency beat components, performs a square root calculation, and calculates the past reception (
The calculation value signal E (FIG. 3(B)) at the timing of the peak point of the correlation output signals PI and PQ given to the data demodulation unit 16 determined by No. 3 is given to the adder 20 and the subtracter 21. .

Further, the correlation output signals I and Q are given to the second arithmetic circuit 22. The second arithmetic circuit 22 is similar to the first arithmetic circuit 19
In the same way as above, first the squares are added, then the square root is calculated, and the calculated value signal L (FIG. 3(A)) is provided to the adder 20 and the subtracter 21 at a timing based on the peak timing control signal TIM.

The adder 20 adds these calculated value signals E and L and provides the added output signal ADD to the divider 23, and the subtracter 21 subtracts the calculated value signal L@ from the calculated value signal E and outputs the subtracted output signal SUB. The zero divider 23 divides the subtraction output signal SUB by the addition output signal ADD to form a phase adjustment signal CON, which removes noise components via a loop filter 24 and The clock signal is applied to the shift clock generation circuit 13 in such a manner that no phase error remains.

In this way, the shift clock generation circuit 13 changes the period of the shift clock signal 5HISSHQ, so that the data demodulation section 16 takes in the signal at the peak points of the correlation output signals PI and PQ.

In the above configuration, the timing of the peak point of the correlation output signals PI and PQ given to the data demodulation section 16 is the same as the timing t1 of the peak point determined from past information (that is, the period of the received PN signal is constant). In this case, as shown in FIGS. 3(A) and (B), the calculated value signals L(tl) and E(tl) are equal,
The subtraction output signal SUB from the subtracter 21 becomes O, and the phase adjustment signal CON obtained by dividing this subtraction output signal SUB by the addition output signal ADD from the adder 20 in the divider 23 also becomes 0. As a result, the shift clock generation circuit 13 does not change the period of the shift clock signals SHI, SHQ, and continues to input the correlation output signals PI, PQ into the data demodulation section 16 at the timing of the peak point.

On the other hand, the cycle of the received PN signal changes, and the timing tl of the peak point determined from past information and the timing t2 of the peak point of the obtained correlation output signals PI and PQ change as shown in FIG. ), as shown in (B), Δt (hereinafter,
In this case, since the triangular wave shapes of the calculated value signals E and L are symmetrical, the timing t2 of the peak point of the obtained correlation output signal P[, PQ Calculated value signals E(t2), L(
t2) is the following formula, E(t2)=A(-+Δφ) ・・・・・・(1
)L(t2)-A(--Δφ)...
・It can be expressed as (2). Here, A is the peak value of the calculated value signals E and L.

Therefore, the phase adjustment signal C0N(t2) from the divider 23
is as shown in the following equation (3) and depends on the timing shift (phase shift).

As a result, the period of the shift clock signal 5HISSHQ is changed to compensate for this phase shift Δφ, and the signal is controlled so as to be continuously taken into the data demodulating section 16 at the peak point. Thus, the synchronization process is executed.

Note that the initial connection process can be easily performed by comparing the levels of the correlation output signals ■ and Q of the matched filters 0 or 11 with a predetermined threshold hold level, and the specific configuration thereof is omitted in the drawing. .

According to the above-described embodiment, it is possible to execute synchronization process processing using matched filters 10, 11 used in the initial continuation process, and the overall configuration can be further simplified and made smaller.

(G2) Second Embodiment FIG. 5 shows a second embodiment of the present invention. Corresponding parts to those in FIG. 1 are denoted by the same reference numerals. Switch circuits 30 and 31 are respectively inserted between the matched filter 11 and the delay circuit 14, and between the matched filter 11 and the delay circuit 15.
A switching control circuit 32 consisting of a CO and a frequency dividing circuit forms an on/off control signal SW 411 to control the switching circuit 30.
．． 31 is turned on and off, thereby controlling the timing at which the delay circuits 14 and 15 take in data, so that the data demodulator 16 can take in the correlation output signals P1 and PQ at the peak point.

Note that in this embodiment, the shift clock signals SHI,
The period of SHQ is fixed. .

In this embodiment as well, matched filters 10 and 11
The overall configuration can be made smaller and simpler by being able to use it in both the initial connection process and the synchronization process.

(G3) Third Embodiment FIG. 6 shows a third embodiment of the present invention. In this embodiment, the reference PN signal PNats is phase-shifted in accordance with the phase adjustment signal CON, and , by setting a matched filter of 10.11, a PN frequency of 4 [1] can be obtained. That is, the reference PN signal PNG[N generated by the PN generation circuit 12 is once set in the reversible shift register 35, the sign of the phase adjustment signal CON is determined in the sign discrimination circuit 36, and the sign of the phase adjustment signal CON is determined in the shift register 35.
Determine the shift direction. Further, the absolute value of the phase adjustment signal COH is taken out in the absolute value circuit 37, and the shift clock signal 5HP is generated with the number of pulses corresponding to the absolute value signal ABS.
The shift clock generation circuit 38 generates the reference PN (i-number PNatN) of the shift register 35, and when the correlation output signals PI and PQ are at the noise level, it is set as the comparison reference signal of the matched filter 10.11. do.

Note that in this embodiment, the matched filter 10.1
Shift clock signal SHI relative to 1.

The period of SHQ is fixed.

According to this embodiment, when the period of the received signal SS, and thus the received PN signal, changes, the reference PN signal P changes accordingly.
Since NGEN is shifted and reset to the matched filter l0111, the data demodulator 16 can always take in the peak points of the correlation output signals PI and PQ.

That is, according to this embodiment as well, the matched filter 1
0.11 can be used not only for initial connection processing but also for synchronization process processing, thereby making it possible to make the device smaller and simpler.

(G4) Other Embodiments In the above-described embodiments, the shift clock generation circuit 13 has a vCO configuration, but in an apparatus that uses a large number of digital processing circuits, the generation circuit 13 may be configured as an NGO (
It may also be configured with a numerically controlled oscillator).

Further, the demodulator according to the present invention can be widely applied not only to ranging systems using artificial satellites but also to communication systems using spread spectrum signals as needed.

H Effects of the Invention As described above, according to the present invention, a spread spectrum communication demodulator whose configuration can be further downsized and simplified by making it possible to use a matched filter in both initial connection processing and synchronization process processing is provided. can be obtained easily.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a first embodiment of a spread spectrum communication demodulation device according to the present invention, FIGS. 2 to 4 are signal waveform diagrams for explaining its operation, and FIG. A block diagram showing an example, FIG. 6 is a block diagram showing a third embodiment of the present invention, FIG. 7 is a block diagram showing an initial connection method using a conventional device, and FIG. 8 shows an autocorrelation coefficient of a PN code. Route map, FIG. 9 is a route map showing the configuration of the matched filter. 10.11...Matched filter, 12...
...PN generation circuit, 13...shift clock generation circuit, I6...data demodulation section, CON...
...Phase adjustment signal.

Claims (1)

[Claims] A received signal consisting of a spread spectrum signal and an internally generated reference PN signal are input to a matched filter, and the received signal obtained from the matched filter and the reference P
In a spread spectrum communication demodulator that draws into a synchronized state based on a correlation output signal with the N signal, the level is measured at multiple points at a predetermined timing within a period in which the correlation output signal shows a high correlation level that changes in the shape of a triangular wave. 1. A spread spectrum communication demodulation device characterized in that the relative phase of a received signal with respect to the reference PN signal is shifted by sampling, and a detection output from the sampling is used to maintain a synchronized state.