JPS6370550U - - Google Patents
Info
- Publication number
- JPS6370550U JPS6370550U JP16455786U JP16455786U JPS6370550U JP S6370550 U JPS6370550 U JP S6370550U JP 16455786 U JP16455786 U JP 16455786U JP 16455786 U JP16455786 U JP 16455786U JP S6370550 U JPS6370550 U JP S6370550U
- Authority
- JP
- Japan
- Prior art keywords
- developing machine
- automatic developing
- room
- lamp
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
- 230000037431 insertion Effects 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
Landscapes
- Photographic Processing Devices Using Wet Methods (AREA)
- Photographic Developing Apparatuses (AREA)
Description
第１図は自動現像機および本考案のフイードラ
ンプの配置図、第２図は本考案のフイードランプ
の動作を説明するための駆動回路図、第３図ａ，
ｂは本考案のフイードランプの使用例を示す配置
図である。
１，２…フイードランプ、３…マイクロスイツ
チ、４…タイマー接点、５…タイマー、６…電源
、１０…自動現像機、１１…フイルム挿入口、１
２…フイルム出口、１３…露光装置等の配置され
ている部屋、１４…自動現像機用暗室、１５…明
室、１６，１７…壁、２０…プリンター室、２１
…スキヤナー室。
Fig. 1 is a layout diagram of an automatic developing machine and the feed lamp of the present invention, Fig. 2 is a drive circuit diagram for explaining the operation of the feed lamp of the present invention, and Fig. 3 a,
b is a layout diagram showing an example of use of the feed lamp of the present invention. 1, 2...Feed lamp, 3...Micro switch, 4...Timer contact, 5...Timer, 6...Power source, 10...Automatic developing machine, 11...Film insertion slot, 1
2...Film exit, 13...Room where exposure equipment etc. are arranged, 14...Dark room for automatic processor, 15...Bright room, 16, 17...Wall, 20...Printer room, 21
...Scanner room.
Claims (1)
ためのランプであつて、自動現像機に未現像フイ
ルムを挿入する部屋とは異なる部屋に配置したこ
とを特徴とする自動現像機用フイードランプ。 A feed lamp for an automatic developing machine, which is a lamp for indicating a state in which film can be inserted into the automatic developing machine, and is arranged in a room different from a room in which undeveloped film is inserted into the automatic developing machine.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16455786U JPS6370550U (en) | 1986-10-27 | 1986-10-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16455786U JPS6370550U (en) | 1986-10-27 | 1986-10-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6370550U true JPS6370550U (en) | 1988-05-12 |
Family
ID=31093782
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16455786U Pending JPS6370550U (en) | 1986-10-27 | 1986-10-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6370550U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8941974B2 (en) | 2011-09-09 | 2015-01-27 | Xilinx, Inc. | Interdigitated capacitor having digits of varying width |
| US9270247B2 (en) | 2013-11-27 | 2016-02-23 | Xilinx, Inc. | High quality factor inductive and capacitive circuit structure |
| US9524964B2 (en) | 2014-08-14 | 2016-12-20 | Xilinx, Inc. | Capacitor structure in an integrated circuit |
-
1986
- 1986-10-27 JP JP16455786U patent/JPS6370550U/ja active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8941974B2 (en) | 2011-09-09 | 2015-01-27 | Xilinx, Inc. | Interdigitated capacitor having digits of varying width |
| US9270247B2 (en) | 2013-11-27 | 2016-02-23 | Xilinx, Inc. | High quality factor inductive and capacitive circuit structure |
| US9524964B2 (en) | 2014-08-14 | 2016-12-20 | Xilinx, Inc. | Capacitor structure in an integrated circuit |
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