JPS6367010A - Digital compression device - Google Patents

Digital compression device

Info

Publication number
JPS6367010A
JPS6367010A JP61212089A JP21208986A JPS6367010A JP S6367010 A JPS6367010 A JP S6367010A JP 61212089 A JP61212089 A JP 61212089A JP 21208986 A JP21208986 A JP 21208986A JP S6367010 A JPS6367010 A JP S6367010A
Authority
JP
Japan
Prior art keywords
signal
shift register
input signal
chirp
frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61212089A
Other languages
Japanese (ja)
Inventor
Toshio Tachika
田近 寿夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP61212089A priority Critical patent/JPS6367010A/en
Publication of JPS6367010A publication Critical patent/JPS6367010A/en
Pending legal-status Critical Current

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  • Radar Systems Or Details Thereof (AREA)

Abstract

PURPOSE:To make characteristics of a frequency variation rate of a chirp signal, a resolution, etc., variable, by sampling an input signal by a sampling period being equal to a frequency variation rate of the input signal, and thereafter, executing a fast Fourier transform. CONSTITUTION:A chirp signal which has been inputted from an input terminal 1 is brought to sampling by an A/D converter 8, and stored successively in a shift register 9. A sampling period in this case is equal to a frequency variation rate of the chirp signal, therefore, a waveform inputted to the shift register 9 becomes a signal having a prescribed frequency. This frequency is proportional to a delay quantity of an input signal, therefore, by bringing a code sequence of the shift register 9 to a FFT 11, the delay quantity of the input signal can be measured. A window function 10 is provided in order to reduce a side lobe of a compression pulse.

Description

【発明の詳細な説明】[Detailed description of the invention]

〔産業上の利用分野〕 この発明は、チャープ変換理輪番こよりパルス圧縮を行
なう技術に関するものである。 〔従来の技術〕 第2図は、例えば電子通信学会誌10/1977、pH
281こ示された従来の表面弾性波を利用したパルス圧
縮器である。図において、
[Industrial Application Field] The present invention relates to a technique for performing pulse compression using chirp conversion and rotation. [Prior art] Figure 2 shows, for example, the journal of the Institute of Electronics and Communication Engineers, 10/1977, pH
281 is a conventional pulse compressor using surface acoustic waves. In the figure,

【1】は入力端子。 (2)はインタディジタル電極、(3)は表面弾性波(
SAW)%(4)は表面弾性波の伝搬制御、〔5)は出
力端子、(6)は圧電基板である。 次に動作について説明する。第3図において入力信号6
j(wt”ut2)なる信号が表面弾性波入力端子(1
3に加えられると1弾性表面波出力8(t)は、入力信
号、j””)ト4性表面波ノ特性eNwt−utIりと
のコンボリューション 3 (t) = f (ej(wz”uz”)1 、N
wt−ut2)d。 J (w t ”u t ” ) 、 x (z u 
t)−〇 但しx(zut) Q I e−jzutzdzとなり
、出力として圧縮パルス(インパルス)が得られる。 〔発明が解決しようとする問題点〕 従来の装置は以上のように構成されているので。 表面弾性波素子を必要とし、特性変更が必要なシステム
においては、特性変更が困難で使いがなく、また低周波
領域ではハードウェアが大きくなる等の問題点があった
。 この発明は、上記のような問題点を解消するためになさ
れたもので、チャープ信号の周波数変化率、分解能等の
特性を可変とする装置を得ることを目的とする。 〔問題点を解決するための手段〕 この発明Eこ係るディジタル圧縮装置は、分散遅延の圧
縮動作を、入力信号の周波数変化率と等しいサンプリン
グ周期で入力信号をサンプリングした後、ファーストフ
ーリエ変換する事(こより1表面弾性波チャープ変換と
同等の動作をさせたものである。 〔作用〕 この発明におけるサンプリング周期は、ディジタル的(
こその変化率を変化させる事により、任意の変化率に設
定できる。 〔実施例〕 以下、この発明の一実施例について説明する。 第1図において、(1)は入力端子(ナヤーブ信号入力
) 、 (8)はA/D変換器、(9)はシフトレジス
タ、 GOは窓関数、0力はFFT、02はスウイーブ
クロック発生器、(5)はパルス圧縮の出力端子である
。 入力端子(1)より入力されたチャープ信号はA/D変
換器(8)でサンプリングされ、シフトレジスタ(9)
に順次記憶される。この時のサンプリング周期は、チャ
ープ信号の周波数変化率に等しい為、シフトレジスタ(
9)lこ入力される波形は一定の周波数を持つ信号とな
る。この周波数は入力信号の遅延量に比例スる為、シフ
トレジスタ(9)の符号系列をFFTα◇することによ
り、入力信号の遅延量を測定することができる。また、
図における窓関数01は圧縮パルスのサイドロープ低減
の為に設けられている。 なお、上記実施例ではチャープレーダの様な入力信号の
遅延量を測定する目的に用いられるが、周波数変化率を
変化することにより、チャープスブレンドスペクトル通
信及びその同期回路として使用してもよい。 〔発明の効果〕 以上のように、この発明によればチャープ圧縮をディジ
タル回路で構成したので、今後のLSIの発展(こより
装置が小型・安価・高精度のものが得られる効果がある
[1] is an input terminal. (2) is an interdigital electrode, (3) is a surface acoustic wave (
SAW)% (4) is a surface acoustic wave propagation control, [5] is an output terminal, and (6) is a piezoelectric substrate. Next, the operation will be explained. In Fig. 3, input signal 6
A signal j(wt”ut2) is input to the surface acoustic wave input terminal (1
The surface acoustic wave output 8(t) when added to ”)1, N
wt-ut2)d. J (w t "ut"), x (z u
t)-〇However, x(zut) Q I e-jzutzdz, and a compressed pulse (impulse) is obtained as an output. [Problem to be solved by the invention] The conventional device is configured as described above. In systems that require surface acoustic wave elements and whose characteristics must be changed, there are problems such as the characteristics being difficult to change and being useless, and the hardware becoming large in the low frequency region. The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a device that can vary characteristics such as the frequency change rate and resolution of a chirp signal. [Means for solving the problem] This digital compression device according to the present invention performs a dispersion delay compression operation by sampling an input signal at a sampling period equal to the frequency change rate of the input signal, and then performing fast Fourier transform. (This operation is equivalent to surface acoustic wave chirp conversion. [Operation] The sampling period in this invention is digital (
By changing the rate of change, it is possible to set the rate of change to any desired rate. [Example] An example of the present invention will be described below. In Figure 1, (1) is the input terminal (Nayaab signal input), (8) is the A/D converter, (9) is the shift register, GO is the window function, 0 power is FFT, and 02 is the sweep clock generation. (5) is the output terminal for pulse compression. The chirp signal input from the input terminal (1) is sampled by the A/D converter (8), and then sent to the shift register (9).
are stored sequentially. The sampling period at this time is equal to the frequency change rate of the chirp signal, so the shift register (
9) The input waveform becomes a signal with a constant frequency. Since this frequency is proportional to the amount of delay of the input signal, the amount of delay of the input signal can be measured by subjecting the code sequence of the shift register (9) to FFTα◇. Also,
Window function 01 in the figure is provided to reduce the side lobe of the compression pulse. Although the above embodiment is used for the purpose of measuring the delay amount of an input signal such as a chirp radar, it may also be used as a chirp blend spectrum communication and its synchronization circuit by changing the frequency change rate. [Effects of the Invention] As described above, according to the present invention, chirp compression is implemented using a digital circuit, which has the effect of allowing the development of LSI in the future (as a result, devices can be made smaller, cheaper, and more accurate).

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明のディジタル圧縮装置の一実施例を示
すブロック図、第2図は従来の表面弾性波素子によるパ
ルス圧縮装置の構成図、itga図はチャープ圧縮のブ
ロック図である。 図において%+1)は入力端子、(5)は出力端子、(
8)はA/D変換器、(9)はシフトレジスタ、(10
は窓関数。 αつは高速フーリエ変換、@はスワープクロツク発生器
である。 なお1図中同一符号は同一、または相当部分を示す。
FIG. 1 is a block diagram showing an embodiment of the digital compression device of the present invention, FIG. 2 is a block diagram of a pulse compression device using a conventional surface acoustic wave element, and FIG. 2 is a block diagram of chirp compression. In the figure, %+1) is the input terminal, (5) is the output terminal, (
8) is an A/D converter, (9) is a shift register, (10
is a window function. α is a fast Fourier transform, and @ is a swap clock generator. Note that the same reference numerals in Figure 1 indicate the same or equivalent parts.

Claims (1)

【特許請求の範囲】[Claims]  チヤープ変換を、ディジタル素子で実現する回路にお
いて、シフトレジスタのクロック周波数を時間と共に変
化させてチヤープ圧縮することを特徴とするディジタル
圧縮装置。
A digital compression device that performs chirp compression by changing the clock frequency of a shift register over time in a circuit that implements chirp conversion using digital elements.
JP61212089A 1986-09-08 1986-09-08 Digital compression device Pending JPS6367010A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61212089A JPS6367010A (en) 1986-09-08 1986-09-08 Digital compression device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61212089A JPS6367010A (en) 1986-09-08 1986-09-08 Digital compression device

Publications (1)

Publication Number Publication Date
JPS6367010A true JPS6367010A (en) 1988-03-25

Family

ID=16616692

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61212089A Pending JPS6367010A (en) 1986-09-08 1986-09-08 Digital compression device

Country Status (1)

Country Link
JP (1) JPS6367010A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008216005A (en) * 2007-03-02 2008-09-18 Nec Corp Active sonar device
JP2008232861A (en) * 2007-03-20 2008-10-02 Nec Corp Active sonar system, reception signal processing method for sonar, and signal processing program therefor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008216005A (en) * 2007-03-02 2008-09-18 Nec Corp Active sonar device
JP2008232861A (en) * 2007-03-20 2008-10-02 Nec Corp Active sonar system, reception signal processing method for sonar, and signal processing program therefor

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