JPS636596A - Driving of matrix display panel - Google Patents
Driving of matrix display panelInfo
- Publication number
- JPS636596A JPS636596A JP15073886A JP15073886A JPS636596A JP S636596 A JPS636596 A JP S636596A JP 15073886 A JP15073886 A JP 15073886A JP 15073886 A JP15073886 A JP 15073886A JP S636596 A JPS636596 A JP S636596A
- Authority
- JP
- Japan
- Prior art keywords
- electrodes
- pulse
- scanning
- driving
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011159 matrix material Substances 0.000 title claims description 8
- 238000000034 method Methods 0.000 claims description 11
- 230000035485 pulse pressure Effects 0.000 claims 1
- 238000004904 shortening Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 10
- 239000010409 thin film Substances 0.000 description 8
- 230000005684 electric field Effects 0.000 description 4
- 230000007423 decrease Effects 0.000 description 3
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 3
- 238000013459 approach Methods 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 235000013399 edible fruits Nutrition 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000004922 lacquer Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
Landscapes
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Control Of El Displays (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔概要〕
マトリックス表示パネルの駆動方法であって、選択した
表示セルを発光させる書込みパルスを走査順に従って順
次パルスの立ち上がり時間を短くし、パネル全面の発光
輝度の偏差を小さくすることを可能とする。[Detailed Description of the Invention] [Summary] A method for driving a matrix display panel, in which the rise time of a write pulse that causes a selected display cell to emit light is sequentially shortened in the scanning order, and the deviation in luminance of light emission over the entire surface of the panel is reduced. It is possible to make it smaller.
本発明はマトリックス表示パネル、特に薄膜エレクトロ
ルミネッセンス・パネル(以1& 薄11Q E L
パネルと記す)の駆動方法に関するものである。The present invention relates to matrix display panels, particularly thin film electroluminescent panels (hereinafter referred to as 1&thin 11Q E L
This relates to a method of driving a panel (referred to as a panel).
薄膜ELパネルは、事務用の端末機と、卓上用の汎用計
算機等との表示部に通用されることが期待されており、
端末機等を安価に作製するために、表示パネルの低価格
化が要求され、表示装置としての高信頼化とともに、表
示品質のよいマトリノクス表示パネルの駆動方法が要求
されている。Thin-film EL panels are expected to be used in the displays of office terminals and desktop general-purpose calculators.
In order to manufacture terminals and the like at low cost, display panels are required to be lower in price, and there is a need for a highly reliable display device and a method for driving a matrix display panel with good display quality.
第5図は従来の薄膜ELパネルの駆動方法を示すブロッ
ク図、第6図は従来の駆動波形図を示している。FIG. 5 is a block diagram showing a conventional method for driving a thin film EL panel, and FIG. 6 shows a conventional driving waveform diagram.
第5図において、薄膜ELパネル1は、複数のデータ電
極D1〜Dmと、走査電極S1〜Snが格子状に配列形
成されており、この画電極の交叉部に図示しない電気光
学体を介在して表示セルが形成されている。この薄膜E
Lパネル1を駆動する駆動回路は、データ電極D1〜D
aにデータパルスを供給するデータ信号発生回路2と、
走査型is1〜Snに走査パルスを供給する走査電極駆
動回路3とからなっている。In FIG. 5, the thin film EL panel 1 has a plurality of data electrodes D1 to Dm and scanning electrodes S1 to Sn arranged in a grid pattern, and an electro-optical body (not shown) is interposed at the intersection of the picture electrodes. display cells are formed. This thin film E
A drive circuit that drives the L panel 1 includes data electrodes D1 to D.
a data signal generation circuit 2 that supplies data pulses to a;
It consists of a scan electrode drive circuit 3 that supplies scan pulses to the scan types is1 to Sn.
データ信号発生回路2は、データ電極D1”Dmに対応
するチャンネル数の正負電圧を供給する電界効果型トラ
ンジスタ(FET)からなるプッシュプルドライバ4−
1〜4−mと、プッシュプルドライバ4−1〜4−mの
直流電源5とで構成されている。The data signal generation circuit 2 includes a push-pull driver 4-, which is a field-effect transistor (FET) that supplies positive and negative voltages of the number of channels corresponding to the data electrode D1''Dm.
1 to 4-m, and a DC power supply 5 for push-pull drivers 4-1 to 4-m.
また、走査電極駆動回路3は、各走査電極51〜Snの
それぞれにプッシュプルドライバ?−1〜7−nを接続
し、プッシュプルドライバ7−1〜7−nのFETソー
ス側配線15に、第1の基準電圧発生回路8と第1の走
査パルス発生回路10とを接続する。又、FET ドレ
イン側配線16に第2の基準電圧発生回路9と、第2の
走査パルス発生回路11を接続している。Further, the scan electrode drive circuit 3 includes push-pull drivers for each of the scan electrodes 51 to Sn. -1 to 7-n are connected, and the first reference voltage generation circuit 8 and the first scan pulse generation circuit 10 are connected to the FET source side wiring 15 of the push-pull drivers 7-1 to 7-n. Further, a second reference voltage generation circuit 9 and a second scan pulse generation circuit 11 are connected to the FET drain side wiring 16.
第1および第2の基準電圧発生回路8.9は、負極性で
且つ同電圧(−165V)の負電源8−1゜9−1と、
正極性で且つ同電圧(+165V)の正電源8−2 、
9−2と、前記負電源8−1.9−1と正電源8−2.
9−2とをそれぞれ切換えるスイッチ8−3.9−3と
より構成されている。The first and second reference voltage generation circuits 8.9 are connected to a negative power supply 8-1°9-1 of negative polarity and the same voltage (-165V),
A positive power supply 8-2 with positive polarity and the same voltage (+165V),
9-2, the negative power source 8-1.9-1 and the positive power source 8-2.
9-2 and switches 8-3 and 9-3, respectively.
第1、第2の走査パルス発生回路10.11は、所定の
走査パルス電圧を得るための電源、例えば第1の走査パ
ルス発生回路10には一190■を出力する電源10−
1と+190 V用の電源10−2と、両電源を切換え
るスイッチ10−3を設け、第2の走査パルス発生回路
11には一165■を出力する電源11−1と+215
v用の電源11−2と、両電源を切換えるスイッチ11
−3を設けた構成としている。The first and second scan pulse generation circuits 10.11 are powered by power supplies for obtaining predetermined scan pulse voltages, for example, the first scan pulse generation circuit 10 is powered by a power supply 10-10 which outputs -190cm.
A power supply 10-2 for 1 and +190 V and a switch 10-3 for switching between the two power supplies are provided, and the second scanning pulse generation circuit 11 is provided with a power supply 11-1 for outputting -165V and a power supply 11-1 for outputting +215V.
Power supply 11-2 for v and switch 11 for switching between both power supplies
-3 is provided.
また、プッシュプルドライバ7−1〜7− nのFET
ソース側配線15とドレイン側配線16との間にツェナ
ーダイオード12を接続してドライバを保護している。In addition, the FETs of push-pull drivers 7-1 to 7-n
A Zener diode 12 is connected between the source side wiring 15 and the drain side wiring 16 to protect the driver.
さて次に表示セルの発光動作を第6図を参照しながら説
明する。第1フレームにおいて、第1および第2の基準
電圧発生回路8.9のスイッチ8−3と9−3をそれぞ
れ一165v用電源8−1と9−1に接続し、電源8−
1および9−1より出力される一165Vをプッシュプ
ルドライバ7−1〜7−nのソース側配線15とドレイ
ン側配線16に印加し、第6図(bl〜+dlに示すよ
うな一165vの基準電圧Vpを各走査電極S1.S2
・・Snに印加する。Next, the light emitting operation of the display cell will be explained with reference to FIG. In the first frame, the switches 8-3 and 9-3 of the first and second reference voltage generation circuits 8.9 are connected to the -165V power supplies 8-1 and 9-1, respectively, and the power supplies 8-
1 and 9-1 is applied to the source side wiring 15 and drain side wiring 16 of the push-pull drivers 7-1 to 7-n, and the voltage of -165V outputted from the push-pull drivers 7-1 to 7-n is applied to The reference voltage Vp is applied to each scan electrode S1.S2.
...Apply to Sn.
この全選択状態において、外部より入力される走査切換
信号によって第1および第2の走査パルス発生回路10
.11のスイッチ10−3および11−3が一190v
用電源10−1および一165v用電源11−1に接続
される。電源10−1と電源11−1より一19Ovと
一165vの電圧がプッシュプルドライバ7−1〜?−
nのソース側配線15とドレイン側配線16とにそれぞ
れ出力される。In this fully selected state, the first and second scan pulse generation circuits 10
.. 11 switches 10-3 and 11-3 are 190v
10-1 and a 165V power supply 11-1. The voltages of -19Ov and -165V from the power supply 10-1 and the power supply 11-1 are applied to the push-pull driver 7-1~? −
It is output to the source side wiring 15 and the drain side wiring 16 of n, respectively.
プッシュプルドライバ7−1〜7− nは両入力電圧(
−190V、−165V) (7)差即ち、−25V(
第6図(bl〜(C1に示すVY)を取出し、外部より
入力される走査位置制御信号によって選択された表示セ
ルに一25Vの走査パルスVYを前記基準電圧Vp(−
165V)に重畳して順次各走査電極Sl、S2 ・
・Snに印加する。Push-pull drivers 7-1 to 7-n have both input voltages (
-190V, -165V) (7) Difference, -25V (
FIG. 6 (bl~(VY shown in C1) is taken out and a scanning pulse VY of -25V is applied to the display cell selected by the scanning position control signal inputted from the outside at the reference voltage Vp(-
165V) and sequentially connect each scan electrode Sl, S2.
・Apply to Sn.
−方、データ信号発生回路2は、外部よりプッシュプル
ドライバ4−1〜4−aaの制御端子に入力されるデー
タ制御信号によって、第6図(alに示す25Vのデー
タパルスVsを発生し、データ電極側の選択された電極
に前記走査パルスvYと同期して出力する。- On the other hand, the data signal generation circuit 2 generates a 25V data pulse Vs shown in FIG. It is output to the selected electrode on the data electrode side in synchronization with the scanning pulse vY.
第6図(Q)〜(glは、データ電極Di (iは正の
整数)と各走査電極(Sl−Sn)間に合成電圧として
印加されるセル駆動波形である。選択された表示セルに
は基準電圧Vp上に走査パルスvYとデータパルスVs
とが重畳されて形成された書込みパルスel、fl。6(Q) to (gl) are cell drive waveforms applied as a composite voltage between the data electrode Di (i is a positive integer) and each scan electrode (Sl-Sn). is a scanning pulse vY and a data pulse Vs on the reference voltage Vp.
The write pulses el and fl are formed by superimposing the pulses el and fl.
glが順次印加され、これによって該選択表示セルは発
光する。但し、書込みパルスel、fLglは全セルを
発光する全選択の場合であり、波高値は+215vであ
る。表示セルを順次発光させる半選択状態の場合は波高
値190vである。gl is sequentially applied, thereby causing the selected display cell to emit light. However, the write pulses el and fLgl are for all selections in which all cells emit light, and the peak value is +215V. In the case of a half-selected state in which the display cells sequentially emit light, the peak value is 190V.
上記の第1フレームの書込み駆動が終了後、次の第2フ
レームの駆動は、電源8−2.9−2.10−2.11
−2を利用し、上記と同じ要領によって第1フレームと
逆極性の書込みパルスを作成し、選択された表示セルを
発光せしめる。After the writing drive of the first frame is completed, the drive of the next second frame is performed using the power supply 8-2.9-2.10-2.11.
-2, a write pulse of opposite polarity to that of the first frame is created in the same manner as above, and the selected display cell is caused to emit light.
上記した従来の駆動方法によって選択された表示セルに
印加される書込みパルスは、第6図に示すように、走査
電極SL、S2 ・・Snの順に印加される。このよ
うに、走査タイミングが順次ずれて、書込パルスの印加
タイミングが基準電圧Vpの立ち上がりから変化すると
、この書込みを行う以前の書込み時に生じた分極電荷E
qが漏洩して分極電荷が減少して行く。したがって、こ
のリークする電荷Δεqは書込パルスの印加タイミング
によってΔEql、ΔEq2 ・・ΔEq3と順次多
くなる。従って、表示セルが選択され書込パルスが印加
された時の実行電界EBが変化して第7図(a)のタイ
ミングの際の実行電界EBIが高(、第7図(b)、
(C)のタイミングの実行電界ε82.EB3の方向に
順次低くなる。The write pulse applied to the display cell selected by the conventional driving method described above is applied to the scan electrodes SL, S2, . . . , Sn in this order, as shown in FIG. In this way, when the scan timing is sequentially shifted and the application timing of the write pulse changes from the rise of the reference voltage Vp, the polarized charge E generated during the previous write
q leaks and the polarized charge decreases. Therefore, this leaked charge Δεq increases sequentially to ΔEql, ΔEq2, . . . ΔEq3, depending on the application timing of the write pulse. Therefore, the effective electric field EB changes when the display cell is selected and the write pulse is applied, and the effective electric field EBI at the timing of FIG. 7(a) becomes high (, FIG. 7(b),
(C) Timing effective electric field ε82. It gradually decreases in the direction of EB3.
このために走査順に輝度が順次低下し、薄膜ELパネル
面の輝度に偏差を生じるといった問題がある。For this reason, there is a problem in that the brightness sequentially decreases in the scanning order, causing deviations in brightness on the surface of the thin film EL panel.
この発明は以上のような従来の状況から、書込パルスの
印加後に発生するパネル内部の実行電界の変化を補正し
、薄膜ELパネル面が均一輝度となるマトリックス表示
パネルの駆動方法の提供を目的としている。In view of the above-mentioned conventional situation, an object of the present invention is to provide a method for driving a matrix display panel that corrects the change in the effective electric field inside the panel that occurs after the application of a write pulse and provides uniform brightness on the surface of the thin film EL panel. It is said that
第1図は本発明の駆動方法の原理図であり、薄1iEL
パネルの発光光量は、供給される書込みパルスのエネル
ギーの変化に比例するので、走査順に従って書込みパル
スの立ち上がり時間を早くなるように変化させる。つま
り立ち上がり時間の短い書込みパルスを印加してエネル
ギーの変化を順次増大するようにしている。FIG. 1 is a diagram showing the principle of the driving method of the present invention.
Since the amount of light emitted from the panel is proportional to the change in the energy of the supplied write pulse, the rise time of the write pulse is changed according to the scanning order so that it becomes faster. In other words, a write pulse with a short rise time is applied to gradually increase the change in energy.
〔作用〕 ゛
一般に、薄膜EL素子は、書込パルスの立ち上がり時間
を短くすると、書込みパルスに対する輝度特性は第2図
に示すようになる。即ち、書込みパルスAに対して走査
順の早い表示セルは輝度81となり、走査順の遅い表示
セルの輝度はB2となる。[Function] Generally, when the rise time of a write pulse in a thin film EL element is shortened, the luminance characteristic with respect to the write pulse becomes as shown in FIG. That is, a display cell whose scan order is early with respect to the write pulse A has a brightness of 81, and a display cell whose scan order is late with respect to the write pulse A has a brightness of B2.
この走査順の遅い表示セルに立ち上がり時間の短い書込
みパルスを印加すると輝度B2は輝度B1に近づく。こ
れは、急激な変化をする書込みパルスを印加することに
よって内部を移動する電荷のエネルギーが高くなり、輝
度が上がるからである。When a write pulse with a short rise time is applied to the display cell whose scanning order is slow, the brightness B2 approaches the brightness B1. This is because by applying a rapidly changing write pulse, the energy of the charges moving inside increases, increasing the brightness.
第3図は本発明の一実施例のブロック図であり、従来と
同一箇所は同符号を用いその説明も省略する。走査電極
31〜Sn側のプッシュプルドライバ7−1〜7−nの
出力端子に抵抗R1〜Rnを接続し、この抵抗を介して
走査電極51〜Snを駆動する。したがって、走査電極
51xSnを駆動する書込みパルスは、この抵抗と、抵
抗に対応する走査電極の有する静電容量とによる時定数
の立ち上がり時間を持つこととなるので、走査順にこの
抵抗値を順次小さくして立ち上がり時間を短くする。本
例では、抵抗Rnが一番小さく、抵抗R1の方向に順次
抵抗値を大きくし、走査電極S1を駆動する書込みパル
スの立ち上がり時間が一番長く、順次走査電極Snの方
向に立ち上がり時間は短くなる。FIG. 3 is a block diagram of an embodiment of the present invention, in which the same parts as in the prior art are denoted by the same reference numerals, and the explanation thereof will be omitted. Resistors R1 to Rn are connected to the output terminals of the push-pull drivers 7-1 to 7-n on the scanning electrodes 31 to Sn side, and the scanning electrodes 51 to Sn are driven through the resistors. Therefore, the write pulse that drives the scan electrode 51xSn has a rise time of a time constant due to this resistance and the capacitance of the scan electrode corresponding to the resistance, so this resistance value is successively decreased in the order of scanning. to shorten the rise time. In this example, the resistance Rn is the smallest, the resistance value increases successively in the direction of the resistor R1, the rise time of the write pulse that drives the scan electrode S1 is the longest, and the rise time becomes shorter in the direction of the scan electrode Sn. Become.
本発明の書込みパルスの駆動波形は、第4図に示すよう
になる。第4図(a)〜(C)は従来波形と同一である
。第4図fd)、 (e)、 (f)に示すように、走
査電極にある全表示セルを選択する全選択書込みパルス
e1.f1.glの立ち上がり時間T1.T2・・Tn
は、順次小さくなる。The drive waveform of the write pulse according to the present invention is as shown in FIG. FIGS. 4(a) to 4(C) are the same as the conventional waveforms. As shown in FIG. 4 fd), (e), and (f), all selection write pulses e1. f1. gl rise time T1. T2...Tn
becomes smaller sequentially.
以上の説明は抵抗を用いて書込みパルスの立ち上がりを
調整したが、他の立ち上がり調整方法で書込みパルスを
調整しても支障ないことはいうまでもない。In the above explanation, the rise of the write pulse is adjusted using a resistor, but it goes without saying that there is no problem in adjusting the write pulse using other rise adjustment methods.
以上説明したように本発明によれば、選択する表示セル
の位置に関係なく表示輝度を均一に調整でき、マトリッ
クス表示パネルの輝度を均一化し表示品質を向上する上
できわめて有効な効果を奏する。As described above, according to the present invention, the display brightness can be uniformly adjusted regardless of the position of the selected display cell, which is extremely effective in making the brightness of the matrix display panel uniform and improving the display quality.
第1図は本発明の駆動方法の原理図、
第2図は本発明の詳細な説明するための輝度−電圧特性
図、
第3図は本発明の一実施例のブロック図、第4図は本発
明の駆動波形図、
第5図は従来の駆動方法を示すブロック図、第6図は従
来の駆動波形図である。
図において、1は、薄11QELパネル、S1〜Snは
走査電極、D1〜Dnはデータ電橋、R1”Rnは抵抗
を半発呵n!!v!動狼ゑn原理図
第1図
iし、や1.又 −4を斤
漆発明褐劫果袋訝’Fftshstr輝度−電斜丑生口
第2図
滓さa胎V動遥形図
第4図
計1z動崖形詔
第 6 図FIG. 1 is a principle diagram of the driving method of the present invention, FIG. 2 is a luminance-voltage characteristic diagram for explaining the present invention in detail, FIG. 3 is a block diagram of an embodiment of the present invention, and FIG. A driving waveform diagram of the present invention, FIG. 5 is a block diagram showing a conventional driving method, and FIG. 6 is a conventional driving waveform diagram. In the figure, 1 is a thin 11QEL panel, S1 to Sn are scanning electrodes, D1 to Dn are data bridges, and R1''Rn is a resistor. , 1.Also -4, lacquer invention, brown fruit bag, 'Fftshstr brightness - electrocline, oxbow, 2nd figure, 4th figure, total 1z moving cliff shape, 6th figure.
Claims (1)
ータ電極(D1〜Dm)との各交叉部に電気光学体を介
在して複数の表示セルを形成し、前記走査電極(S1〜
Sn)とデータ電極(D1〜Dm)間に正極性と負極性
の基準電圧(Vp)を交互に印加する手段(8、9)を
有し、前記走査電極(S1〜Sn)に印加された前記基
準電圧(Vp)に重畳して順次走査パルス圧(Vy)を
印加し、前記データ電極(D1〜Dm)の選択された電
極には走査パルスに同期させてデータパルス(Vs)を
印加して、それら電極間で定まる選択表示セルに対して
全選択状態の書込みパルス(e1、f1、g1)を加え
て発光させるようにしたマトリックス表示パネルの駆動
方法において、 前記全選択状態の書込みパルス(e1、r1、g1)を
、走査順に従って順次パルス立ち上がり時間を短くして
印加するようにしたことを特徴とするマトリックス表示
パネルの駆動方法。[Scope of Claims] A plurality of display cells are formed by interposing an electro-optic body at each intersection of a plurality of scan electrodes (S1 to Sn) and data electrodes (D1 to Dm) arranged in a grid, The scanning electrode (S1~
Sn) and the data electrodes (D1 to Dm) have means (8, 9) for alternately applying reference voltages (Vp) of positive polarity and negative polarity, and the voltage applied to the scanning electrodes (S1 to Sn) A scanning pulse pressure (Vy) is sequentially applied superimposed on the reference voltage (Vp), and a data pulse (Vs) is applied to selected electrodes of the data electrodes (D1 to Dm) in synchronization with the scanning pulse. In the method for driving a matrix display panel, the write pulse (e1, f1, g1) for the fully selected state is applied to the selected display cell determined between the electrodes to cause the selected display cell to emit light. A method for driving a matrix display panel, characterized in that pulses (e1, r1, g1) are applied by sequentially shortening the pulse rise time according to the scanning order.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15073886A JPS636596A (en) | 1986-06-26 | 1986-06-26 | Driving of matrix display panel |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15073886A JPS636596A (en) | 1986-06-26 | 1986-06-26 | Driving of matrix display panel |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS636596A true JPS636596A (en) | 1988-01-12 |
Family
ID=15503333
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15073886A Pending JPS636596A (en) | 1986-06-26 | 1986-06-26 | Driving of matrix display panel |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS636596A (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6066916A (en) * | 1996-08-19 | 2000-05-23 | Denso Corporation | Electroluminescent matrix display device |
KR20190084013A (en) | 2011-11-10 | 2019-07-15 | 신에쓰 가가꾸 고교 가부시끼가이샤 | Rare earth fluoride spray powder and rare earth fluoride-sprayed article |
KR20190106959A (en) | 2012-08-22 | 2019-09-18 | 신에쓰 가가꾸 고교 가부시끼가이샤 | Rare earth oxyfluoride spray powder and rare earth oxyfluoride-sprayed article |
KR20190122540A (en) | 2018-04-20 | 2019-10-30 | 가부시키가이샤 히다치 하이테크놀로지즈 | Plasma processing apparatus and member of plasma processing chamber |
KR20210009410A (en) | 2015-07-31 | 2021-01-26 | 신에쓰 가가꾸 고교 가부시끼가이샤 | Yttrium thermal spraying coating and method for manufacturing the same |
KR102284838B1 (en) | 2020-05-06 | 2021-08-03 | (주)코미코 | Slurry Composition for Suspension Plasma Spraying, Method for Preparing the Same and Suspension Plasma Spray Coating Layer |
-
1986
- 1986-06-26 JP JP15073886A patent/JPS636596A/en active Pending
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6066916A (en) * | 1996-08-19 | 2000-05-23 | Denso Corporation | Electroluminescent matrix display device |
KR20190084013A (en) | 2011-11-10 | 2019-07-15 | 신에쓰 가가꾸 고교 가부시끼가이샤 | Rare earth fluoride spray powder and rare earth fluoride-sprayed article |
KR20190106959A (en) | 2012-08-22 | 2019-09-18 | 신에쓰 가가꾸 고교 가부시끼가이샤 | Rare earth oxyfluoride spray powder and rare earth oxyfluoride-sprayed article |
KR20200039629A (en) | 2012-08-22 | 2020-04-16 | 신에쓰 가가꾸 고교 가부시끼가이샤 | Rare earth oxyfluoride spray powder and rare earth oxyfluoride-sprayed article |
KR20210100577A (en) | 2012-08-22 | 2021-08-17 | 신에쓰 가가꾸 고교 가부시끼가이샤 | Rare earth oxyfluoride spray powder and rare earth oxyfluoride-sprayed article |
KR20220100839A (en) | 2012-08-22 | 2022-07-18 | 신에쓰 가가꾸 고교 가부시끼가이샤 | Rare earth oxyfluoride spray powder and rare earth oxyfluoride-sprayed article |
KR20210009410A (en) | 2015-07-31 | 2021-01-26 | 신에쓰 가가꾸 고교 가부시끼가이샤 | Yttrium thermal spraying coating and method for manufacturing the same |
KR20210114371A (en) | 2015-07-31 | 2021-09-23 | 신에쓰 가가꾸 고교 가부시끼가이샤 | Yttrium thermal spraying coating and method for manufacturing the same |
KR20190122540A (en) | 2018-04-20 | 2019-10-30 | 가부시키가이샤 히다치 하이테크놀로지즈 | Plasma processing apparatus and member of plasma processing chamber |
KR102284838B1 (en) | 2020-05-06 | 2021-08-03 | (주)코미코 | Slurry Composition for Suspension Plasma Spraying, Method for Preparing the Same and Suspension Plasma Spray Coating Layer |
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