JPS6363242A - Simulator for communication processor by composite processor system - Google Patents

Abstract

PURPOSE:To efficiently test a communication processing unit built by a composite processor system by providing a simulator not only with a pseudo processing function split by the processor but also with a pseudo function of an opposite unit to which the communication processing unit is connected. CONSTITUTION:If a user wants to test the processing function of a processor 22, an information center pseudo function 25 among the pseudo functions of the simulator 27, the pseudo function 28 of the processor 22, the pseudo function 30 of a processor 24 and the pseudo function 31 of a terminal are activated to test the processor 22. When a call is made from the pseudo terminal with a terminal pseudo function 31, a voltage is impressed on the processor 22 to be texted through the pseudo function 30 and a common bus 21. On the basis of the type of call the processor 22 segments whether the call intends to communicate with an information center or its own pseudo function 28 being a communication processing unit outside its own loop. If the call is the communication with the information center, the processor 22 sets a communication path with the information center pseudo function 25 in the simulator and communicates through the path. Thus the number of testing steps can be reduced when communication processing units are developed.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical field to which the invention pertains) The present invention relates to a simulator for testing a communication processing device constructed by interconnecting a plurality of processors via a common bus (for example, an optical loop).

(Prior Art) A conventional communication processing device is often constructed with a single processor, and an example of a system configuration in this case is shown in FIG.

FIG. 1 is a diagram showing an example of the configuration of a conventional communication processing device.

1 indicates a processor, and 2, 3.4 indicate processing functions operating on the processor 1. The communication processing device is a single processor 1
It is connected to an information center (or other processing device) 5 or a terminal 6 through a relay line.

In this case, the processing function 2 becomes the information center interface function, and the processing function 4 becomes the terminal interface function. Furthermore, the processing function 3 is assumed to share the operational management function of the entire communication processing device.

When testing this communication processing device, it is basically sufficient to prepare a simulator that simulates the functions of the information center 5 and the terminal 6. Conventionally, simulators for communication processing devices built with a single processor are Most of them consist of pseudo functions on the connected device side.

FIG. 2 shows an example of the configuration of a communication processing device constructed using a composite processor system.

11 indicates a common bus line (for example, an optical loop); 12, 13
゜14 indicates a processor. Processing of each processor'IpA
The function is the same as 2.3.4 in Figure 1. That is, multiprocessor systems are aimed at processing function units (economical efficiency) and expandability of devices, and have been increasingly introduced in recent years. 15 is an information center (or other processing device), 1
6 indicates a terminal.

To test this communication processing device, it is not sufficient to prepare a simulator that simulates the functions of connected devices @ (information centers, terminals) as in the case of a single processor. (If you want to test only the processor 12, please use the information center 15
In addition there must be pseudo-functions of the processors 13,14. ) (Object of the Invention) In order to eliminate these drawbacks, the present invention provides a pseudo function for processing divided into processor units, in addition to a pseudo function for the other device (information center, terminal, etc.) connected to the communication processing device. This simulator is intended to efficiently test a communication processing bag constructed by a multiprocessor system by being equipped with the simulator, and will be described in detail below with reference to the drawings.

(Structure and operation of the invention) FIG. 3 shows an embodiment of the simulator according to the invention.

21, 22, 23, 24, and 26 in the figure have the same functions as the common bus 11, processors 12, 13, 14, and terminal 16 shown in FIG. 2, and 27 is a simulator. In addition,
Although the processors 22, 23, and 24 use the same processors as the processors 12, 13, and 14, there is no particular restriction that they must be the same processors.

25 is an information center, 31 is a terminal pseudo function, and 28
．． 29.30 are pseudo functions of the processing functions of the processors 22, 23, and 24.

The present invention will be described in detail below with reference to the drawings.

If you want to test the processing function of the processor 22, use the information center pseudo function 2 among the pseudo functions of the simulator 27.
5. This can be implemented by activating the pseudo function 28 of the processor 22, the pseudo function 30 of the processor 24, and the pseudo function 31 of the terminal.

That is, when a call is made from the pseudo terminal of the pseudo function 31 of the terminal, the call is inputted through the pseudo function 30 to the common bus 21 to the processor 22 which is the device under test.

The processor 22 distinguishes between communication with the information center and communication with the pseudo function 28 of the processor 22, which is a co-processing device that communicates outside the own loop, depending on the call type. A communication path is set up to communicate with the center pseudo function 25.

Next, if it is desired to test the processor 23, it can be performed by activating the pseudo function 28 of the processor 22 and the pseudo function 30 of the processor 24 among the pseudo functions of the simulator 27.

That is, the processor 23, which is the device under test, conducts the test by communicating with the pseudo function 28.30 of the processor 22.24 via the common bus 21. If it is desired to test the processor 24, which is a processing device, it can be performed by activating the pseudo function 28 of the processor 22 among the pseudo functions of the simulator 27.

A call is made from the real terminal 26 (if the real terminal cannot be used from the beginning, the pseudo function 31 of the pseudo terminal is used).

The originated call is input from the processor 24, which is the device under test, to the pseudo function 28 of the processor 22 via the common bus 21. If the information center pseudo function is built into the pseudo function 28, it is possible to interact with the processor 24, which is the device under test, using only the pseudo function 28.

The information center pseudo function 25 is converted into the pseudo function 2 of the processor 22.
8, the information center pseudo function 25 inside the simulator 27 and the pseudo function 28 of the processor 22 can be replaced by communicating with each other on a program.

Although the above has been explained with reference to the test of one processing device, this simulator 27
It can be implemented by That is, if you want to perform an integration test on the processors 22 and 24, you can run it by starting up the information center pseudo function 25 and pseudo functions 28 and 29 of the simulator 27, and when you want to perform an integration test on the processors 22 and 23, , the information center pseudo function 25, the pseudo function 28 of the processor 22, and the pseudo function 30 of the processor 24 may be activated and executed.

Furthermore, if it is desired to perform a coupling test of the processors 22, 23, and 24, which are processing devices, the information center pseudo function 25 and the pseudo function 28 of the processor 22 may be activated.

(Effects of the Invention) As explained above, the provision of a simulator that can be applied to communication processing equipment constructed using a multiprocessor system from unit unit testing to combination stability testing reduces the number of testing man-hours during the development of the communication processing equipment. This has the advantage that reduction can be achieved.

[Brief explanation of drawings]

FIG. 1 is a diagram showing an example of the configuration of a conventional communication processing device, FIG. 2 is a diagram showing an example of the configuration of a communication processing device using a multiprocessor system, and FIG. 3 is an example of a simulator according to the present invention. 1... Processor, 2.3.4... Processing function, 5.15... Information center (or other processing device), 6
．． 16.26... Terminal, 11.21... Common bus line, 12.13, 14, 22, 23, 24... Processor, 25... Information center pseudo function, 27... Simulator, 28. ... Pseudo function of processor 22, 29... Pseudo function of processor 23, 30... Pseudo function of processor 24, 31... Pseudo function of terminal. Patent applicant Nippon Telegraph and Telephone Corporation Figure 1 Figure 2 Figure 1 Figure 3 21 22.23, 24 Florence, The 25
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Claims (1)

[Claims] A simulator for testing a communication processing device configured by interconnecting a plurality of processors via a common bus and distributing processing functions to the processors, the processing device and terminal being connected to the communication processing device via a relay line. What is claimed is: 1. A simulator of a communication processing device using a composite processor system, characterized in that the simulator includes all the pseudo functions of the distributed processing functions of the communication processing device, in addition to the pseudo function of the above-mentioned communication processing device.