JPS636195B2 - - Google Patents

Info

Publication number
JPS636195B2
JPS636195B2 JP3322382A JP3322382A JPS636195B2 JP S636195 B2 JPS636195 B2 JP S636195B2 JP 3322382 A JP3322382 A JP 3322382A JP 3322382 A JP3322382 A JP 3322382A JP S636195 B2 JPS636195 B2 JP S636195B2
Authority
JP
Japan
Prior art keywords
terminal
output
secam
switch
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP3322382A
Other languages
Japanese (ja)
Other versions
JPS58150387A (en
Inventor
Takuya Nishide
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP3322382A priority Critical patent/JPS58150387A/en
Publication of JPS58150387A publication Critical patent/JPS58150387A/en
Publication of JPS636195B2 publication Critical patent/JPS636195B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00Details of colour television systems
    • H04N9/64Circuits for processing colour signals
    • H04N9/642Multi-standard receivers

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Processing Of Color Television Signals (AREA)

Description

【発明の詳細な説明】 この発明はテレビジヨン受像機に関するもので
ある。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a television receiver.

テレビジヨン受像機は、カラーの伝送方式別に
見た場合、NTSC方式とPAL方式とSECAM方式
とがある。その中で最近は各方式がすべて受信可
能なテレビジヨン受像機も市場に多く出ている。
このようなテレビジヨン受像機は、各方式のクロ
マ復調を行い、各出力を切換えて希望する方式を
選択する必要がある。
Television receivers are divided into NTSC, PAL, and SECAM color transmission systems. Recently, there are many television receivers on the market that can receive all of the various systems.
Such television receivers must perform chroma demodulation for each system and select the desired system by switching each output.

第1図は従来のテレビジヨン受像機のブロツク
図を示し、1はPALまたはNTSC復調用集積回
路で、PAL方式またはNTSC方式のクロマ信号
がPAL・NTSC出力エミツタフオロワ3を通し
て端子Aに導びかれ、この端子Aからコンデンサ
C1を通してSECAM復調用集積回路2の端子aへ
入力され、また、SECAM方式のクロマ信号は、
SECAM復調用集積回路内のデイスクリミネータ
4で復調され、端子bに接続されたコンデンサ
C2と抵抗R1とからなるフイルタ回路でデイエン
フアシスが行われる。端子aに加えられたPAL
方式またはNTSC方式のクロマ信号は切換スイツ
チSW1の端子cに加えられ、またSECAM方式の
クロマ信号は切換スイツチSW1の端子dに加えら
れ、切換スイツチSW1より両クロマ信号のいずれ
か一方が出力される。この出力はエミツタフオロ
ワ5、クランプ回路6および増幅器7を通して端
子gから出力される。なお、C3はクランプ用の
コンデンサで、端子hに接続している。
FIG. 1 shows a block diagram of a conventional television receiver. 1 is an integrated circuit for PAL or NTSC demodulation, and a PAL or NTSC chroma signal is guided to terminal A through a PAL/NTSC output emitter follower 3. From this terminal A to the capacitor
The chroma signal of the SECAM method is input to the terminal a of the SECAM demodulation integrated circuit 2 through C1 .
Capacitor demodulated by discriminator 4 in the SECAM demodulation integrated circuit and connected to terminal b
De-emphasis is performed by a filter circuit consisting of C 2 and resistor R 1 . PAL added to terminal a
The chroma signal of the SECAM or NTSC method is applied to the terminal c of the switch SW 1 , and the chroma signal of the SECAM method is applied to the terminal d of the switch SW 1 . Output. This output is output from terminal g through emitter follower 5, clamp circuit 6 and amplifier 7. Note that C3 is a capacitor for clamping and is connected to terminal h.

しかし、このような構成では、SECAM復調用
集積回路のピン数が多く必要であり、大型化する
とともにコスト高となる欠点があつた。
However, such a configuration requires a large number of pins for the SECAM demodulation integrated circuit, resulting in an increase in size and cost.

したがつて、この発明の目的は、SECAM復調
用集積回路のピン数を削減して小型化および低コ
スト化を達成することができるテレビジヨン受像
機を提供することである。
Therefore, an object of the present invention is to provide a television receiver that can achieve downsizing and cost reduction by reducing the number of pins of the SECAM demodulating integrated circuit.

この発明の一実施例を第2図に示す。すなわ
ち、このテレビジヨン受像機は、PALまたは
NTSC復調用集積回路1のPAL・NTSC出力エ
ミツタフオロワ3に接続した端子Aにダイオード
D1のカソードを接続し、このダイオードD1のア
ノードをSECAM復調用集積回路2′の端子aに
接続し、端子aとアースとの間に抵抗R2とコン
デンサC2および抵抗R1よりなるデイエンフアシ
ス用のフイルタ回路とを並列に接続している。
An embodiment of this invention is shown in FIG. In other words, this television receiver is PAL or
Connect a diode to terminal A connected to PAL/NTSC output emitter follower 3 of integrated circuit 1 for NTSC demodulation.
Connect the cathode of diode D 1 , connect the anode of this diode D 1 to terminal a of the SECAM demodulation integrated circuit 2', and connect resistor R 2 , capacitor C 2 and resistor R 1 between terminal a and ground. A filter circuit for de-emphasis is connected in parallel.

また、SECAM復調用集積回路2′は、端子a
を切換スイツチSW1の端子cに接続し、切換スイ
ツチSW1の共通端子からの信号をエミツタフオロ
ワ5の入力端に加え、このエミツタフオロワ5の
出力をレベルシフト回路8を通して切換スイツチ
SW1と連動する切換スイツチSW2の端子eに加
え、また、SECAMデイスクリミネータ4の出力
をレベルシフト回路9を介して切換スイツチSW2
の端子fに加え、切換スイツチSW2の共通端子か
らの信号をクランプ回路6および増幅器7を通し
て端子gより出力するようになつている。また、
エミツタフオロワ5の入力端に抵抗R3を介して
直流電圧VCCを加えている。そして、レベルシフ
ト回路9の出力端にダイオードD2のアノードを
接続し、このダイオードD2のカソードを端子a
に接続している。なお、C3は端子hに接続した
コンデンサである。
Further, the SECAM demodulation integrated circuit 2' has a terminal a
is connected to the terminal c of the changeover switch SW 1 , the signal from the common terminal of the changeover switch SW 1 is applied to the input terminal of the emitter follower 5, and the output of the emitter follower 5 is passed through the level shift circuit 8 to the changeover switch.
In addition to the terminal e of the changeover switch SW 2 which works with SW 1 , the output of the SECAM discriminator 4 is also connected to the changeover switch SW 2 via the level shift circuit 9.
In addition to the terminal f of the switch SW2, a signal from the common terminal of the changeover switch SW2 is outputted from the terminal g through the clamp circuit 6 and the amplifier 7. Also,
A DC voltage V CC is applied to the input terminal of the emitter follower 5 via a resistor R 3 . Then, the anode of the diode D 2 is connected to the output terminal of the level shift circuit 9, and the cathode of this diode D 2 is connected to the terminal a.
is connected to. Note that C3 is a capacitor connected to terminal h.

つぎに、動作について説明する。まず、切換ス
イツチSW1を端子c側に切換えるとともに切換ス
イツチSW2を端子e側に切換えると、端子Aの出
力電圧V1とレベルシフト回路9の出力電圧V2
エミツタフオロワ5の入力電圧VCCとはVCC>V1
>V2となり、ダイオードD1が導通するとともに
ダイオードD2が遮断し、端子Aから出力される
低インピーダンス出力(PALまたはSECAM方式
のクロマ信号)はダイオードD1、端子a、端子
c、エミツタフオロワ5、レベルシフト回路8、
端子e、クランプ回路6、増幅器7を通つて端子
gより出力される。このとき、端子aに接続した
コンデンサC2および抵抗R1よりなるフイルタ回
路は、端子Aがエミツタフオロワ出力で低インピ
ーダンスであるため、端子Aからの出力にほとん
ど影響を与えない。
Next, the operation will be explained. First, when the changeover switch SW 1 is switched to the terminal c side and the changeover switch SW 2 is switched to the terminal e side, the output voltage V 1 of the terminal A, the output voltage V 2 of the level shift circuit 9, and the input voltage of the emitter follower 5 V CC What is V CC >V 1
> V 2 , diode D 1 conducts and diode D 2 cuts off, and the low impedance output (PAL or SECAM system chroma signal) output from terminal A is output from diode D 1 , terminal a, terminal c, and emitter follower 5. , level shift circuit 8,
It passes through terminal e, clamp circuit 6, and amplifier 7, and is output from terminal g. At this time, the filter circuit consisting of the capacitor C 2 and the resistor R 1 connected to the terminal a has almost no effect on the output from the terminal A because the terminal A is an emitter follower output and has low impedance.

つぎに、切換スイツチSW1を端子d側に切換え
るとともに切換スイツチSW2を端子f側に切換え
ると、端子aの電位がV2―(ダイオードD2の接
触電位)となり、V1より低い電位であり、ダイ
オードD1は遮断してPALまたはNTSC方式のク
ロマ信号は端子aに加えられない。また、ダイオ
ードD2は導通して端子aに接続したコンデンサ
C2および抵抗R1よりなるフイルタ回路はデイエ
ンフアシスとして動作し、SECAM方式のクロマ
信号はレベルシフト回路9からの端子f、クラン
プ回路6、増幅器7を通つて端子gから出力され
る。
Next, when changeover switch SW 1 is switched to terminal d side and changeover switch SW 2 is switched to terminal f side, the potential of terminal a becomes V 2 - (contact potential of diode D 2 ), which is lower than V 1 . Yes, diode D1 is cut off and no PAL or NTSC chroma signal is applied to terminal a. Also, diode D2 is conductive and the capacitor connected to terminal a
The filter circuit consisting of C 2 and resistor R 1 operates as a de-emphasis, and the SECAM type chroma signal is outputted from the terminal g through the terminal f from the level shift circuit 9, the clamp circuit 6, and the amplifier 7.

なお、切換スイツチSW1,SW2の切換は、
SECAM復調用集積回路2′内の他のカラー方式
判別回路(図示せず)により制御される。
In addition, the switching of changeover switches SW 1 and SW 2 is as follows:
It is controlled by another color system discrimination circuit (not shown) in the SECAM demodulation integrated circuit 2'.

このように構成した結果、SECAM復調用集積
回路2′の端子aをPALまたはNTSC方式のクロ
マ信号入力用とSECAM方式のクロマ信号のデイ
エンフアシス用のフイルタ回路接続用とに共用す
ることができ、SECAM復調用集積回路2′のピ
ン数を従来例より削減することができ、したがつ
てSECAM復調用集積回路を小型化および低コス
ト化を達成することができる。
As a result of this configuration, terminal a of the SECAM demodulation integrated circuit 2' can be used for inputting PAL or NTSC chroma signals and for connecting a filter circuit for de-emphasis of SECAM chroma signals. The number of pins of the demodulating integrated circuit 2' can be reduced compared to the conventional example, and therefore the SECAM demodulating integrated circuit can be made smaller and lower in cost.

以上のように、この発明のテレビジヨン受像機
は、PALまたはNTSC復調用集積回路と、この
PALまたはNTSC復調用集積回路の低インピー
ダンス出力端子に自己の一端を接続した第1のダ
イオードと、この第1のダイオードの他端に接続
した第1の端子と、SECAMデイスクリミネータ
と、このSECAMデイスクリミネータの出力端に
自己の一端を接続するとともに前記第1の端子に
他端を接続した第2のダイオードと、前記第1の
端子に自己の一方の切換端子を接続した第1の切
換スイツチと、この第1の切換スイツチの共通端
子に自己の入力端を接続したエミツタフオロワ
と、このエミツタフオロワの出力端に自己の一方
の切換端子を接続するとともに前記SECAMデイ
スクリミネータの出力端に自己の他方の切換端子
を接続し前記第1の切換スイツチと連動する第2
の切換スイツチと、この第2の切換スイツチの共
通端子に自己の入力端を接続したクランプ回路
と、このクランプ回路の出力端に接続した第2の
端子と、前記エミツタフオロワの入力端に前記
PALまたはNTSC復調用集積回路の低インピー
ダンス出力端子の出力電圧および前記SECAMデ
イスクリミネータの出力電圧より高い電圧を印加
する電圧印加手段とを有するSECAM復調用集積
回路と、前記第1の端子とアースとの間に並列に
接続した抵抗およびデイエンフアシス用フイルタ
回路とを備えているので、SECAM復調用集積回
路のピン数を削減することができ、その結果、
SECAM復調用集積回路の小型化を達成できると
ともに低コスト化を達成できるという効果があ
る。
As described above, the television receiver of the present invention includes an integrated circuit for PAL or NTSC demodulation, and an integrated circuit for demodulating PAL or NTSC.
a first diode having one end connected to a low impedance output terminal of an integrated circuit for PAL or NTSC demodulation; a first terminal connected to the other end of the first diode; a SECAM discriminator; a second diode having one end connected to the output end of the discriminator and the other end connected to the first terminal; and a first switching diode having one switching terminal connected to the first terminal. A switch, an emitter follower whose input terminal is connected to the common terminal of the first changeover switch, and an emitter follower whose one switching terminal is connected to the output terminal of the emitter follower and whose output terminal is connected to the output terminal of the SECAM disc liminator. a second switch connected to the other switching terminal and operated in conjunction with the first switch;
a clamp circuit whose input terminal is connected to the common terminal of the second switch, a second terminal connected to the output terminal of the clamp circuit, and a clamp circuit whose input terminal is connected to the common terminal of the second selector switch;
A SECAM demodulation integrated circuit having voltage application means for applying a voltage higher than the output voltage of a low impedance output terminal of the PAL or NTSC demodulation integrated circuit and a voltage higher than the output voltage of the SECAM discriminator; Since it is equipped with a resistor and a de-emphasis filter circuit connected in parallel between the
This has the effect of making it possible to reduce the size of the SECAM demodulating integrated circuit and also to reduce costs.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のテレビジヨン受像機の要部ブロ
ツク図、第2図はこの発明の一実施例のテレビジ
ヨン受像機の要部ブロツク図である。 1…PALまたはNTSC復調用集積回路、2′…
SECAM復調用集積回路、3…PAL・NTSC出力
エミツタフオロワ、4…SECAMデイスクリミネ
ータ、5…エミツタフオロワ、6…クランプ回
路、8,9…レベルシフト回路、D1,D2…ダイ
オード、R1,R2…抵抗、C2…コンデンサ、SW1
SW2…切換スイツチ、A,a,g…端子。
FIG. 1 is a block diagram of the main parts of a conventional television receiver, and FIG. 2 is a block diagram of the main parts of a television receiver according to an embodiment of the present invention. 1...Integrated circuit for PAL or NTSC demodulation, 2'...
SECAM demodulation integrated circuit, 3...PAL/NTSC output emitter follower, 4...SECAM discriminator, 5...emitter follower, 6...clamp circuit, 8, 9...level shift circuit, D1 , D2 ...diode, R1 , R 2 ...Resistor, C 2 ...Capacitor, SW 1 ,
SW 2 ...Choice switch, A, a, g...terminal.

Claims (1)

【特許請求の範囲】[Claims] 1 PALまたはNTSC復調用集積回路と、この
PALまたはNTSC復調用集積回路の低インピー
ダンス出力端子に自己の一端を接続した第1のダ
イオードと、この第1のダイオードの他端に接続
した第1の端子と、SECAMデイスクリミネータ
と、このSECAMデイスククミネータの出力端に
自己の一端を接続するとともに前記第1の端子に
他端を接続した第2のダイオードと、前記第1の
端子に自己の一方の切換端子を接続した第1の切
換スイツチと、この第1の切換スイツチの共通端
子に自己の入力端を接続したエミツタフオロワ
と、このエミツタフオロワの出力端に自己の一方
の切換端子を接続するとともに前記SECAMデイ
スクリミネータの出力端に自己の他方の切換端子
を接続し前記第1の切換スイツチと連動する第2
の切換スイツチと、この第2の切換スイツチの共
通端子に自己の入力端を接続したクランプ回路
と、このクランプ回路の出力端に接続した第2の
端子と、前記エミツタフオロワの入力端に前記
PALまたはNTSC復調用集積回路の低インピー
ダンス出力端子の出力電圧および前記SECAMデ
イスクリミネータの出力電圧より高い電圧を印加
する電圧印加手段とを有するSECAM復調用集積
回路と、前記第1の端子とアースとの間に並列に
接続した抵抗およびデイエンフアシス用フイルタ
回路とを備えたテレビジヨン受像機。
1 PAL or NTSC demodulation integrated circuit and this
a first diode having one end connected to a low impedance output terminal of an integrated circuit for PAL or NTSC demodulation; a first terminal connected to the other end of the first diode; a SECAM discriminator; a second diode having one end connected to the output end of the disc cuminator and the other end connected to the first terminal; and a first switching diode having one switching terminal connected to the first terminal. A switch, an emitter follower whose input terminal is connected to the common terminal of the first changeover switch, and an emitter follower whose one switching terminal is connected to the output terminal of the emitter follower and whose output terminal is connected to the output terminal of the SECAM disc liminator. a second switch connected to the other switching terminal and operated in conjunction with the first switch;
a clamp circuit whose input terminal is connected to the common terminal of the second switch, a second terminal connected to the output terminal of the clamp circuit, and a clamp circuit whose input terminal is connected to the common terminal of the second selector switch;
A SECAM demodulation integrated circuit having voltage application means for applying a voltage higher than the output voltage of a low impedance output terminal of the PAL or NTSC demodulation integrated circuit and a voltage higher than the output voltage of the SECAM discriminator; A television receiver comprising a resistor and a de-emphasis filter circuit connected in parallel with each other.
JP3322382A 1982-03-02 1982-03-02 Television receiver Granted JPS58150387A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3322382A JPS58150387A (en) 1982-03-02 1982-03-02 Television receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3322382A JPS58150387A (en) 1982-03-02 1982-03-02 Television receiver

Publications (2)

Publication Number Publication Date
JPS58150387A JPS58150387A (en) 1983-09-07
JPS636195B2 true JPS636195B2 (en) 1988-02-08

Family

ID=12380444

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3322382A Granted JPS58150387A (en) 1982-03-02 1982-03-02 Television receiver

Country Status (1)

Country Link
JP (1) JPS58150387A (en)

Also Published As

Publication number Publication date
JPS58150387A (en) 1983-09-07

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